target-arm: Use the standard FPSCR value for VRSQRTS
[qemu.git] / tests / cris / check_addxr.s
blob7f55cdc1b5ec609e42ef9863827113600a1ae60b
1 # mach: crisv0 crisv3 crisv8 crisv10 crisv32
2 # output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\nfeda49fe\n781344db\n
4 .include "testutils.inc"
5 start
6 moveq -1,r3
7 moveq 2,r4
8 add.d r4,r3
9 test_cc 0 0 0 1
10 checkr3 1
12 moveq 2,r3
13 moveq -1,r4
14 add.d r4,r3
15 test_cc 0 0 0 1
16 checkr3 1
18 move.d 0xffff,r4
19 move.d r4,r3
20 add.d r4,r3
21 test_cc 0 0 0 0
22 checkr3 1fffe
24 moveq -1,r4
25 move.d r4,r3
26 add.d r4,r3
27 test_cc 1 0 0 1
28 checkr3 fffffffe
30 move.d 0x5432f789,r4
31 move.d 0x78134452,r3
32 add.d r4,r3
33 test_cc 1 0 1 0
34 checkr3 cc463bdb
36 moveq -1,r3
37 moveq 2,r4
38 add.w r4,r3
39 test_cc 0 0 0 1
40 checkr3 ffff0001
42 moveq 2,r3
43 moveq -1,r4
44 add.w r4,r3
45 test_cc 0 0 0 1
46 checkr3 1
48 move.d 0xffff,r4
49 move.d r4,r3
50 add.w r4,r3
51 test_cc 1 0 0 1
52 checkr3 fffe
54 move.d 0xfedaffff,r4
55 move.d r4,r3
56 add.w r4,r3
57 test_cc 1 0 0 1
58 checkr3 fedafffe
60 move.d 0x5432f789,r4
61 move.d 0x78134452,r3
62 add.w r4,r3
63 test_cc 0 0 0 1
64 checkr3 78133bdb
66 moveq -1,r3
67 moveq 2,r4
68 add.b r4,r3
69 test_cc 0 0 0 1
70 checkr3 ffffff01
72 moveq 2,r3
73 moveq -1,r4
74 add.b r4,r3
75 test_cc 0 0 0 1
76 checkr3 1
78 move.d 0xff,r4
79 move.d r4,r3
80 add.b r4,r3
81 test_cc 1 0 0 1
82 checkr3 fe
84 move.d 0xfeda49ff,r4
85 move.d r4,r3
86 add.b r4,r3
87 test_cc 1 0 0 1
88 checkr3 feda49fe
90 move.d 0x5432f789,r4
91 move.d 0x78134452,r3
92 add.b r4,r3
93 test_cc 1 0 0 0
94 checkr3 781344db
96 quit