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HEAD
target-arm: Use the standard FPSCR value for VRSQRTS
[qemu.git]
/
tests
/
cris
/
check_addxm.s
blob
7563494b9914eaed10fc561bec49799478685d3f
1
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
2
# output: 1\n1\n101\n10001\n100fe\n1fffe\nfffe\nfffe\nfffffffe\nfe\nfffffffe\n781344db\n781343db\n78143bdb\n78133bdb\n800000ed\n0\n
3
4
.include
"testutils.inc"
5
.data
6
x
:
7
.byte 0xff
8
.word 0xffff
9
.word 0xff
10
.word 0xffff
11
.byte 0x89
12
.word 0xf789
13
.byte 0xff
14
.word 0xffff
15
16
start
17
moveq
2
,
r3
18
move.d x
,
r5
19
adds.
b
[
r5+
],
r3
20
test_cc
0 0 0 1
21
checkr3
1
22
23
moveq
2
,
r3
24
adds.w
[
r5+
],
r3
25
test_cc
0 0 0 1
26
checkr3
1
27
28
moveq
2
,
r3
29
subq
3
,
r5
30
addu.
b
[
r5+
],
r3
31
test_cc
0 0 0 0
32
checkr3
101
33
34
moveq
2
,
r3
35
addu.w
[
r5+
],
r3
36
subq
3
,
r5
37
test_cc
0 0 0 0
38
checkr3
10001
39
40
move.d
0xffff
,
r3
41
addu.
b
[
r5
],
r3
42
test_cc
0 0 0 0
43
checkr3
100
fe
44
45
move.d
0xffff
,
r3
46
addu.w
[
r5
],
r3
47
test_cc
0 0 0 0
48
checkr3
1
fffe
49
50
move.d
0xffff
,
r3
51
adds.
b
[
r5
],
r3
52
test_cc
0 0 0 1
53
checkr3 fffe
54
55
move.d
0xffff
,
r3
56
adds.w
[
r5
],
r3
57
test_cc
0 0 0 1
58
checkr3 fffe
59
60
moveq
-
1
,
r3
61
adds.
b
[
r5
],
r3
62
test_cc
1 0 0 1
63
addq
3
,
r5
64
checkr3 fffffffe
65
66
moveq
-
1
,
r3
67
adds.w
[
r5+
],
r3
68
test_cc
0 0 0 1
69
checkr3 fe
70
71
moveq
-
1
,
r3
72
adds.w
[
r5+
],
r3
73
test_cc
1 0 0 1
74
checkr3 fffffffe
75
76
move.d
0x78134452
,
r3
77
addu.
b
[
r5
],
r3
78
test_cc
0 0 0 0
79
checkr3
781344
db
80
81
move.d
0x78134452
,
r3
82
adds.
b
[
r5+
],
r3
83
test_cc
0 0 0 1
84
checkr3
781343
db
85
86
move.d
0x78134452
,
r3
87
addu.w
[
r5
],
r3
88
test_cc
0 0 0 0
89
checkr3
78143
bdb
90
91
move.d
0x78134452
,
r3
92
adds.w
[
r5+
],
r3
93
test_cc
0 0 0 1
94
checkr3
78133
bdb
95
96
move.d
0x7fffffee
,
r3
97
addu.
b
[
r5+
],
r3
98
test_cc
1 0 1 0
99
checkr3
800000
ed
100
101
move.d
0x1
,
r3
102
adds.w
[
r5+
],
r3
103
test_cc
0 1 0 1
104
checkr3
0
105
106
quit