target-tricore: Add instructions of SBC and SBRN opcode format
[qemu.git] / tests / fdc-test.c
blob203074cdad1cc8dd82e1681feb72d62b6488d404
1 /*
2 * Floppy test cases.
4 * Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include <stdint.h>
26 #include <string.h>
27 #include <stdio.h>
29 #include <glib.h>
31 #include "libqtest.h"
32 #include "qemu-common.h"
34 #define TEST_IMAGE_SIZE 1440 * 1024
36 #define FLOPPY_BASE 0x3f0
37 #define FLOPPY_IRQ 6
39 enum {
40 reg_sra = 0x0,
41 reg_srb = 0x1,
42 reg_dor = 0x2,
43 reg_msr = 0x4,
44 reg_dsr = 0x4,
45 reg_fifo = 0x5,
46 reg_dir = 0x7,
49 enum {
50 CMD_SENSE_INT = 0x08,
51 CMD_READ_ID = 0x0a,
52 CMD_SEEK = 0x0f,
53 CMD_VERIFY = 0x16,
54 CMD_READ = 0xe6,
55 CMD_RELATIVE_SEEK_OUT = 0x8f,
56 CMD_RELATIVE_SEEK_IN = 0xcf,
59 enum {
60 BUSY = 0x10,
61 NONDMA = 0x20,
62 RQM = 0x80,
63 DIO = 0x40,
65 DSKCHG = 0x80,
68 static char test_image[] = "/tmp/qtest.XXXXXX";
70 #define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
71 #define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
73 static uint8_t base = 0x70;
75 enum {
76 CMOS_FLOPPY = 0x10,
79 static void floppy_send(uint8_t byte)
81 uint8_t msr;
83 msr = inb(FLOPPY_BASE + reg_msr);
84 assert_bit_set(msr, RQM);
85 assert_bit_clear(msr, DIO);
87 outb(FLOPPY_BASE + reg_fifo, byte);
90 static uint8_t floppy_recv(void)
92 uint8_t msr;
94 msr = inb(FLOPPY_BASE + reg_msr);
95 assert_bit_set(msr, RQM | DIO);
97 return inb(FLOPPY_BASE + reg_fifo);
100 /* pcn: Present Cylinder Number */
101 static void ack_irq(uint8_t *pcn)
103 uint8_t ret;
105 g_assert(get_irq(FLOPPY_IRQ));
106 floppy_send(CMD_SENSE_INT);
107 floppy_recv();
109 ret = floppy_recv();
110 if (pcn != NULL) {
111 *pcn = ret;
114 g_assert(!get_irq(FLOPPY_IRQ));
117 static uint8_t send_read_command(uint8_t cmd)
119 uint8_t drive = 0;
120 uint8_t head = 0;
121 uint8_t cyl = 0;
122 uint8_t sect_addr = 1;
123 uint8_t sect_size = 2;
124 uint8_t eot = 1;
125 uint8_t gap = 0x1b;
126 uint8_t gpl = 0xff;
128 uint8_t msr = 0;
129 uint8_t st0;
131 uint8_t ret = 0;
133 floppy_send(cmd);
134 floppy_send(head << 2 | drive);
135 g_assert(!get_irq(FLOPPY_IRQ));
136 floppy_send(cyl);
137 floppy_send(head);
138 floppy_send(sect_addr);
139 floppy_send(sect_size);
140 floppy_send(eot);
141 floppy_send(gap);
142 floppy_send(gpl);
144 uint8_t i = 0;
145 uint8_t n = 2;
146 for (; i < n; i++) {
147 msr = inb(FLOPPY_BASE + reg_msr);
148 if (msr == 0xd0) {
149 break;
151 sleep(1);
154 if (i >= n) {
155 return 1;
158 st0 = floppy_recv();
159 if (st0 != 0x40) {
160 ret = 1;
163 floppy_recv();
164 floppy_recv();
165 floppy_recv();
166 floppy_recv();
167 floppy_recv();
168 floppy_recv();
170 return ret;
173 static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
175 uint8_t drive = 0;
176 uint8_t head = 0;
177 uint8_t cyl = 0;
178 uint8_t sect_addr = 1;
179 uint8_t sect_size = 2;
180 uint8_t eot = nb_sect;
181 uint8_t gap = 0x1b;
182 uint8_t gpl = 0xff;
184 uint8_t msr = 0;
185 uint8_t st0;
187 uint8_t ret = 0;
189 floppy_send(CMD_READ);
190 floppy_send(head << 2 | drive);
191 g_assert(!get_irq(FLOPPY_IRQ));
192 floppy_send(cyl);
193 floppy_send(head);
194 floppy_send(sect_addr);
195 floppy_send(sect_size);
196 floppy_send(eot);
197 floppy_send(gap);
198 floppy_send(gpl);
200 uint16_t i = 0;
201 uint8_t n = 2;
202 for (; i < n; i++) {
203 msr = inb(FLOPPY_BASE + reg_msr);
204 if (msr == (BUSY | NONDMA | DIO | RQM)) {
205 break;
207 sleep(1);
210 if (i >= n) {
211 return 1;
214 /* Non-DMA mode */
215 for (i = 0; i < 512 * 2 * nb_sect; i++) {
216 msr = inb(FLOPPY_BASE + reg_msr);
217 assert_bit_set(msr, BUSY | RQM | DIO);
218 inb(FLOPPY_BASE + reg_fifo);
221 st0 = floppy_recv();
222 if (st0 != expected_st0) {
223 ret = 1;
226 floppy_recv();
227 floppy_recv();
228 floppy_recv();
229 floppy_recv();
230 floppy_recv();
231 floppy_recv();
233 return ret;
236 static void send_seek(int cyl)
238 int drive = 0;
239 int head = 0;
241 floppy_send(CMD_SEEK);
242 floppy_send(head << 2 | drive);
243 g_assert(!get_irq(FLOPPY_IRQ));
244 floppy_send(cyl);
245 ack_irq(NULL);
248 static uint8_t cmos_read(uint8_t reg)
250 outb(base + 0, reg);
251 return inb(base + 1);
254 static void test_cmos(void)
256 uint8_t cmos;
258 cmos = cmos_read(CMOS_FLOPPY);
259 g_assert(cmos == 0x40);
262 static void test_no_media_on_start(void)
264 uint8_t dir;
266 /* Media changed bit must be set all time after start if there is
267 * no media in drive. */
268 dir = inb(FLOPPY_BASE + reg_dir);
269 assert_bit_set(dir, DSKCHG);
270 dir = inb(FLOPPY_BASE + reg_dir);
271 assert_bit_set(dir, DSKCHG);
272 send_seek(1);
273 dir = inb(FLOPPY_BASE + reg_dir);
274 assert_bit_set(dir, DSKCHG);
275 dir = inb(FLOPPY_BASE + reg_dir);
276 assert_bit_set(dir, DSKCHG);
279 static void test_read_without_media(void)
281 uint8_t ret;
283 ret = send_read_command(CMD_READ);
284 g_assert(ret == 0);
287 static void test_media_insert(void)
289 uint8_t dir;
291 /* Insert media in drive. DSKCHK should not be reset until a step pulse
292 * is sent. */
293 qmp_discard_response("{'execute':'change', 'arguments':{"
294 " 'device':'floppy0', 'target': %s }}",
295 test_image);
296 qmp_discard_response(""); /* ignore event
297 (FIXME open -> open transition?!) */
298 qmp_discard_response(""); /* ignore event */
300 dir = inb(FLOPPY_BASE + reg_dir);
301 assert_bit_set(dir, DSKCHG);
302 dir = inb(FLOPPY_BASE + reg_dir);
303 assert_bit_set(dir, DSKCHG);
305 send_seek(0);
306 dir = inb(FLOPPY_BASE + reg_dir);
307 assert_bit_set(dir, DSKCHG);
308 dir = inb(FLOPPY_BASE + reg_dir);
309 assert_bit_set(dir, DSKCHG);
311 /* Step to next track should clear DSKCHG bit. */
312 send_seek(1);
313 dir = inb(FLOPPY_BASE + reg_dir);
314 assert_bit_clear(dir, DSKCHG);
315 dir = inb(FLOPPY_BASE + reg_dir);
316 assert_bit_clear(dir, DSKCHG);
319 static void test_media_change(void)
321 uint8_t dir;
323 test_media_insert();
325 /* Eject the floppy and check that DSKCHG is set. Reading it out doesn't
326 * reset the bit. */
327 qmp_discard_response("{'execute':'eject', 'arguments':{"
328 " 'device':'floppy0' }}");
329 qmp_discard_response(""); /* ignore event */
331 dir = inb(FLOPPY_BASE + reg_dir);
332 assert_bit_set(dir, DSKCHG);
333 dir = inb(FLOPPY_BASE + reg_dir);
334 assert_bit_set(dir, DSKCHG);
336 send_seek(0);
337 dir = inb(FLOPPY_BASE + reg_dir);
338 assert_bit_set(dir, DSKCHG);
339 dir = inb(FLOPPY_BASE + reg_dir);
340 assert_bit_set(dir, DSKCHG);
342 send_seek(1);
343 dir = inb(FLOPPY_BASE + reg_dir);
344 assert_bit_set(dir, DSKCHG);
345 dir = inb(FLOPPY_BASE + reg_dir);
346 assert_bit_set(dir, DSKCHG);
349 static void test_sense_interrupt(void)
351 int drive = 0;
352 int head = 0;
353 int cyl = 0;
354 int ret = 0;
356 floppy_send(CMD_SENSE_INT);
357 ret = floppy_recv();
358 g_assert(ret == 0x80);
360 floppy_send(CMD_SEEK);
361 floppy_send(head << 2 | drive);
362 g_assert(!get_irq(FLOPPY_IRQ));
363 floppy_send(cyl);
365 floppy_send(CMD_SENSE_INT);
366 ret = floppy_recv();
367 g_assert(ret == 0x20);
368 floppy_recv();
371 static void test_relative_seek(void)
373 uint8_t drive = 0;
374 uint8_t head = 0;
375 uint8_t cyl = 1;
376 uint8_t pcn;
378 /* Send seek to track 0 */
379 send_seek(0);
381 /* Send relative seek to increase track by 1 */
382 floppy_send(CMD_RELATIVE_SEEK_IN);
383 floppy_send(head << 2 | drive);
384 g_assert(!get_irq(FLOPPY_IRQ));
385 floppy_send(cyl);
387 ack_irq(&pcn);
388 g_assert(pcn == 1);
390 /* Send relative seek to decrease track by 1 */
391 floppy_send(CMD_RELATIVE_SEEK_OUT);
392 floppy_send(head << 2 | drive);
393 g_assert(!get_irq(FLOPPY_IRQ));
394 floppy_send(cyl);
396 ack_irq(&pcn);
397 g_assert(pcn == 0);
400 static void test_read_id(void)
402 uint8_t drive = 0;
403 uint8_t head = 0;
404 uint8_t cyl;
405 uint8_t st0;
407 /* Seek to track 0 and check with READ ID */
408 send_seek(0);
410 floppy_send(CMD_READ_ID);
411 g_assert(!get_irq(FLOPPY_IRQ));
412 floppy_send(head << 2 | drive);
414 while (!get_irq(FLOPPY_IRQ)) {
415 /* qemu involves a timer with READ ID... */
416 clock_step(1000000000LL / 50);
419 st0 = floppy_recv();
420 floppy_recv();
421 floppy_recv();
422 cyl = floppy_recv();
423 head = floppy_recv();
424 floppy_recv();
425 floppy_recv();
427 g_assert_cmpint(cyl, ==, 0);
428 g_assert_cmpint(head, ==, 0);
429 g_assert_cmpint(st0, ==, head << 2);
431 /* Seek to track 8 on head 1 and check with READ ID */
432 head = 1;
433 cyl = 8;
435 floppy_send(CMD_SEEK);
436 floppy_send(head << 2 | drive);
437 g_assert(!get_irq(FLOPPY_IRQ));
438 floppy_send(cyl);
439 g_assert(get_irq(FLOPPY_IRQ));
440 ack_irq(NULL);
442 floppy_send(CMD_READ_ID);
443 g_assert(!get_irq(FLOPPY_IRQ));
444 floppy_send(head << 2 | drive);
446 while (!get_irq(FLOPPY_IRQ)) {
447 /* qemu involves a timer with READ ID... */
448 clock_step(1000000000LL / 50);
451 st0 = floppy_recv();
452 floppy_recv();
453 floppy_recv();
454 cyl = floppy_recv();
455 head = floppy_recv();
456 floppy_recv();
457 floppy_recv();
459 g_assert_cmpint(cyl, ==, 8);
460 g_assert_cmpint(head, ==, 1);
461 g_assert_cmpint(st0, ==, head << 2);
464 static void test_read_no_dma_1(void)
466 uint8_t ret;
468 outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
469 send_seek(0);
470 ret = send_read_no_dma_command(1, 0x04);
471 g_assert(ret == 0);
474 static void test_read_no_dma_18(void)
476 uint8_t ret;
478 outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
479 send_seek(0);
480 ret = send_read_no_dma_command(18, 0x04);
481 g_assert(ret == 0);
484 static void test_read_no_dma_19(void)
486 uint8_t ret;
488 outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
489 send_seek(0);
490 ret = send_read_no_dma_command(19, 0x20);
491 g_assert(ret == 0);
494 static void test_verify(void)
496 uint8_t ret;
498 ret = send_read_command(CMD_VERIFY);
499 g_assert(ret == 0);
502 /* success if no crash or abort */
503 static void fuzz_registers(void)
505 unsigned int i;
507 for (i = 0; i < 1000; i++) {
508 uint8_t reg, val;
510 reg = (uint8_t)g_test_rand_int_range(0, 8);
511 val = (uint8_t)g_test_rand_int_range(0, 256);
513 outb(FLOPPY_BASE + reg, val);
514 inb(FLOPPY_BASE + reg);
518 int main(int argc, char **argv)
520 const char *arch = qtest_get_arch();
521 int fd;
522 int ret;
524 /* Check architecture */
525 if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
526 g_test_message("Skipping test for non-x86\n");
527 return 0;
530 /* Create a temporary raw image */
531 fd = mkstemp(test_image);
532 g_assert(fd >= 0);
533 ret = ftruncate(fd, TEST_IMAGE_SIZE);
534 g_assert(ret == 0);
535 close(fd);
537 /* Run the tests */
538 g_test_init(&argc, &argv, NULL);
540 qtest_start(NULL);
541 qtest_irq_intercept_in(global_qtest, "ioapic");
542 qtest_add_func("/fdc/cmos", test_cmos);
543 qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start);
544 qtest_add_func("/fdc/read_without_media", test_read_without_media);
545 qtest_add_func("/fdc/media_change", test_media_change);
546 qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt);
547 qtest_add_func("/fdc/relative_seek", test_relative_seek);
548 qtest_add_func("/fdc/read_id", test_read_id);
549 qtest_add_func("/fdc/verify", test_verify);
550 qtest_add_func("/fdc/media_insert", test_media_insert);
551 qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1);
552 qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18);
553 qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19);
554 qtest_add_func("/fdc/fuzz-registers", fuzz_registers);
556 ret = g_test_run();
558 /* Cleanup */
559 qtest_end();
560 unlink(test_image);
562 return ret;