4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/cpu-common.h"
26 #include "exec/hwaddr.h"
27 #include "exec/memattrs.h"
28 #include "qapi/qapi-types-run-state.h"
29 #include "qemu/bitmap.h"
30 #include "qemu/rcu_queue.h"
31 #include "qemu/queue.h"
32 #include "qemu/thread.h"
33 #include "qemu/plugin.h"
34 #include "qom/object.h"
36 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
41 * @section_id: QEMU-cpu
43 * @short_description: Base class for all CPUs
46 #define TYPE_CPU "cpu"
48 /* Since this macro is used a lot in hot code paths and in conjunction with
49 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
52 #define CPU(obj) ((CPUState *)(obj))
55 * The class checkers bring in CPU_GET_CLASS() which is potentially
56 * expensive given the eventual call to
57 * object_class_dynamic_cast_assert(). Because of this the CPUState
58 * has a cached value for the class in cs->cc which is set up in
59 * cpu_exec_realizefn() for use in hot code paths.
61 typedef struct CPUClass CPUClass
;
62 DECLARE_CLASS_CHECKERS(CPUClass
, CPU
,
66 * OBJECT_DECLARE_CPU_TYPE:
67 * @CpuInstanceType: instance struct name
68 * @CpuClassType: class struct name
69 * @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
71 * This macro is typically used in "cpu-qom.h" header file, and will:
73 * - create the typedefs for the CPU object and class structs
74 * - register the type for use with g_autoptr
75 * - provide three standard type cast functions
77 * The object struct and class struct need to be declared manually.
79 #define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
80 typedef struct ArchCPU CpuInstanceType; \
81 OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
83 typedef enum MMUAccessType
{
89 typedef struct CPUWatchpoint CPUWatchpoint
;
91 /* see tcg-cpu-ops.h */
97 /* see sysemu-cpu-ops.h */
102 * @class_by_name: Callback to map -cpu command line model name to an
103 * instantiatable CPU type.
104 * @parse_features: Callback to parse command line arguments.
105 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
106 * @has_work: Callback for checking if there is work to do.
107 * @memory_rw_debug: Callback for GDB memory access.
108 * @dump_state: Callback for dumping state.
109 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
110 * @set_pc: Callback for setting the Program Counter register. This
111 * should have the semantics used by the target architecture when
112 * setting the PC from a source such as an ELF file entry point;
113 * for example on Arm it will also set the Thumb mode bit based
114 * on the least significant bit of the new PC value.
115 * If the target behaviour here is anything other than "set
116 * the PC register to the value passed in" then the target must
117 * also implement the synchronize_from_tb hook.
118 * @gdb_read_register: Callback for letting GDB read a register.
119 * @gdb_write_register: Callback for letting GDB write a register.
120 * @gdb_adjust_breakpoint: Callback for adjusting the address of a
121 * breakpoint. Used by AVR to handle a gdb mis-feature with
122 * its Harvard architecture split code and data.
123 * @gdb_num_core_regs: Number of core registers accessible to GDB.
124 * @gdb_core_xml_file: File name for core registers GDB XML description.
125 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
126 * before the insn which triggers a watchpoint rather than after it.
127 * @gdb_arch_name: Optional callback that returns the architecture name known
128 * to GDB. The caller must free the returned string with g_free.
129 * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
130 * gdb stub. Returns a pointer to the XML contents for the specified XML file
131 * or NULL if the CPU doesn't have a dynamically generated content for it.
132 * @disas_set_info: Setup architecture specific components of disassembly info
133 * @adjust_watchpoint_address: Perform a target-specific adjustment to an
134 * address before attempting to match it against watchpoints.
135 * @deprecation_note: If this CPUClass is deprecated, this field provides
136 * related information.
138 * Represents a CPU family or model.
142 DeviceClass parent_class
;
145 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
146 void (*parse_features
)(const char *typename
, char *str
, Error
**errp
);
148 bool (*has_work
)(CPUState
*cpu
);
149 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
150 uint8_t *buf
, int len
, bool is_write
);
151 void (*dump_state
)(CPUState
*cpu
, FILE *, int flags
);
152 int64_t (*get_arch_id
)(CPUState
*cpu
);
153 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
154 int (*gdb_read_register
)(CPUState
*cpu
, GByteArray
*buf
, int reg
);
155 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
156 vaddr (*gdb_adjust_breakpoint
)(CPUState
*cpu
, vaddr addr
);
158 const char *gdb_core_xml_file
;
159 gchar
* (*gdb_arch_name
)(CPUState
*cpu
);
160 const char * (*gdb_get_dynamic_xml
)(CPUState
*cpu
, const char *xmlname
);
162 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
164 const char *deprecation_note
;
165 struct AccelCPUClass
*accel_cpu
;
167 /* when system emulation is not available, this pointer is NULL */
168 const struct SysemuCPUOps
*sysemu_ops
;
170 /* when TCG is not available, this pointer is NULL */
171 const struct TCGCPUOps
*tcg_ops
;
174 * if not NULL, this is called in order for the CPUClass to initialize
175 * class data that depends on the accelerator, see accel/accel-common.c.
177 void (*init_accel_cpu
)(struct AccelCPUClass
*accel_cpu
, CPUClass
*cc
);
180 * Keep non-pointer data at the end to minimize holes.
182 int reset_dump_flags
;
183 int gdb_num_core_regs
;
184 bool gdb_stop_before_watchpoint
;
188 * Low 16 bits: number of cycles left, used only in icount mode.
189 * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
190 * for this CPU and return to its top level loop (even in non-icount mode).
191 * This allows a single read-compare-cbranch-write sequence to test
192 * for both decrementer underflow and exceptions.
194 typedef union IcountDecr
{
207 typedef struct CPUBreakpoint
{
209 int flags
; /* BP_* */
210 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
213 struct CPUWatchpoint
{
218 int flags
; /* BP_* */
219 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
224 * For plugins we sometime need to save the resolved iotlb data before
225 * the memory regions get moved around by io_writex.
227 typedef struct SavedIOTLB
{
229 MemoryRegionSection
*section
;
237 struct hax_vcpu_state
;
238 struct hvf_vcpu_state
;
240 #define TB_JMP_CACHE_BITS 12
241 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
245 /* The union type allows passing of 64 bit target pointers on 32 bit
246 * hosts in a single parameter
250 unsigned long host_ulong
;
255 #define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
256 #define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
257 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
258 #define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
259 #define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
261 typedef void (*run_on_cpu_func
)(CPUState
*cpu
, run_on_cpu_data data
);
263 struct qemu_work_item
;
265 #define CPU_UNSET_NUMA_NODE_ID -1
266 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
270 * @cpu_index: CPU index (informative).
271 * @cluster_index: Identifies which cluster this CPU is in.
272 * For boards which don't define clusters or for "loose" CPUs not assigned
273 * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
274 * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
276 * @tcg_cflags: Pre-computed cflags for this cpu.
277 * @nr_cores: Number of cores within this CPU package.
278 * @nr_threads: Number of threads within this CPU.
279 * @running: #true if CPU is currently running (lockless).
280 * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
281 * valid under cpu_list_lock.
282 * @created: Indicates whether the CPU thread has been successfully created.
283 * @interrupt_request: Indicates a pending interrupt request.
284 * @halted: Nonzero if the CPU is in suspended state.
285 * @stop: Indicates a pending stop request.
286 * @stopped: Indicates the CPU has been artificially stopped.
287 * @unplug: Indicates a pending CPU unplug request.
288 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
289 * @singlestep_enabled: Flags for single-stepping.
290 * @icount_extra: Instructions until next timer event.
291 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
292 * requires that IO only be performed on the last instruction of a TB
293 * so that interrupts take effect immediately.
294 * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
295 * AddressSpaces this CPU has)
296 * @num_ases: number of CPUAddressSpaces in @cpu_ases
297 * @as: Pointer to the first AddressSpace, for the convenience of targets which
298 * only have a single AddressSpace
299 * @env_ptr: Pointer to subclass-specific CPUArchState field.
300 * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
301 * @gdb_regs: Additional GDB registers.
302 * @gdb_num_regs: Number of total registers accessible to GDB.
303 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
304 * @next_cpu: Next CPU sharing TB cache.
305 * @opaque: User data.
306 * @mem_io_pc: Host Program Counter at which the memory was accessed.
307 * @kvm_fd: vCPU file descriptor for KVM.
308 * @work_mutex: Lock to prevent multiple access to @work_list.
309 * @work_list: List of pending asynchronous work.
310 * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
312 * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
313 * @plugin_mask: Plugin event bitmap. Modified only via async work.
314 * @ignore_memory_transaction_failures: Cached copy of the MachineState
315 * flag of the same name: allows the board to suppress calling of the
316 * CPU do_transaction_failed hook function.
317 * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
319 * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
320 * dirty ring structure.
322 * State of one CPU core or thread.
326 DeviceState parent_obj
;
327 /* cache to avoid expensive CPU_GET_CLASS */
334 struct QemuThread
*thread
;
339 bool running
, has_waiter
;
340 struct QemuCond
*halt_cond
;
346 /* Should CPU start in powered-off state? */
347 bool start_powered_off
;
352 bool in_exclusive_context
;
353 uint32_t cflags_next_tb
;
354 /* updates protected by BQL */
355 uint32_t interrupt_request
;
356 int singlestep_enabled
;
357 int64_t icount_budget
;
358 int64_t icount_extra
;
359 uint64_t random_seed
;
362 QemuMutex work_mutex
;
363 QSIMPLEQ_HEAD(, qemu_work_item
) work_list
;
365 CPUAddressSpace
*cpu_ases
;
368 MemoryRegion
*memory
;
370 CPUArchState
*env_ptr
;
371 IcountDecr
*icount_decr_ptr
;
373 /* Accessed in parallel; all accesses must be atomic */
374 TranslationBlock
*tb_jmp_cache
[TB_JMP_CACHE_SIZE
];
376 struct GDBRegisterState
*gdb_regs
;
379 QTAILQ_ENTRY(CPUState
) node
;
381 /* ice debug support */
382 QTAILQ_HEAD(, CPUBreakpoint
) breakpoints
;
384 QTAILQ_HEAD(, CPUWatchpoint
) watchpoints
;
385 CPUWatchpoint
*watchpoint_hit
;
389 /* In order to avoid passing too many arguments to the MMIO helpers,
390 * we store some rarely used information in the CPU context.
394 /* Only used in KVM */
396 struct KVMState
*kvm_state
;
397 struct kvm_run
*kvm_run
;
398 struct kvm_dirty_gfn
*kvm_dirty_gfns
;
399 uint32_t kvm_fetch_index
;
400 uint64_t dirty_pages
;
402 /* Used for events with 'vcpu' and *without* the 'disabled' properties */
403 DECLARE_BITMAP(trace_dstate_delayed
, CPU_TRACE_DSTATE_MAX_EVENTS
);
404 DECLARE_BITMAP(trace_dstate
, CPU_TRACE_DSTATE_MAX_EVENTS
);
406 DECLARE_BITMAP(plugin_mask
, QEMU_PLUGIN_EV_MAX
);
409 GArray
*plugin_mem_cbs
;
410 /* saved iotlb data from io_writex */
411 SavedIOTLB saved_iotlb
;
414 /* TODO Move common fields from CPUArchState here. */
420 int32_t exception_index
;
422 /* shared by kvm, hax and hvf */
425 /* Used to keep track of an outstanding cpu throttle thread for migration
428 bool throttle_thread_scheduled
;
431 * Sleep throttle_us_per_full microseconds once dirty ring is full
432 * if dirty page rate limit is enabled.
434 int64_t throttle_us_per_full
;
436 bool ignore_memory_transaction_failures
;
438 /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
439 bool prctl_unalign_sigbus
;
441 struct hax_vcpu_state
*hax_vcpu
;
443 struct hvf_vcpu_state
*hvf
;
445 /* track IOMMUs whose translations we've cached in the TCG TLB */
446 GArray
*iommu_notifiers
;
449 typedef QTAILQ_HEAD(CPUTailQ
, CPUState
) CPUTailQ
;
450 extern CPUTailQ cpus
;
452 #define first_cpu QTAILQ_FIRST_RCU(&cpus)
453 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
454 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
455 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
456 QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
458 extern __thread CPUState
*current_cpu
;
460 static inline void cpu_tb_jmp_cache_clear(CPUState
*cpu
)
464 for (i
= 0; i
< TB_JMP_CACHE_SIZE
; i
++) {
465 qatomic_set(&cpu
->tb_jmp_cache
[i
], NULL
);
470 * qemu_tcg_mttcg_enabled:
471 * Check whether we are running MultiThread TCG or not.
473 * Returns: %true if we are in MTTCG mode %false otherwise.
475 extern bool mttcg_enabled
;
476 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
479 * cpu_paging_enabled:
480 * @cpu: The CPU whose state is to be inspected.
482 * Returns: %true if paging is enabled, %false otherwise.
484 bool cpu_paging_enabled(const CPUState
*cpu
);
487 * cpu_get_memory_mapping:
488 * @cpu: The CPU whose memory mappings are to be obtained.
489 * @list: Where to write the memory mappings to.
490 * @errp: Pointer for reporting an #Error.
492 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
495 #if !defined(CONFIG_USER_ONLY)
498 * cpu_write_elf64_note:
499 * @f: pointer to a function that writes memory to a file
500 * @cpu: The CPU whose memory is to be dumped
501 * @cpuid: ID number of the CPU
502 * @opaque: pointer to the CPUState struct
504 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
505 int cpuid
, void *opaque
);
508 * cpu_write_elf64_qemunote:
509 * @f: pointer to a function that writes memory to a file
510 * @cpu: The CPU whose memory is to be dumped
511 * @cpuid: ID number of the CPU
512 * @opaque: pointer to the CPUState struct
514 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
518 * cpu_write_elf32_note:
519 * @f: pointer to a function that writes memory to a file
520 * @cpu: The CPU whose memory is to be dumped
521 * @cpuid: ID number of the CPU
522 * @opaque: pointer to the CPUState struct
524 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
525 int cpuid
, void *opaque
);
528 * cpu_write_elf32_qemunote:
529 * @f: pointer to a function that writes memory to a file
530 * @cpu: The CPU whose memory is to be dumped
531 * @cpuid: ID number of the CPU
532 * @opaque: pointer to the CPUState struct
534 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
538 * cpu_get_crash_info:
539 * @cpu: The CPU to get crash information for
541 * Gets the previously saved crash information.
542 * Caller is responsible for freeing the data.
544 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
);
546 #endif /* !CONFIG_USER_ONLY */
551 * @CPU_DUMP_FPU: dump FPU register state, not just integer
552 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
555 CPU_DUMP_CODE
= 0x00010000,
556 CPU_DUMP_FPU
= 0x00020000,
557 CPU_DUMP_CCOP
= 0x00040000,
562 * @cpu: The CPU whose state is to be dumped.
563 * @f: If non-null, dump to this stream, else to current print sink.
567 void cpu_dump_state(CPUState
*cpu
, FILE *f
, int flags
);
569 #ifndef CONFIG_USER_ONLY
571 * cpu_get_phys_page_attrs_debug:
572 * @cpu: The CPU to obtain the physical page address for.
573 * @addr: The virtual address.
574 * @attrs: Updated on return with the memory transaction attributes to use
577 * Obtains the physical page corresponding to a virtual one, together
578 * with the corresponding memory transaction attributes to use for the access.
579 * Use it only for debugging because no protection checks are done.
581 * Returns: Corresponding physical page address or -1 if no page found.
583 hwaddr
cpu_get_phys_page_attrs_debug(CPUState
*cpu
, vaddr addr
,
587 * cpu_get_phys_page_debug:
588 * @cpu: The CPU to obtain the physical page address for.
589 * @addr: The virtual address.
591 * Obtains the physical page corresponding to a virtual one.
592 * Use it only for debugging because no protection checks are done.
594 * Returns: Corresponding physical page address or -1 if no page found.
596 hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
);
598 /** cpu_asidx_from_attrs:
600 * @attrs: memory transaction attributes
602 * Returns the address space index specifying the CPU AddressSpace
603 * to use for a memory access with the given transaction attributes.
605 int cpu_asidx_from_attrs(CPUState
*cpu
, MemTxAttrs attrs
);
608 * cpu_virtio_is_big_endian:
611 * Returns %true if a CPU which supports runtime configurable endianness
612 * is currently big-endian.
614 bool cpu_virtio_is_big_endian(CPUState
*cpu
);
616 #endif /* CONFIG_USER_ONLY */
620 * @cpu: The CPU to be added to the list of CPUs.
622 void cpu_list_add(CPUState
*cpu
);
626 * @cpu: The CPU to be removed from the list of CPUs.
628 void cpu_list_remove(CPUState
*cpu
);
632 * @cpu: The CPU whose state is to be reset.
634 void cpu_reset(CPUState
*cpu
);
638 * @typename: The CPU base type.
639 * @cpu_model: The model string without any parameters.
641 * Looks up a CPU #ObjectClass matching name @cpu_model.
643 * Returns: A #CPUClass or %NULL if not matching class is found.
645 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
649 * @typename: The CPU type.
651 * Instantiates a CPU and realizes the CPU.
653 * Returns: A #CPUState or %NULL if an error occurred.
655 CPUState
*cpu_create(const char *typename
);
659 * @cpu_option: The -cpu option including optional parameters.
661 * processes optional parameters and registers them as global properties
663 * Returns: type of CPU to create or prints error and terminates process
664 * if an error occurred.
666 const char *parse_cpu_option(const char *cpu_option
);
670 * @cpu: The vCPU to check.
672 * Checks whether the CPU has work to do.
674 * Returns: %true if the CPU has work, %false otherwise.
676 static inline bool cpu_has_work(CPUState
*cpu
)
678 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
680 g_assert(cc
->has_work
);
681 return cc
->has_work(cpu
);
686 * @cpu: The vCPU to check against.
688 * Checks whether the caller is executing on the vCPU thread.
690 * Returns: %true if called from @cpu's thread, %false otherwise.
692 bool qemu_cpu_is_self(CPUState
*cpu
);
696 * @cpu: The vCPU to kick.
698 * Kicks @cpu's thread.
700 void qemu_cpu_kick(CPUState
*cpu
);
704 * @cpu: The CPU to check.
706 * Checks whether the CPU is stopped.
708 * Returns: %true if run state is not running or if artificially stopped;
711 bool cpu_is_stopped(CPUState
*cpu
);
715 * @cpu: The vCPU to run on.
716 * @func: The function to be executed.
717 * @data: Data to pass to the function.
718 * @mutex: Mutex to release while waiting for @func to run.
720 * Used internally in the implementation of run_on_cpu.
722 void do_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
,
727 * @cpu: The vCPU to run on.
728 * @func: The function to be executed.
729 * @data: Data to pass to the function.
731 * Schedules the function @func for execution on the vCPU @cpu.
733 void run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
737 * @cpu: The vCPU to run on.
738 * @func: The function to be executed.
739 * @data: Data to pass to the function.
741 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
743 void async_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
746 * async_safe_run_on_cpu:
747 * @cpu: The vCPU to run on.
748 * @func: The function to be executed.
749 * @data: Data to pass to the function.
751 * Schedules the function @func for execution on the vCPU @cpu asynchronously,
752 * while all other vCPUs are sleeping.
754 * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
757 void async_safe_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
760 * cpu_in_exclusive_context()
761 * @cpu: The vCPU to check
763 * Returns true if @cpu is an exclusive context, for example running
764 * something which has previously been queued via async_safe_run_on_cpu().
766 static inline bool cpu_in_exclusive_context(const CPUState
*cpu
)
768 return cpu
->in_exclusive_context
;
773 * @index: The CPUState@cpu_index value of the CPU to obtain.
775 * Gets a CPU matching @index.
777 * Returns: The CPU or %NULL if there is no matching CPU.
779 CPUState
*qemu_get_cpu(int index
);
783 * @id: Guest-exposed CPU ID to lookup.
785 * Search for CPU with specified ID.
787 * Returns: %true - CPU is found, %false - CPU isn't found.
789 bool cpu_exists(int64_t id
);
793 * @id: Guest-exposed CPU ID of the CPU to obtain.
795 * Get a CPU with matching @id.
797 * Returns: The CPU or %NULL if there is no matching CPU.
799 CPUState
*cpu_by_arch_id(int64_t id
);
803 * @cpu: The CPU to set an interrupt on.
804 * @mask: The interrupts to set.
806 * Invokes the interrupt handler.
809 void cpu_interrupt(CPUState
*cpu
, int mask
);
813 * @cpu: The CPU to set the program counter for.
814 * @addr: Program counter value.
816 * Sets the program counter for a CPU.
818 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
820 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
822 cc
->set_pc(cpu
, addr
);
826 * cpu_reset_interrupt:
827 * @cpu: The CPU to clear the interrupt on.
828 * @mask: The interrupt mask to clear.
830 * Resets interrupts on the vCPU @cpu.
832 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
836 * @cpu: The CPU to exit.
838 * Requests the CPU @cpu to exit execution.
840 void cpu_exit(CPUState
*cpu
);
844 * @cpu: The CPU to resume.
846 * Resumes CPU, i.e. puts CPU into runnable state.
848 void cpu_resume(CPUState
*cpu
);
852 * @cpu: The CPU to remove.
854 * Requests the CPU to be removed and waits till it is removed.
856 void cpu_remove_sync(CPUState
*cpu
);
859 * process_queued_cpu_work() - process all items on CPU work queue
860 * @cpu: The CPU which work queue to process.
862 void process_queued_cpu_work(CPUState
*cpu
);
866 * @cpu: The CPU for the current thread.
868 * Record that a CPU has started execution and can be interrupted with
871 void cpu_exec_start(CPUState
*cpu
);
875 * @cpu: The CPU for the current thread.
877 * Record that a CPU has stopped execution and exclusive sections
878 * can be executed without interrupting it.
880 void cpu_exec_end(CPUState
*cpu
);
885 * Wait for a concurrent exclusive section to end, and then start
886 * a section of work that is run while other CPUs are not running
887 * between cpu_exec_start and cpu_exec_end. CPUs that are running
888 * cpu_exec are exited immediately. CPUs that call cpu_exec_start
889 * during the exclusive section go to sleep until this CPU calls
892 void start_exclusive(void);
897 * Concludes an exclusive execution section started by start_exclusive.
899 void end_exclusive(void);
903 * @cpu: The vCPU to initialize.
905 * Initializes a vCPU.
907 void qemu_init_vcpu(CPUState
*cpu
);
909 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
910 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
911 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
915 * @cpu: CPU to the flags for.
916 * @enabled: Flags to enable.
918 * Enables or disables single-stepping for @cpu.
920 void cpu_single_step(CPUState
*cpu
, int enabled
);
922 /* Breakpoint/watchpoint flags */
923 #define BP_MEM_READ 0x01
924 #define BP_MEM_WRITE 0x02
925 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
926 #define BP_STOP_BEFORE_ACCESS 0x04
927 /* 0x08 currently unused */
930 #define BP_ANY (BP_GDB | BP_CPU)
931 #define BP_WATCHPOINT_HIT_READ 0x40
932 #define BP_WATCHPOINT_HIT_WRITE 0x80
933 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
935 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
936 CPUBreakpoint
**breakpoint
);
937 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
938 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
939 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
941 /* Return true if PC matches an installed breakpoint. */
942 static inline bool cpu_breakpoint_test(CPUState
*cpu
, vaddr pc
, int mask
)
946 if (unlikely(!QTAILQ_EMPTY(&cpu
->breakpoints
))) {
947 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
948 if (bp
->pc
== pc
&& (bp
->flags
& mask
)) {
956 #ifdef CONFIG_USER_ONLY
957 static inline int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
958 int flags
, CPUWatchpoint
**watchpoint
)
963 static inline int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
964 vaddr len
, int flags
)
969 static inline void cpu_watchpoint_remove_by_ref(CPUState
*cpu
,
974 static inline void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
978 static inline void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
979 MemTxAttrs atr
, int fl
, uintptr_t ra
)
983 static inline int cpu_watchpoint_address_matches(CPUState
*cpu
,
984 vaddr addr
, vaddr len
)
989 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
990 int flags
, CPUWatchpoint
**watchpoint
);
991 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
992 vaddr len
, int flags
);
993 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
994 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
997 * cpu_check_watchpoint:
999 * @addr: guest virtual address
1000 * @len: access length
1001 * @attrs: memory access attributes
1002 * @flags: watchpoint access type
1003 * @ra: unwind return address
1005 * Check for a watchpoint hit in [addr, addr+len) of the type
1006 * specified by @flags. Exit via exception with a hit.
1008 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
1009 MemTxAttrs attrs
, int flags
, uintptr_t ra
);
1012 * cpu_watchpoint_address_matches:
1014 * @addr: guest virtual address
1015 * @len: access length
1017 * Return the watchpoint flags that apply to [addr, addr+len).
1018 * If no watchpoint is registered for the range, the result is 0.
1020 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
);
1024 * cpu_get_address_space:
1025 * @cpu: CPU to get address space from
1026 * @asidx: index identifying which address space to get
1028 * Return the requested address space of this CPU. @asidx
1029 * specifies which address space to read.
1031 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
);
1033 G_NORETURN
void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1034 G_GNUC_PRINTF(2, 3);
1036 /* $(top_srcdir)/cpu.c */
1037 void cpu_class_init_props(DeviceClass
*dc
);
1038 void cpu_exec_initfn(CPUState
*cpu
);
1039 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
);
1040 void cpu_exec_unrealizefn(CPUState
*cpu
);
1043 * target_words_bigendian:
1044 * Returns true if the (default) endianness of the target is big endian,
1045 * false otherwise. Note that in target-specific code, you can use
1046 * TARGET_BIG_ENDIAN directly instead. On the other hand, common
1047 * code should normally never need to know about the endianness of the
1048 * target, so please do *not* use this function unless you know very well
1049 * what you are doing!
1051 bool target_words_bigendian(void);
1053 void page_size_init(void);
1057 #ifdef CONFIG_SOFTMMU
1059 extern const VMStateDescription vmstate_cpu_common
;
1061 #define VMSTATE_CPU() { \
1062 .name = "parent_obj", \
1063 .size = sizeof(CPUState), \
1064 .vmsd = &vmstate_cpu_common, \
1065 .flags = VMS_STRUCT, \
1068 #endif /* CONFIG_SOFTMMU */
1070 #endif /* NEED_CPU_H */
1072 #define UNASSIGNED_CPU_INDEX -1
1073 #define UNASSIGNED_CLUSTER_INDEX -1