target/riscv/fpu_helper.c

   1 /*
   2  * RISC-V FPU Emulation Helpers for QEMU.
   3  *
   4  * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2 or later, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along with
  16  * this program.  If not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 #include "qemu/osdep.h"
  20 #include "cpu.h"
  21 #include "qemu/host-utils.h"
  22 #include "exec/exec-all.h"
  23 #include "exec/helper-proto.h"
  24 #include "fpu/softfloat.h"
  25 #include "internals.h"
  26
  27 target_ulong riscv_cpu_get_fflags(CPURISCVState *env)
  28 {
  29     int soft = get_float_exception_flags(&env->fp_status);
  30     target_ulong hard = 0;
  31
  32     hard |= (soft & float_flag_inexact) ? FPEXC_NX : 0;
  33     hard |= (soft & float_flag_underflow) ? FPEXC_UF : 0;
  34     hard |= (soft & float_flag_overflow) ? FPEXC_OF : 0;
  35     hard |= (soft & float_flag_divbyzero) ? FPEXC_DZ : 0;
  36     hard |= (soft & float_flag_invalid) ? FPEXC_NV : 0;
  37
  38     return hard;
  39 }
  40
  41 void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong hard)
  42 {
  43     int soft = 0;
  44
  45     soft |= (hard & FPEXC_NX) ? float_flag_inexact : 0;
  46     soft |= (hard & FPEXC_UF) ? float_flag_underflow : 0;
  47     soft |= (hard & FPEXC_OF) ? float_flag_overflow : 0;
  48     soft |= (hard & FPEXC_DZ) ? float_flag_divbyzero : 0;
  49     soft |= (hard & FPEXC_NV) ? float_flag_invalid : 0;
  50
  51     set_float_exception_flags(soft, &env->fp_status);
  52 }
  53
  54 void helper_set_rounding_mode(CPURISCVState *env, uint32_t rm)
  55 {
  56     int softrm;
  57
  58     if (rm == RISCV_FRM_DYN) {
  59         rm = env->frm;
  60     }
  61     switch (rm) {
  62     case RISCV_FRM_RNE:
  63         softrm = float_round_nearest_even;
  64         break;
  65     case RISCV_FRM_RTZ:
  66         softrm = float_round_to_zero;
  67         break;
  68     case RISCV_FRM_RDN:
  69         softrm = float_round_down;
  70         break;
  71     case RISCV_FRM_RUP:
  72         softrm = float_round_up;
  73         break;
  74     case RISCV_FRM_RMM:
  75         softrm = float_round_ties_away;
  76         break;
  77     default:
  78         riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
  79     }
  80
  81     set_float_rounding_mode(softrm, &env->fp_status);
  82 }
  83
  84 void helper_set_rod_rounding_mode(CPURISCVState *env)
  85 {
  86     set_float_rounding_mode(float_round_to_odd, &env->fp_status);
  87 }
  88
  89 static uint64_t do_fmadd_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2,
  90                            uint64_t rs3, int flags)
  91 {
  92     float16 frs1 = check_nanbox_h(rs1);
  93     float16 frs2 = check_nanbox_h(rs2);
  94     float16 frs3 = check_nanbox_h(rs3);
  95     return nanbox_h(float16_muladd(frs1, frs2, frs3, flags, &env->fp_status));
  96 }
  97
  98 static uint64_t do_fmadd_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2,
  99                            uint64_t rs3, int flags)
 100 {
 101     float32 frs1 = check_nanbox_s(rs1);
 102     float32 frs2 = check_nanbox_s(rs2);
 103     float32 frs3 = check_nanbox_s(rs3);
 104     return nanbox_s(float32_muladd(frs1, frs2, frs3, flags, &env->fp_status));
 105 }
 106
 107 uint64_t helper_fmadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 108                         uint64_t frs3)
 109 {
 110     return do_fmadd_s(env, frs1, frs2, frs3, 0);
 111 }
 112
 113 uint64_t helper_fmadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 114                         uint64_t frs3)
 115 {
 116     return float64_muladd(frs1, frs2, frs3, 0, &env->fp_status);
 117 }
 118
 119 uint64_t helper_fmadd_h(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 120                         uint64_t frs3)
 121 {
 122     return do_fmadd_h(env, frs1, frs2, frs3, 0);
 123 }
 124
 125 uint64_t helper_fmsub_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 126                         uint64_t frs3)
 127 {
 128     return do_fmadd_s(env, frs1, frs2, frs3, float_muladd_negate_c);
 129 }
 130
 131 uint64_t helper_fmsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 132                         uint64_t frs3)
 133 {
 134     return float64_muladd(frs1, frs2, frs3, float_muladd_negate_c,
 135                           &env->fp_status);
 136 }
 137
 138 uint64_t helper_fmsub_h(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 139                         uint64_t frs3)
 140 {
 141     return do_fmadd_h(env, frs1, frs2, frs3, float_muladd_negate_c);
 142 }
 143
 144 uint64_t helper_fnmsub_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 145                          uint64_t frs3)
 146 {
 147     return do_fmadd_s(env, frs1, frs2, frs3, float_muladd_negate_product);
 148 }
 149
 150 uint64_t helper_fnmsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 151                          uint64_t frs3)
 152 {
 153     return float64_muladd(frs1, frs2, frs3, float_muladd_negate_product,
 154                           &env->fp_status);
 155 }
 156
 157 uint64_t helper_fnmsub_h(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 158                          uint64_t frs3)
 159 {
 160     return do_fmadd_h(env, frs1, frs2, frs3, float_muladd_negate_product);
 161 }
 162
 163 uint64_t helper_fnmadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 164                          uint64_t frs3)
 165 {
 166     return do_fmadd_s(env, frs1, frs2, frs3,
 167                       float_muladd_negate_c | float_muladd_negate_product);
 168 }
 169
 170 uint64_t helper_fnmadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 171                          uint64_t frs3)
 172 {
 173     return float64_muladd(frs1, frs2, frs3, float_muladd_negate_c |
 174                           float_muladd_negate_product, &env->fp_status);
 175 }
 176
 177 uint64_t helper_fnmadd_h(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
 178                          uint64_t frs3)
 179 {
 180     return do_fmadd_h(env, frs1, frs2, frs3,
 181                       float_muladd_negate_c | float_muladd_negate_product);
 182 }
 183
 184 uint64_t helper_fadd_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 185 {
 186     float32 frs1 = check_nanbox_s(rs1);
 187     float32 frs2 = check_nanbox_s(rs2);
 188     return nanbox_s(float32_add(frs1, frs2, &env->fp_status));
 189 }
 190
 191 uint64_t helper_fsub_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 192 {
 193     float32 frs1 = check_nanbox_s(rs1);
 194     float32 frs2 = check_nanbox_s(rs2);
 195     return nanbox_s(float32_sub(frs1, frs2, &env->fp_status));
 196 }
 197
 198 uint64_t helper_fmul_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 199 {
 200     float32 frs1 = check_nanbox_s(rs1);
 201     float32 frs2 = check_nanbox_s(rs2);
 202     return nanbox_s(float32_mul(frs1, frs2, &env->fp_status));
 203 }
 204
 205 uint64_t helper_fdiv_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 206 {
 207     float32 frs1 = check_nanbox_s(rs1);
 208     float32 frs2 = check_nanbox_s(rs2);
 209     return nanbox_s(float32_div(frs1, frs2, &env->fp_status));
 210 }
 211
 212 uint64_t helper_fmin_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 213 {
 214     float32 frs1 = check_nanbox_s(rs1);
 215     float32 frs2 = check_nanbox_s(rs2);
 216     return nanbox_s(env->priv_ver < PRIV_VERSION_1_11_0 ?
 217                     float32_minnum(frs1, frs2, &env->fp_status) :
 218                     float32_minimum_number(frs1, frs2, &env->fp_status));
 219 }
 220
 221 uint64_t helper_fmax_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 222 {
 223     float32 frs1 = check_nanbox_s(rs1);
 224     float32 frs2 = check_nanbox_s(rs2);
 225     return nanbox_s(env->priv_ver < PRIV_VERSION_1_11_0 ?
 226                     float32_maxnum(frs1, frs2, &env->fp_status) :
 227                     float32_maximum_number(frs1, frs2, &env->fp_status));
 228 }
 229
 230 uint64_t helper_fsqrt_s(CPURISCVState *env, uint64_t rs1)
 231 {
 232     float32 frs1 = check_nanbox_s(rs1);
 233     return nanbox_s(float32_sqrt(frs1, &env->fp_status));
 234 }
 235
 236 target_ulong helper_fle_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 237 {
 238     float32 frs1 = check_nanbox_s(rs1);
 239     float32 frs2 = check_nanbox_s(rs2);
 240     return float32_le(frs1, frs2, &env->fp_status);
 241 }
 242
 243 target_ulong helper_flt_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 244 {
 245     float32 frs1 = check_nanbox_s(rs1);
 246     float32 frs2 = check_nanbox_s(rs2);
 247     return float32_lt(frs1, frs2, &env->fp_status);
 248 }
 249
 250 target_ulong helper_feq_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 251 {
 252     float32 frs1 = check_nanbox_s(rs1);
 253     float32 frs2 = check_nanbox_s(rs2);
 254     return float32_eq_quiet(frs1, frs2, &env->fp_status);
 255 }
 256
 257 target_ulong helper_fcvt_w_s(CPURISCVState *env, uint64_t rs1)
 258 {
 259     float32 frs1 = check_nanbox_s(rs1);
 260     return float32_to_int32(frs1, &env->fp_status);
 261 }
 262
 263 target_ulong helper_fcvt_wu_s(CPURISCVState *env, uint64_t rs1)
 264 {
 265     float32 frs1 = check_nanbox_s(rs1);
 266     return (int32_t)float32_to_uint32(frs1, &env->fp_status);
 267 }
 268
 269 target_ulong helper_fcvt_l_s(CPURISCVState *env, uint64_t rs1)
 270 {
 271     float32 frs1 = check_nanbox_s(rs1);
 272     return float32_to_int64(frs1, &env->fp_status);
 273 }
 274
 275 target_ulong helper_fcvt_lu_s(CPURISCVState *env, uint64_t rs1)
 276 {
 277     float32 frs1 = check_nanbox_s(rs1);
 278     return float32_to_uint64(frs1, &env->fp_status);
 279 }
 280
 281 uint64_t helper_fcvt_s_w(CPURISCVState *env, target_ulong rs1)
 282 {
 283     return nanbox_s(int32_to_float32((int32_t)rs1, &env->fp_status));
 284 }
 285
 286 uint64_t helper_fcvt_s_wu(CPURISCVState *env, target_ulong rs1)
 287 {
 288     return nanbox_s(uint32_to_float32((uint32_t)rs1, &env->fp_status));
 289 }
 290
 291 uint64_t helper_fcvt_s_l(CPURISCVState *env, target_ulong rs1)
 292 {
 293     return nanbox_s(int64_to_float32(rs1, &env->fp_status));
 294 }
 295
 296 uint64_t helper_fcvt_s_lu(CPURISCVState *env, target_ulong rs1)
 297 {
 298     return nanbox_s(uint64_to_float32(rs1, &env->fp_status));
 299 }
 300
 301 target_ulong helper_fclass_s(uint64_t rs1)
 302 {
 303     float32 frs1 = check_nanbox_s(rs1);
 304     return fclass_s(frs1);
 305 }
 306
 307 uint64_t helper_fadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
 308 {
 309     return float64_add(frs1, frs2, &env->fp_status);
 310 }
 311
 312 uint64_t helper_fsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
 313 {
 314     return float64_sub(frs1, frs2, &env->fp_status);
 315 }
 316
 317 uint64_t helper_fmul_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
 318 {
 319     return float64_mul(frs1, frs2, &env->fp_status);
 320 }
 321
 322 uint64_t helper_fdiv_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
 323 {
 324     return float64_div(frs1, frs2, &env->fp_status);
 325 }
 326
 327 uint64_t helper_fmin_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
 328 {
 329     return env->priv_ver < PRIV_VERSION_1_11_0 ?
 330             float64_minnum(frs1, frs2, &env->fp_status) :
 331             float64_minimum_number(frs1, frs2, &env->fp_status);
 332 }
 333
 334 uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
 335 {
 336     return env->priv_ver < PRIV_VERSION_1_11_0 ?
 337             float64_maxnum(frs1, frs2, &env->fp_status) :
 338             float64_maximum_number(frs1, frs2, &env->fp_status);
 339 }
 340
 341 uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1)
 342 {
 343     return nanbox_s(float64_to_float32(rs1, &env->fp_status));
 344 }
 345
 346 uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1)
 347 {
 348     float32 frs1 = check_nanbox_s(rs1);
 349     return float32_to_float64(frs1, &env->fp_status);
 350 }
 351
 352 uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t frs1)
 353 {
 354     return float64_sqrt(frs1, &env->fp_status);
 355 }
 356
 357 target_ulong helper_fle_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
 358 {
 359     return float64_le(frs1, frs2, &env->fp_status);
 360 }
 361
 362 target_ulong helper_flt_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
 363 {
 364     return float64_lt(frs1, frs2, &env->fp_status);
 365 }
 366
 367 target_ulong helper_feq_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
 368 {
 369     return float64_eq_quiet(frs1, frs2, &env->fp_status);
 370 }
 371
 372 target_ulong helper_fcvt_w_d(CPURISCVState *env, uint64_t frs1)
 373 {
 374     return float64_to_int32(frs1, &env->fp_status);
 375 }
 376
 377 target_ulong helper_fcvt_wu_d(CPURISCVState *env, uint64_t frs1)
 378 {
 379     return (int32_t)float64_to_uint32(frs1, &env->fp_status);
 380 }
 381
 382 target_ulong helper_fcvt_l_d(CPURISCVState *env, uint64_t frs1)
 383 {
 384     return float64_to_int64(frs1, &env->fp_status);
 385 }
 386
 387 target_ulong helper_fcvt_lu_d(CPURISCVState *env, uint64_t frs1)
 388 {
 389     return float64_to_uint64(frs1, &env->fp_status);
 390 }
 391
 392 uint64_t helper_fcvt_d_w(CPURISCVState *env, target_ulong rs1)
 393 {
 394     return int32_to_float64((int32_t)rs1, &env->fp_status);
 395 }
 396
 397 uint64_t helper_fcvt_d_wu(CPURISCVState *env, target_ulong rs1)
 398 {
 399     return uint32_to_float64((uint32_t)rs1, &env->fp_status);
 400 }
 401
 402 uint64_t helper_fcvt_d_l(CPURISCVState *env, target_ulong rs1)
 403 {
 404     return int64_to_float64(rs1, &env->fp_status);
 405 }
 406
 407 uint64_t helper_fcvt_d_lu(CPURISCVState *env, target_ulong rs1)
 408 {
 409     return uint64_to_float64(rs1, &env->fp_status);
 410 }
 411
 412 target_ulong helper_fclass_d(uint64_t frs1)
 413 {
 414     return fclass_d(frs1);
 415 }
 416
 417 uint64_t helper_fadd_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 418 {
 419     float16 frs1 = check_nanbox_h(rs1);
 420     float16 frs2 = check_nanbox_h(rs2);
 421     return nanbox_h(float16_add(frs1, frs2, &env->fp_status));
 422 }
 423
 424 uint64_t helper_fsub_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 425 {
 426     float16 frs1 = check_nanbox_h(rs1);
 427     float16 frs2 = check_nanbox_h(rs2);
 428     return nanbox_h(float16_sub(frs1, frs2, &env->fp_status));
 429 }
 430
 431 uint64_t helper_fmul_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 432 {
 433     float16 frs1 = check_nanbox_h(rs1);
 434     float16 frs2 = check_nanbox_h(rs2);
 435     return nanbox_h(float16_mul(frs1, frs2, &env->fp_status));
 436 }
 437
 438 uint64_t helper_fdiv_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 439 {
 440     float16 frs1 = check_nanbox_h(rs1);
 441     float16 frs2 = check_nanbox_h(rs2);
 442     return nanbox_h(float16_div(frs1, frs2, &env->fp_status));
 443 }
 444
 445 uint64_t helper_fmin_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 446 {
 447     float16 frs1 = check_nanbox_h(rs1);
 448     float16 frs2 = check_nanbox_h(rs2);
 449     return nanbox_h(env->priv_ver < PRIV_VERSION_1_11_0 ?
 450                     float16_minnum(frs1, frs2, &env->fp_status) :
 451                     float16_minimum_number(frs1, frs2, &env->fp_status));
 452 }
 453
 454 uint64_t helper_fmax_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 455 {
 456     float16 frs1 = check_nanbox_h(rs1);
 457     float16 frs2 = check_nanbox_h(rs2);
 458     return nanbox_h(env->priv_ver < PRIV_VERSION_1_11_0 ?
 459                     float16_maxnum(frs1, frs2, &env->fp_status) :
 460                     float16_maximum_number(frs1, frs2, &env->fp_status));
 461 }
 462
 463 uint64_t helper_fsqrt_h(CPURISCVState *env, uint64_t rs1)
 464 {
 465     float16 frs1 = check_nanbox_h(rs1);
 466     return nanbox_h(float16_sqrt(frs1, &env->fp_status));
 467 }
 468
 469 target_ulong helper_fle_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 470 {
 471     float16 frs1 = check_nanbox_h(rs1);
 472     float16 frs2 = check_nanbox_h(rs2);
 473     return float16_le(frs1, frs2, &env->fp_status);
 474 }
 475
 476 target_ulong helper_flt_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 477 {
 478     float16 frs1 = check_nanbox_h(rs1);
 479     float16 frs2 = check_nanbox_h(rs2);
 480     return float16_lt(frs1, frs2, &env->fp_status);
 481 }
 482
 483 target_ulong helper_feq_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
 484 {
 485     float16 frs1 = check_nanbox_h(rs1);
 486     float16 frs2 = check_nanbox_h(rs2);
 487     return float16_eq_quiet(frs1, frs2, &env->fp_status);
 488 }
 489
 490 target_ulong helper_fclass_h(uint64_t rs1)
 491 {
 492     float16 frs1 = check_nanbox_h(rs1);
 493     return fclass_h(frs1);
 494 }
 495
 496 target_ulong helper_fcvt_w_h(CPURISCVState *env, uint64_t rs1)
 497 {
 498     float16 frs1 = check_nanbox_h(rs1);
 499     return float16_to_int32(frs1, &env->fp_status);
 500 }
 501
 502 target_ulong helper_fcvt_wu_h(CPURISCVState *env, uint64_t rs1)
 503 {
 504     float16 frs1 = check_nanbox_h(rs1);
 505     return (int32_t)float16_to_uint32(frs1, &env->fp_status);
 506 }
 507
 508 target_ulong helper_fcvt_l_h(CPURISCVState *env, uint64_t rs1)
 509 {
 510     float16 frs1 = check_nanbox_h(rs1);
 511     return float16_to_int64(frs1, &env->fp_status);
 512 }
 513
 514 target_ulong helper_fcvt_lu_h(CPURISCVState *env, uint64_t rs1)
 515 {
 516     float16 frs1 = check_nanbox_h(rs1);
 517     return float16_to_uint64(frs1, &env->fp_status);
 518 }
 519
 520 uint64_t helper_fcvt_h_w(CPURISCVState *env, target_ulong rs1)
 521 {
 522     return nanbox_h(int32_to_float16((int32_t)rs1, &env->fp_status));
 523 }
 524
 525 uint64_t helper_fcvt_h_wu(CPURISCVState *env, target_ulong rs1)
 526 {
 527     return nanbox_h(uint32_to_float16((uint32_t)rs1, &env->fp_status));
 528 }
 529
 530 uint64_t helper_fcvt_h_l(CPURISCVState *env, target_ulong rs1)
 531 {
 532     return nanbox_h(int64_to_float16(rs1, &env->fp_status));
 533 }
 534
 535 uint64_t helper_fcvt_h_lu(CPURISCVState *env, target_ulong rs1)
 536 {
 537     return nanbox_h(uint64_to_float16(rs1, &env->fp_status));
 538 }
 539
 540 uint64_t helper_fcvt_h_s(CPURISCVState *env, uint64_t rs1)
 541 {
 542     float32 frs1 = check_nanbox_s(rs1);
 543     return nanbox_h(float32_to_float16(frs1, true, &env->fp_status));
 544 }
 545
 546 uint64_t helper_fcvt_s_h(CPURISCVState *env, uint64_t rs1)
 547 {
 548     float16 frs1 = check_nanbox_h(rs1);
 549     return nanbox_s(float16_to_float32(frs1, true, &env->fp_status));
 550 }
 551
 552 uint64_t helper_fcvt_h_d(CPURISCVState *env, uint64_t rs1)
 553 {
 554     return nanbox_h(float64_to_float16(rs1, true, &env->fp_status));
 555 }
 556
 557 uint64_t helper_fcvt_d_h(CPURISCVState *env, uint64_t rs1)
 558 {
 559     float16 frs1 = check_nanbox_h(rs1);
 560     return float16_to_float64(frs1, true, &env->fp_status);
 561 }