cpu-defs.h

   1 /*
   2  * common defines for all CPUs
   3  *
   4  * Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #ifndef CPU_DEFS_H
  21 #define CPU_DEFS_H
  22
  23 #include "config.h"
  24 #include <setjmp.h>
  25 #include <inttypes.h>
  26 #include "osdep.h"
  27
  28 #ifndef TARGET_LONG_BITS
  29 #error TARGET_LONG_BITS must be defined before including this header
  30 #endif
  31
  32 #define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8)
  33
  34 #if TARGET_LONG_SIZE == 4
  35 typedef int32_t target_long;
  36 typedef uint32_t target_ulong;
  37 #elif TARGET_LONG_SIZE == 8
  38 typedef int64_t target_long;
  39 typedef uint64_t target_ulong;
  40 #else
  41 #error TARGET_LONG_SIZE undefined
  42 #endif
  43
  44 #if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__)
  45 #define HOST_LONG_BITS 64
  46 #else
  47 #define HOST_LONG_BITS 32
  48 #endif
  49
  50 #define HOST_LONG_SIZE (HOST_LONG_BITS / 8)
  51
  52 #define EXCP_INTERRUPT  256 /* async interruption */
  53 #define EXCP_HLT        257 /* hlt instruction reached */
  54 #define EXCP_DEBUG      258 /* cpu stopped after a breakpoint or singlestep */
  55
  56 #define MAX_BREAKPOINTS 32
  57
  58 #define CPU_TLB_SIZE 256
  59
  60 typedef struct CPUTLBEntry {
  61     /* bit 31 to TARGET_PAGE_BITS : virtual address
  62        bit TARGET_PAGE_BITS-1..IO_MEM_SHIFT : if non zero, memory io
  63                                               zone number
  64        bit 3                      : indicates that the entry is invalid
  65        bit 2..0                   : zero
  66     */
  67     uint32_t address;
  68     /* addend to virtual address to get physical address */
  69     uint32_t addend;
  70 } CPUTLBEntry;
  71
  72 #endif