hw/rtc/twl92230.c

   1 /*
   2  * TI TWL92230C energy-management companion device for the OMAP24xx.
   3  * Aka. Menelaus (N4200 MENELAUS1_V2.2)
   4  *
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Written by Andrzej Zaborowski <andrew@openedhand.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 or
  11  * (at your option) version 3 of the License.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License along
  19  * with this program; if not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "qemu/timer.h"
  24 #include "hw/i2c/i2c.h"
  25 #include "hw/irq.h"
  26 #include "migration/qemu-file-types.h"
  27 #include "migration/vmstate.h"
  28 #include "sysemu/sysemu.h"
  29 #include "sysemu/rtc.h"
  30 #include "qemu/bcd.h"
  31 #include "qemu/module.h"
  32 #include "qom/object.h"
  33
  34 #define VERBOSE 1
  35
  36 #define TYPE_TWL92230 "twl92230"
  37 OBJECT_DECLARE_SIMPLE_TYPE(MenelausState, TWL92230)
  38
  39 struct MenelausState {
  40     I2CSlave parent_obj;
  41
  42     int firstbyte;
  43     uint8_t reg;
  44
  45     uint8_t vcore[5];
  46     uint8_t dcdc[3];
  47     uint8_t ldo[8];
  48     uint8_t sleep[2];
  49     uint8_t osc;
  50     uint8_t detect;
  51     uint16_t mask;
  52     uint16_t status;
  53     uint8_t dir;
  54     uint8_t inputs;
  55     uint8_t outputs;
  56     uint8_t bbsms;
  57     uint8_t pull[4];
  58     uint8_t mmc_ctrl[3];
  59     uint8_t mmc_debounce;
  60     struct {
  61         uint8_t ctrl;
  62         uint16_t comp;
  63         QEMUTimer *hz_tm;
  64         int64_t next;
  65         struct tm tm;
  66         struct tm new;
  67         struct tm alm;
  68         int sec_offset;
  69         int alm_sec;
  70         int next_comp;
  71     } rtc;
  72     uint16_t rtc_next_vmstate;
  73     qemu_irq out[4];
  74     uint8_t pwrbtn_state;
  75 };
  76
  77 static inline void menelaus_update(MenelausState *s)
  78 {
  79     qemu_set_irq(s->out[3], s->status & ~s->mask);
  80 }
  81
  82 static inline void menelaus_rtc_start(MenelausState *s)
  83 {
  84     s->rtc.next += qemu_clock_get_ms(rtc_clock);
  85     timer_mod(s->rtc.hz_tm, s->rtc.next);
  86 }
  87
  88 static inline void menelaus_rtc_stop(MenelausState *s)
  89 {
  90     timer_del(s->rtc.hz_tm);
  91     s->rtc.next -= qemu_clock_get_ms(rtc_clock);
  92     if (s->rtc.next < 1)
  93         s->rtc.next = 1;
  94 }
  95
  96 static void menelaus_rtc_update(MenelausState *s)
  97 {
  98     qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset);
  99 }
 100
 101 static void menelaus_alm_update(MenelausState *s)
 102 {
 103     if ((s->rtc.ctrl & 3) == 3)
 104         s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset;
 105 }
 106
 107 static void menelaus_rtc_hz(void *opaque)
 108 {
 109     MenelausState *s = (MenelausState *) opaque;
 110
 111     s->rtc.next_comp --;
 112     s->rtc.alm_sec --;
 113     s->rtc.next += 1000;
 114     timer_mod(s->rtc.hz_tm, s->rtc.next);
 115     if ((s->rtc.ctrl >> 3) & 3) {                               /* EVERY */
 116         menelaus_rtc_update(s);
 117         if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec)
 118             s->status |= 1 << 8;                                /* RTCTMR */
 119         else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min)
 120             s->status |= 1 << 8;                                /* RTCTMR */
 121         else if (!s->rtc.tm.tm_hour)
 122             s->status |= 1 << 8;                                /* RTCTMR */
 123     } else
 124         s->status |= 1 << 8;                                    /* RTCTMR */
 125     if ((s->rtc.ctrl >> 1) & 1) {                               /* RTC_AL_EN */
 126         if (s->rtc.alm_sec == 0)
 127             s->status |= 1 << 9;                                /* RTCALM */
 128         /* TODO: wake-up */
 129     }
 130     if (s->rtc.next_comp <= 0) {
 131         s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000);
 132         s->rtc.next_comp = 3600;
 133     }
 134     menelaus_update(s);
 135 }
 136
 137 static void menelaus_reset(I2CSlave *i2c)
 138 {
 139     MenelausState *s = TWL92230(i2c);
 140
 141     s->reg = 0x00;
 142
 143     s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check!  */
 144     s->vcore[1] = 0x05;
 145     s->vcore[2] = 0x02;
 146     s->vcore[3] = 0x0c;
 147     s->vcore[4] = 0x03;
 148     s->dcdc[0] = 0x33;  /* Depends on wiring */
 149     s->dcdc[1] = 0x03;
 150     s->dcdc[2] = 0x00;
 151     s->ldo[0] = 0x95;
 152     s->ldo[1] = 0x7e;
 153     s->ldo[2] = 0x00;
 154     s->ldo[3] = 0x00;   /* Depends on wiring */
 155     s->ldo[4] = 0x03;   /* Depends on wiring */
 156     s->ldo[5] = 0x00;
 157     s->ldo[6] = 0x00;
 158     s->ldo[7] = 0x00;
 159     s->sleep[0] = 0x00;
 160     s->sleep[1] = 0x00;
 161     s->osc = 0x01;
 162     s->detect = 0x09;
 163     s->mask = 0x0fff;
 164     s->status = 0;
 165     s->dir = 0x07;
 166     s->outputs = 0x00;
 167     s->bbsms = 0x00;
 168     s->pull[0] = 0x00;
 169     s->pull[1] = 0x00;
 170     s->pull[2] = 0x00;
 171     s->pull[3] = 0x00;
 172     s->mmc_ctrl[0] = 0x03;
 173     s->mmc_ctrl[1] = 0xc0;
 174     s->mmc_ctrl[2] = 0x00;
 175     s->mmc_debounce = 0x05;
 176
 177     if (s->rtc.ctrl & 1)
 178         menelaus_rtc_stop(s);
 179     s->rtc.ctrl = 0x00;
 180     s->rtc.comp = 0x0000;
 181     s->rtc.next = 1000;
 182     s->rtc.sec_offset = 0;
 183     s->rtc.next_comp = 1800;
 184     s->rtc.alm_sec = 1800;
 185     s->rtc.alm.tm_sec = 0x00;
 186     s->rtc.alm.tm_min = 0x00;
 187     s->rtc.alm.tm_hour = 0x00;
 188     s->rtc.alm.tm_mday = 0x01;
 189     s->rtc.alm.tm_mon = 0x00;
 190     s->rtc.alm.tm_year = 2004;
 191     menelaus_update(s);
 192 }
 193
 194 static void menelaus_gpio_set(void *opaque, int line, int level)
 195 {
 196     MenelausState *s = (MenelausState *) opaque;
 197
 198     if (line < 3) {
 199         /* No interrupt generated */
 200         s->inputs &= ~(1 << line);
 201         s->inputs |= level << line;
 202         return;
 203     }
 204
 205     if (!s->pwrbtn_state && level) {
 206         s->status |= 1 << 11;                                   /* PSHBTN */
 207         menelaus_update(s);
 208     }
 209     s->pwrbtn_state = level;
 210 }
 211
 212 #define MENELAUS_REV            0x01
 213 #define MENELAUS_VCORE_CTRL1    0x02
 214 #define MENELAUS_VCORE_CTRL2    0x03
 215 #define MENELAUS_VCORE_CTRL3    0x04
 216 #define MENELAUS_VCORE_CTRL4    0x05
 217 #define MENELAUS_VCORE_CTRL5    0x06
 218 #define MENELAUS_DCDC_CTRL1     0x07
 219 #define MENELAUS_DCDC_CTRL2     0x08
 220 #define MENELAUS_DCDC_CTRL3     0x09
 221 #define MENELAUS_LDO_CTRL1      0x0a
 222 #define MENELAUS_LDO_CTRL2      0x0b
 223 #define MENELAUS_LDO_CTRL3      0x0c
 224 #define MENELAUS_LDO_CTRL4      0x0d
 225 #define MENELAUS_LDO_CTRL5      0x0e
 226 #define MENELAUS_LDO_CTRL6      0x0f
 227 #define MENELAUS_LDO_CTRL7      0x10
 228 #define MENELAUS_LDO_CTRL8      0x11
 229 #define MENELAUS_SLEEP_CTRL1    0x12
 230 #define MENELAUS_SLEEP_CTRL2    0x13
 231 #define MENELAUS_DEVICE_OFF     0x14
 232 #define MENELAUS_OSC_CTRL       0x15
 233 #define MENELAUS_DETECT_CTRL    0x16
 234 #define MENELAUS_INT_MASK1      0x17
 235 #define MENELAUS_INT_MASK2      0x18
 236 #define MENELAUS_INT_STATUS1    0x19
 237 #define MENELAUS_INT_STATUS2    0x1a
 238 #define MENELAUS_INT_ACK1       0x1b
 239 #define MENELAUS_INT_ACK2       0x1c
 240 #define MENELAUS_GPIO_CTRL      0x1d
 241 #define MENELAUS_GPIO_IN        0x1e
 242 #define MENELAUS_GPIO_OUT       0x1f
 243 #define MENELAUS_BBSMS          0x20
 244 #define MENELAUS_RTC_CTRL       0x21
 245 #define MENELAUS_RTC_UPDATE     0x22
 246 #define MENELAUS_RTC_SEC        0x23
 247 #define MENELAUS_RTC_MIN        0x24
 248 #define MENELAUS_RTC_HR         0x25
 249 #define MENELAUS_RTC_DAY        0x26
 250 #define MENELAUS_RTC_MON        0x27
 251 #define MENELAUS_RTC_YR         0x28
 252 #define MENELAUS_RTC_WKDAY      0x29
 253 #define MENELAUS_RTC_AL_SEC     0x2a
 254 #define MENELAUS_RTC_AL_MIN     0x2b
 255 #define MENELAUS_RTC_AL_HR      0x2c
 256 #define MENELAUS_RTC_AL_DAY     0x2d
 257 #define MENELAUS_RTC_AL_MON     0x2e
 258 #define MENELAUS_RTC_AL_YR      0x2f
 259 #define MENELAUS_RTC_COMP_MSB   0x30
 260 #define MENELAUS_RTC_COMP_LSB   0x31
 261 #define MENELAUS_S1_PULL_EN     0x32
 262 #define MENELAUS_S1_PULL_DIR    0x33
 263 #define MENELAUS_S2_PULL_EN     0x34
 264 #define MENELAUS_S2_PULL_DIR    0x35
 265 #define MENELAUS_MCT_CTRL1      0x36
 266 #define MENELAUS_MCT_CTRL2      0x37
 267 #define MENELAUS_MCT_CTRL3      0x38
 268 #define MENELAUS_MCT_PIN_ST     0x39
 269 #define MENELAUS_DEBOUNCE1      0x3a
 270
 271 static uint8_t menelaus_read(void *opaque, uint8_t addr)
 272 {
 273     MenelausState *s = (MenelausState *) opaque;
 274
 275     switch (addr) {
 276     case MENELAUS_REV:
 277         return 0x22;
 278
 279     case MENELAUS_VCORE_CTRL1 ... MENELAUS_VCORE_CTRL5:
 280         return s->vcore[addr - MENELAUS_VCORE_CTRL1];
 281
 282     case MENELAUS_DCDC_CTRL1 ... MENELAUS_DCDC_CTRL3:
 283         return s->dcdc[addr - MENELAUS_DCDC_CTRL1];
 284
 285     case MENELAUS_LDO_CTRL1 ... MENELAUS_LDO_CTRL8:
 286         return s->ldo[addr - MENELAUS_LDO_CTRL1];
 287
 288     case MENELAUS_SLEEP_CTRL1:
 289     case MENELAUS_SLEEP_CTRL2:
 290         return s->sleep[addr - MENELAUS_SLEEP_CTRL1];
 291
 292     case MENELAUS_DEVICE_OFF:
 293         return 0;
 294
 295     case MENELAUS_OSC_CTRL:
 296         return s->osc | (1 << 7);                       /* CLK32K_GOOD */
 297
 298     case MENELAUS_DETECT_CTRL:
 299         return s->detect;
 300
 301     case MENELAUS_INT_MASK1:
 302         return (s->mask >> 0) & 0xff;
 303     case MENELAUS_INT_MASK2:
 304         return (s->mask >> 8) & 0xff;
 305
 306     case MENELAUS_INT_STATUS1:
 307         return (s->status >> 0) & 0xff;
 308     case MENELAUS_INT_STATUS2:
 309         return (s->status >> 8) & 0xff;
 310
 311     case MENELAUS_INT_ACK1:
 312     case MENELAUS_INT_ACK2:
 313         return 0;
 314
 315     case MENELAUS_GPIO_CTRL:
 316         return s->dir;
 317     case MENELAUS_GPIO_IN:
 318         return s->inputs | (~s->dir & s->outputs);
 319     case MENELAUS_GPIO_OUT:
 320         return s->outputs;
 321
 322     case MENELAUS_BBSMS:
 323         return s->bbsms;
 324
 325     case MENELAUS_RTC_CTRL:
 326         return s->rtc.ctrl;
 327     case MENELAUS_RTC_UPDATE:
 328         return 0x00;
 329     case MENELAUS_RTC_SEC:
 330         menelaus_rtc_update(s);
 331         return to_bcd(s->rtc.tm.tm_sec);
 332     case MENELAUS_RTC_MIN:
 333         menelaus_rtc_update(s);
 334         return to_bcd(s->rtc.tm.tm_min);
 335     case MENELAUS_RTC_HR:
 336         menelaus_rtc_update(s);
 337         if ((s->rtc.ctrl >> 2) & 1)                     /* MODE12_n24 */
 338             return to_bcd((s->rtc.tm.tm_hour % 12) + 1) |
 339                     (!!(s->rtc.tm.tm_hour >= 12) << 7); /* PM_nAM */
 340         else
 341             return to_bcd(s->rtc.tm.tm_hour);
 342     case MENELAUS_RTC_DAY:
 343         menelaus_rtc_update(s);
 344         return to_bcd(s->rtc.tm.tm_mday);
 345     case MENELAUS_RTC_MON:
 346         menelaus_rtc_update(s);
 347         return to_bcd(s->rtc.tm.tm_mon + 1);
 348     case MENELAUS_RTC_YR:
 349         menelaus_rtc_update(s);
 350         return to_bcd(s->rtc.tm.tm_year - 2000);
 351     case MENELAUS_RTC_WKDAY:
 352         menelaus_rtc_update(s);
 353         return to_bcd(s->rtc.tm.tm_wday);
 354     case MENELAUS_RTC_AL_SEC:
 355         return to_bcd(s->rtc.alm.tm_sec);
 356     case MENELAUS_RTC_AL_MIN:
 357         return to_bcd(s->rtc.alm.tm_min);
 358     case MENELAUS_RTC_AL_HR:
 359         if ((s->rtc.ctrl >> 2) & 1)                     /* MODE12_n24 */
 360             return to_bcd((s->rtc.alm.tm_hour % 12) + 1) |
 361                     (!!(s->rtc.alm.tm_hour >= 12) << 7);/* AL_PM_nAM */
 362         else
 363             return to_bcd(s->rtc.alm.tm_hour);
 364     case MENELAUS_RTC_AL_DAY:
 365         return to_bcd(s->rtc.alm.tm_mday);
 366     case MENELAUS_RTC_AL_MON:
 367         return to_bcd(s->rtc.alm.tm_mon + 1);
 368     case MENELAUS_RTC_AL_YR:
 369         return to_bcd(s->rtc.alm.tm_year - 2000);
 370     case MENELAUS_RTC_COMP_MSB:
 371         return (s->rtc.comp >> 8) & 0xff;
 372     case MENELAUS_RTC_COMP_LSB:
 373         return (s->rtc.comp >> 0) & 0xff;
 374
 375     case MENELAUS_S1_PULL_EN:
 376         return s->pull[0];
 377     case MENELAUS_S1_PULL_DIR:
 378         return s->pull[1];
 379     case MENELAUS_S2_PULL_EN:
 380         return s->pull[2];
 381     case MENELAUS_S2_PULL_DIR:
 382         return s->pull[3];
 383
 384     case MENELAUS_MCT_CTRL1 ... MENELAUS_MCT_CTRL3:
 385         return s->mmc_ctrl[addr - MENELAUS_MCT_CTRL1];
 386     case MENELAUS_MCT_PIN_ST:
 387         /* TODO: return the real Card Detect */
 388         return 0;
 389     case MENELAUS_DEBOUNCE1:
 390         return s->mmc_debounce;
 391
 392     default:
 393 #ifdef VERBOSE
 394         printf("%s: unknown register %02x\n", __func__, addr);
 395 #endif
 396         break;
 397     }
 398     return 0;
 399 }
 400
 401 static void menelaus_write(void *opaque, uint8_t addr, uint8_t value)
 402 {
 403     MenelausState *s = (MenelausState *) opaque;
 404     int line;
 405     struct tm tm;
 406
 407     switch (addr) {
 408     case MENELAUS_VCORE_CTRL1:
 409         s->vcore[0] = (value & 0xe) | MIN(value & 0x1f, 0x12);
 410         break;
 411     case MENELAUS_VCORE_CTRL2:
 412         s->vcore[1] = value;
 413         break;
 414     case MENELAUS_VCORE_CTRL3:
 415         s->vcore[2] = MIN(value & 0x1f, 0x12);
 416         break;
 417     case MENELAUS_VCORE_CTRL4:
 418         s->vcore[3] = MIN(value & 0x1f, 0x12);
 419         break;
 420     case MENELAUS_VCORE_CTRL5:
 421         s->vcore[4] = value & 3;
 422         /* XXX
 423          * auto set to 3 on M_Active, nRESWARM
 424          * auto set to 0 on M_WaitOn, M_Backup
 425          */
 426         break;
 427
 428     case MENELAUS_DCDC_CTRL1:
 429         s->dcdc[0] = value & 0x3f;
 430         break;
 431     case MENELAUS_DCDC_CTRL2:
 432         s->dcdc[1] = value & 0x07;
 433         /* XXX
 434          * auto set to 3 on M_Active, nRESWARM
 435          * auto set to 0 on M_WaitOn, M_Backup
 436          */
 437         break;
 438     case MENELAUS_DCDC_CTRL3:
 439         s->dcdc[2] = value & 0x07;
 440         break;
 441
 442     case MENELAUS_LDO_CTRL1:
 443         s->ldo[0] = value;
 444         break;
 445     case MENELAUS_LDO_CTRL2:
 446         s->ldo[1] = value & 0x7f;
 447         /* XXX
 448          * auto set to 0x7e on M_WaitOn, M_Backup
 449          */
 450         break;
 451     case MENELAUS_LDO_CTRL3:
 452         s->ldo[2] = value & 3;
 453         /* XXX
 454          * auto set to 3 on M_Active, nRESWARM
 455          * auto set to 0 on M_WaitOn, M_Backup
 456          */
 457         break;
 458     case MENELAUS_LDO_CTRL4:
 459         s->ldo[3] = value & 3;
 460         /* XXX
 461          * auto set to 3 on M_Active, nRESWARM
 462          * auto set to 0 on M_WaitOn, M_Backup
 463          */
 464         break;
 465     case MENELAUS_LDO_CTRL5:
 466         s->ldo[4] = value & 3;
 467         /* XXX
 468          * auto set to 3 on M_Active, nRESWARM
 469          * auto set to 0 on M_WaitOn, M_Backup
 470          */
 471         break;
 472     case MENELAUS_LDO_CTRL6:
 473         s->ldo[5] = value & 3;
 474         break;
 475     case MENELAUS_LDO_CTRL7:
 476         s->ldo[6] = value & 3;
 477         break;
 478     case MENELAUS_LDO_CTRL8:
 479         s->ldo[7] = value & 3;
 480         break;
 481
 482     case MENELAUS_SLEEP_CTRL1:
 483     case MENELAUS_SLEEP_CTRL2:
 484         s->sleep[addr - MENELAUS_SLEEP_CTRL1] = value;
 485         break;
 486
 487     case MENELAUS_DEVICE_OFF:
 488         if (value & 1) {
 489             menelaus_reset(I2C_SLAVE(s));
 490         }
 491         break;
 492
 493     case MENELAUS_OSC_CTRL:
 494         s->osc = value & 7;
 495         break;
 496
 497     case MENELAUS_DETECT_CTRL:
 498         s->detect = value & 0x7f;
 499         break;
 500
 501     case MENELAUS_INT_MASK1:
 502         s->mask &= 0xf00;
 503         s->mask |= value << 0;
 504         menelaus_update(s);
 505         break;
 506     case MENELAUS_INT_MASK2:
 507         s->mask &= 0x0ff;
 508         s->mask |= value << 8;
 509         menelaus_update(s);
 510         break;
 511
 512     case MENELAUS_INT_ACK1:
 513         s->status &= ~(((uint16_t) value) << 0);
 514         menelaus_update(s);
 515         break;
 516     case MENELAUS_INT_ACK2:
 517         s->status &= ~(((uint16_t) value) << 8);
 518         menelaus_update(s);
 519         break;
 520
 521     case MENELAUS_GPIO_CTRL:
 522         for (line = 0; line < 3; line ++) {
 523             if (((s->dir ^ value) >> line) & 1) {
 524                 qemu_set_irq(s->out[line],
 525                              ((s->outputs & ~s->dir) >> line) & 1);
 526             }
 527         }
 528         s->dir = value & 0x67;
 529         break;
 530     case MENELAUS_GPIO_OUT:
 531         for (line = 0; line < 3; line ++) {
 532             if ((((s->outputs ^ value) & ~s->dir) >> line) & 1) {
 533                 qemu_set_irq(s->out[line], (s->outputs >> line) & 1);
 534             }
 535         }
 536         s->outputs = value & 0x07;
 537         break;
 538
 539     case MENELAUS_BBSMS:
 540         s->bbsms = 0x0d;
 541         break;
 542
 543     case MENELAUS_RTC_CTRL:
 544         if ((s->rtc.ctrl ^ value) & 1) {                        /* RTC_EN */
 545             if (value & 1)
 546                 menelaus_rtc_start(s);
 547             else
 548                 menelaus_rtc_stop(s);
 549         }
 550         s->rtc.ctrl = value & 0x1f;
 551         menelaus_alm_update(s);
 552         break;
 553     case MENELAUS_RTC_UPDATE:
 554         menelaus_rtc_update(s);
 555         memcpy(&tm, &s->rtc.tm, sizeof(tm));
 556         switch (value & 0xf) {
 557         case 0:
 558             break;
 559         case 1:
 560             tm.tm_sec = s->rtc.new.tm_sec;
 561             break;
 562         case 2:
 563             tm.tm_min = s->rtc.new.tm_min;
 564             break;
 565         case 3:
 566             if (s->rtc.new.tm_hour > 23)
 567                 goto rtc_badness;
 568             tm.tm_hour = s->rtc.new.tm_hour;
 569             break;
 570         case 4:
 571             if (s->rtc.new.tm_mday < 1)
 572                 goto rtc_badness;
 573             /* TODO check range */
 574             tm.tm_mday = s->rtc.new.tm_mday;
 575             break;
 576         case 5:
 577             if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
 578                 goto rtc_badness;
 579             tm.tm_mon = s->rtc.new.tm_mon;
 580             break;
 581         case 6:
 582             tm.tm_year = s->rtc.new.tm_year;
 583             break;
 584         case 7:
 585             /* TODO set .tm_mday instead */
 586             tm.tm_wday = s->rtc.new.tm_wday;
 587             break;
 588         case 8:
 589             if (s->rtc.new.tm_hour > 23)
 590                 goto rtc_badness;
 591             if (s->rtc.new.tm_mday < 1)
 592                 goto rtc_badness;
 593             if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
 594                 goto rtc_badness;
 595             tm.tm_sec = s->rtc.new.tm_sec;
 596             tm.tm_min = s->rtc.new.tm_min;
 597             tm.tm_hour = s->rtc.new.tm_hour;
 598             tm.tm_mday = s->rtc.new.tm_mday;
 599             tm.tm_mon = s->rtc.new.tm_mon;
 600             tm.tm_year = s->rtc.new.tm_year;
 601             break;
 602         rtc_badness:
 603         default:
 604             fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n",
 605                             __func__, value);
 606             s->status |= 1 << 10;                               /* RTCERR */
 607             menelaus_update(s);
 608         }
 609         s->rtc.sec_offset = qemu_timedate_diff(&tm);
 610         break;
 611     case MENELAUS_RTC_SEC:
 612         s->rtc.tm.tm_sec = from_bcd(value & 0x7f);
 613         break;
 614     case MENELAUS_RTC_MIN:
 615         s->rtc.tm.tm_min = from_bcd(value & 0x7f);
 616         break;
 617     case MENELAUS_RTC_HR:
 618         s->rtc.tm.tm_hour = (s->rtc.ctrl & (1 << 2)) ?  /* MODE12_n24 */
 619                 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
 620                 from_bcd(value & 0x3f);
 621         break;
 622     case MENELAUS_RTC_DAY:
 623         s->rtc.tm.tm_mday = from_bcd(value);
 624         break;
 625     case MENELAUS_RTC_MON:
 626         s->rtc.tm.tm_mon = MAX(1, from_bcd(value)) - 1;
 627         break;
 628     case MENELAUS_RTC_YR:
 629         s->rtc.tm.tm_year = 2000 + from_bcd(value);
 630         break;
 631     case MENELAUS_RTC_WKDAY:
 632         s->rtc.tm.tm_mday = from_bcd(value);
 633         break;
 634     case MENELAUS_RTC_AL_SEC:
 635         s->rtc.alm.tm_sec = from_bcd(value & 0x7f);
 636         menelaus_alm_update(s);
 637         break;
 638     case MENELAUS_RTC_AL_MIN:
 639         s->rtc.alm.tm_min = from_bcd(value & 0x7f);
 640         menelaus_alm_update(s);
 641         break;
 642     case MENELAUS_RTC_AL_HR:
 643         s->rtc.alm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
 644                 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
 645                 from_bcd(value & 0x3f);
 646         menelaus_alm_update(s);
 647         break;
 648     case MENELAUS_RTC_AL_DAY:
 649         s->rtc.alm.tm_mday = from_bcd(value);
 650         menelaus_alm_update(s);
 651         break;
 652     case MENELAUS_RTC_AL_MON:
 653         s->rtc.alm.tm_mon = MAX(1, from_bcd(value)) - 1;
 654         menelaus_alm_update(s);
 655         break;
 656     case MENELAUS_RTC_AL_YR:
 657         s->rtc.alm.tm_year = 2000 + from_bcd(value);
 658         menelaus_alm_update(s);
 659         break;
 660     case MENELAUS_RTC_COMP_MSB:
 661         s->rtc.comp &= 0xff;
 662         s->rtc.comp |= value << 8;
 663         break;
 664     case MENELAUS_RTC_COMP_LSB:
 665         s->rtc.comp &= 0xff << 8;
 666         s->rtc.comp |= value;
 667         break;
 668
 669     case MENELAUS_S1_PULL_EN:
 670         s->pull[0] = value;
 671         break;
 672     case MENELAUS_S1_PULL_DIR:
 673         s->pull[1] = value & 0x1f;
 674         break;
 675     case MENELAUS_S2_PULL_EN:
 676         s->pull[2] = value;
 677         break;
 678     case MENELAUS_S2_PULL_DIR:
 679         s->pull[3] = value & 0x1f;
 680         break;
 681
 682     case MENELAUS_MCT_CTRL1:
 683         s->mmc_ctrl[0] = value & 0x7f;
 684         break;
 685     case MENELAUS_MCT_CTRL2:
 686         s->mmc_ctrl[1] = value;
 687         /* TODO update Card Detect interrupts */
 688         break;
 689     case MENELAUS_MCT_CTRL3:
 690         s->mmc_ctrl[2] = value & 0xf;
 691         break;
 692     case MENELAUS_DEBOUNCE1:
 693         s->mmc_debounce = value & 0x3f;
 694         break;
 695
 696     default:
 697 #ifdef VERBOSE
 698         printf("%s: unknown register %02x\n", __func__, addr);
 699 #endif
 700         break;
 701     }
 702 }
 703
 704 static int menelaus_event(I2CSlave *i2c, enum i2c_event event)
 705 {
 706     MenelausState *s = TWL92230(i2c);
 707
 708     if (event == I2C_START_SEND)
 709         s->firstbyte = 1;
 710
 711     return 0;
 712 }
 713
 714 static int menelaus_tx(I2CSlave *i2c, uint8_t data)
 715 {
 716     MenelausState *s = TWL92230(i2c);
 717
 718     /* Interpret register address byte */
 719     if (s->firstbyte) {
 720         s->reg = data;
 721         s->firstbyte = 0;
 722     } else
 723         menelaus_write(s, s->reg ++, data);
 724
 725     return 0;
 726 }
 727
 728 static uint8_t menelaus_rx(I2CSlave *i2c)
 729 {
 730     MenelausState *s = TWL92230(i2c);
 731
 732     return menelaus_read(s, s->reg ++);
 733 }
 734
 735 /* Save restore 32 bit int as uint16_t
 736    This is a Big hack, but it is how the old state did it.
 737    Or we broke compatibility in the state, or we can't use struct tm
 738  */
 739
 740 static int get_int32_as_uint16(QEMUFile *f, void *pv, size_t size,
 741                                const VMStateField *field)
 742 {
 743     int *v = pv;
 744     *v = qemu_get_be16(f);
 745     return 0;
 746 }
 747
 748 static int put_int32_as_uint16(QEMUFile *f, void *pv, size_t size,
 749                                const VMStateField *field, JSONWriter *vmdesc)
 750 {
 751     int *v = pv;
 752     qemu_put_be16(f, *v);
 753
 754     return 0;
 755 }
 756
 757 static const VMStateInfo vmstate_hack_int32_as_uint16 = {
 758     .name = "int32_as_uint16",
 759     .get  = get_int32_as_uint16,
 760     .put  = put_int32_as_uint16,
 761 };
 762
 763 #define VMSTATE_UINT16_HACK(_f, _s)                                  \
 764     VMSTATE_SINGLE(_f, _s, 0, vmstate_hack_int32_as_uint16, int32_t)
 765
 766
 767 static const VMStateDescription vmstate_menelaus_tm = {
 768     .name = "menelaus_tm",
 769     .version_id = 0,
 770     .minimum_version_id = 0,
 771     .fields = (VMStateField[]) {
 772         VMSTATE_UINT16_HACK(tm_sec, struct tm),
 773         VMSTATE_UINT16_HACK(tm_min, struct tm),
 774         VMSTATE_UINT16_HACK(tm_hour, struct tm),
 775         VMSTATE_UINT16_HACK(tm_mday, struct tm),
 776         VMSTATE_UINT16_HACK(tm_min, struct tm),
 777         VMSTATE_UINT16_HACK(tm_year, struct tm),
 778         VMSTATE_END_OF_LIST()
 779     }
 780 };
 781
 782 static int menelaus_pre_save(void *opaque)
 783 {
 784     MenelausState *s = opaque;
 785     /* Should be <= 1000 */
 786     s->rtc_next_vmstate =  s->rtc.next - qemu_clock_get_ms(rtc_clock);
 787
 788     return 0;
 789 }
 790
 791 static int menelaus_post_load(void *opaque, int version_id)
 792 {
 793     MenelausState *s = opaque;
 794
 795     if (s->rtc.ctrl & 1)                                        /* RTC_EN */
 796         menelaus_rtc_stop(s);
 797
 798     s->rtc.next = s->rtc_next_vmstate;
 799
 800     menelaus_alm_update(s);
 801     menelaus_update(s);
 802     if (s->rtc.ctrl & 1)                                        /* RTC_EN */
 803         menelaus_rtc_start(s);
 804     return 0;
 805 }
 806
 807 static const VMStateDescription vmstate_menelaus = {
 808     .name = "menelaus",
 809     .version_id = 0,
 810     .minimum_version_id = 0,
 811     .pre_save = menelaus_pre_save,
 812     .post_load = menelaus_post_load,
 813     .fields = (VMStateField[]) {
 814         VMSTATE_INT32(firstbyte, MenelausState),
 815         VMSTATE_UINT8(reg, MenelausState),
 816         VMSTATE_UINT8_ARRAY(vcore, MenelausState, 5),
 817         VMSTATE_UINT8_ARRAY(dcdc, MenelausState, 3),
 818         VMSTATE_UINT8_ARRAY(ldo, MenelausState, 8),
 819         VMSTATE_UINT8_ARRAY(sleep, MenelausState, 2),
 820         VMSTATE_UINT8(osc, MenelausState),
 821         VMSTATE_UINT8(detect, MenelausState),
 822         VMSTATE_UINT16(mask, MenelausState),
 823         VMSTATE_UINT16(status, MenelausState),
 824         VMSTATE_UINT8(dir, MenelausState),
 825         VMSTATE_UINT8(inputs, MenelausState),
 826         VMSTATE_UINT8(outputs, MenelausState),
 827         VMSTATE_UINT8(bbsms, MenelausState),
 828         VMSTATE_UINT8_ARRAY(pull, MenelausState, 4),
 829         VMSTATE_UINT8_ARRAY(mmc_ctrl, MenelausState, 3),
 830         VMSTATE_UINT8(mmc_debounce, MenelausState),
 831         VMSTATE_UINT8(rtc.ctrl, MenelausState),
 832         VMSTATE_UINT16(rtc.comp, MenelausState),
 833         VMSTATE_UINT16(rtc_next_vmstate, MenelausState),
 834         VMSTATE_STRUCT(rtc.new, MenelausState, 0, vmstate_menelaus_tm,
 835                        struct tm),
 836         VMSTATE_STRUCT(rtc.alm, MenelausState, 0, vmstate_menelaus_tm,
 837                        struct tm),
 838         VMSTATE_UINT8(pwrbtn_state, MenelausState),
 839         VMSTATE_I2C_SLAVE(parent_obj, MenelausState),
 840         VMSTATE_END_OF_LIST()
 841     }
 842 };
 843
 844 static void twl92230_realize(DeviceState *dev, Error **errp)
 845 {
 846     MenelausState *s = TWL92230(dev);
 847
 848     s->rtc.hz_tm = timer_new_ms(rtc_clock, menelaus_rtc_hz, s);
 849     /* Three output pins plus one interrupt pin.  */
 850     qdev_init_gpio_out(dev, s->out, 4);
 851
 852     /* Three input pins plus one power-button pin.  */
 853     qdev_init_gpio_in(dev, menelaus_gpio_set, 4);
 854
 855     menelaus_reset(I2C_SLAVE(dev));
 856 }
 857
 858 static void twl92230_class_init(ObjectClass *klass, void *data)
 859 {
 860     DeviceClass *dc = DEVICE_CLASS(klass);
 861     I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
 862
 863     dc->realize = twl92230_realize;
 864     sc->event = menelaus_event;
 865     sc->recv = menelaus_rx;
 866     sc->send = menelaus_tx;
 867     dc->vmsd = &vmstate_menelaus;
 868 }
 869
 870 static const TypeInfo twl92230_info = {
 871     .name          = TYPE_TWL92230,
 872     .parent        = TYPE_I2C_SLAVE,
 873     .instance_size = sizeof(MenelausState),
 874     .class_init    = twl92230_class_init,
 875 };
 876
 877 static void twl92230_register_types(void)
 878 {
 879     type_register_static(&twl92230_info);
 880 }
 881
 882 type_init(twl92230_register_types)