aspeed: add an I2C RTC device to all machines
[qemu.git] / hw / ppc / mac.h
blob22a7efbed6de6c81d45509763da61270c78be016
1 /*
2 * QEMU PowerMac emulation shared definitions and prototypes
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
26 #ifndef PPC_MAC_H
27 #define PPC_MAC_H
29 #include "exec/memory.h"
30 #include "hw/sysbus.h"
31 #include "hw/ide/internal.h"
32 #include "hw/input/adb.h"
33 #include "hw/misc/mos6522.h"
34 #include "hw/pci/pci_host.h"
35 #include "hw/pci-host/uninorth.h"
37 /* SMP is not enabled, for now */
38 #define MAX_CPUS 1
40 #define BIOS_SIZE (1024 * 1024)
41 #define NVRAM_SIZE 0x2000
42 #define PROM_FILENAME "openbios-ppc"
43 #define PROM_ADDR 0xfff00000
45 #define KERNEL_LOAD_ADDR 0x01000000
46 #define KERNEL_GAP 0x00100000
48 #define ESCC_CLOCK 3686400
50 /* Old World IRQs */
51 #define OLDWORLD_CUDA_IRQ 0x12
52 #define OLDWORLD_ESCCB_IRQ 0x10
53 #define OLDWORLD_ESCCA_IRQ 0xf
54 #define OLDWORLD_IDE0_IRQ 0xd
55 #define OLDWORLD_IDE0_DMA_IRQ 0x2
56 #define OLDWORLD_IDE1_IRQ 0xe
57 #define OLDWORLD_IDE1_DMA_IRQ 0x3
59 /* New World IRQs */
60 #define NEWWORLD_CUDA_IRQ 0x19
61 #define NEWWORLD_ESCCB_IRQ 0x24
62 #define NEWWORLD_ESCCA_IRQ 0x25
63 #define NEWWORLD_IDE0_IRQ 0xd
64 #define NEWWORLD_IDE0_DMA_IRQ 0x2
65 #define NEWWORLD_IDE1_IRQ 0xe
66 #define NEWWORLD_IDE1_DMA_IRQ 0x3
68 /* MacIO */
69 #define TYPE_MACIO_IDE "macio-ide"
70 #define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE)
72 typedef struct MACIOIDEState {
73 /*< private >*/
74 SysBusDevice parent_obj;
75 /*< public >*/
76 uint32_t channel;
77 qemu_irq real_ide_irq;
78 qemu_irq real_dma_irq;
79 qemu_irq ide_irq;
80 qemu_irq dma_irq;
82 MemoryRegion mem;
83 IDEBus bus;
84 IDEDMA dma;
85 void *dbdma;
86 bool dma_active;
87 uint32_t timing_reg;
88 uint32_t irq_reg;
89 } MACIOIDEState;
91 void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
92 void macio_ide_register_dma(MACIOIDEState *ide);
94 void macio_init(PCIDevice *dev,
95 MemoryRegion *pic_mem);
97 /* Grackle PCI */
98 #define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
100 /* UniNorth PCI */
101 UNINHostState *pci_pmac_init(qemu_irq *pic,
102 MemoryRegion *address_space_mem);
103 UNINHostState *pci_pmac_u3_init(qemu_irq *pic,
104 MemoryRegion *address_space_mem);
106 /* Mac NVRAM */
107 #define TYPE_MACIO_NVRAM "macio-nvram"
108 #define MACIO_NVRAM(obj) \
109 OBJECT_CHECK(MacIONVRAMState, (obj), TYPE_MACIO_NVRAM)
111 typedef struct MacIONVRAMState {
112 /*< private >*/
113 SysBusDevice parent_obj;
114 /*< public >*/
116 uint32_t size;
117 uint32_t it_shift;
119 MemoryRegion mem;
120 uint8_t *data;
121 } MacIONVRAMState;
123 void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
124 #endif /* PPC_MAC_H */