hw/pc_piix.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "pc.h"
  27 #include "apic.h"
  28 #include "pci.h"
  29 #include "usb-uhci.h"
  30 #include "usb-ohci.h"
  31 #include "net.h"
  32 #include "boards.h"
  33 #include "ide.h"
  34 #include "kvm.h"
  35 #include "sysemu.h"
  36 #include "sysbus.h"
  37 #include "arch_init.h"
  38 #include "blockdev.h"
  39
  40 #define MAX_IDE_BUS 2
  41
  42 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
  43 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
  44 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
  45
  46 static void ioapic_init(IsaIrqState *isa_irq_state)
  47 {
  48     DeviceState *dev;
  49     SysBusDevice *d;
  50     unsigned int i;
  51
  52     dev = qdev_create(NULL, "ioapic");
  53     qdev_init_nofail(dev);
  54     d = sysbus_from_qdev(dev);
  55     sysbus_mmio_map(d, 0, 0xfec00000);
  56
  57     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  58         isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
  59     }
  60 }
  61
  62 /* PC hardware initialisation */
  63 static void pc_init1(ram_addr_t ram_size,
  64                      const char *boot_device,
  65                      const char *kernel_filename,
  66                      const char *kernel_cmdline,
  67                      const char *initrd_filename,
  68                      const char *cpu_model,
  69                      int pci_enabled)
  70 {
  71     int i;
  72     ram_addr_t below_4g_mem_size, above_4g_mem_size;
  73     PCIBus *pci_bus;
  74     PCII440FXState *i440fx_state;
  75     int piix3_devfn = -1;
  76     qemu_irq *cpu_irq;
  77     qemu_irq *isa_irq;
  78     qemu_irq *i8259;
  79     qemu_irq *cmos_s3;
  80     qemu_irq *smi_irq;
  81     IsaIrqState *isa_irq_state;
  82     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  83     FDCtrl *floppy_controller;
  84     BusState *idebus[MAX_IDE_BUS];
  85     ISADevice *rtc_state;
  86
  87     pc_cpus_init(cpu_model);
  88
  89     /* allocate ram and load rom/bios */
  90     pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
  91                    &below_4g_mem_size, &above_4g_mem_size);
  92
  93     cpu_irq = pc_allocate_cpu_irq();
  94     i8259 = i8259_init(cpu_irq[0]);
  95     isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
  96     isa_irq_state->i8259 = i8259;
  97     if (pci_enabled) {
  98         ioapic_init(isa_irq_state);
  99     }
 100     isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
 101
 102     if (pci_enabled) {
 103         pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
 104     } else {
 105         pci_bus = NULL;
 106         i440fx_state = NULL;
 107         isa_bus_new(NULL);
 108     }
 109     isa_bus_irqs(isa_irq);
 110
 111     pc_register_ferr_irq(isa_reserve_irq(13));
 112
 113     pc_vga_init(pci_enabled? pci_bus: NULL);
 114
 115     /* init basic PC hardware */
 116     pc_basic_device_init(isa_irq, &floppy_controller, &rtc_state);
 117
 118     for(i = 0; i < nb_nics; i++) {
 119         NICInfo *nd = &nd_table[i];
 120
 121         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
 122             pc_init_ne2k_isa(nd);
 123         else
 124             pci_nic_init_nofail(nd, "e1000", NULL);
 125     }
 126
 127     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 128         fprintf(stderr, "qemu: too many IDE bus\n");
 129         exit(1);
 130     }
 131
 132     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 133         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 134     }
 135
 136     if (pci_enabled) {
 137         PCIDevice *dev;
 138         dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
 139         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
 140         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
 141     } else {
 142         for(i = 0; i < MAX_IDE_BUS; i++) {
 143             ISADevice *dev;
 144             dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 145                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 146             idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
 147         }
 148     }
 149
 150     audio_init(isa_irq, pci_enabled ? pci_bus : NULL);
 151
 152     pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
 153                  idebus[0], idebus[1], floppy_controller, rtc_state);
 154
 155     if (pci_enabled && usb_enabled) {
 156         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 157     }
 158
 159     if (pci_enabled && acpi_enabled) {
 160         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
 161         i2c_bus *smbus;
 162
 163         cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
 164         smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
 165         /* TODO: Populate SPD eeprom data.  */
 166         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
 167                               isa_reserve_irq(9), *cmos_s3, *smi_irq,
 168                               kvm_enabled());
 169         for (i = 0; i < 8; i++) {
 170             DeviceState *eeprom;
 171             eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
 172             qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
 173             qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
 174             qdev_init_nofail(eeprom);
 175         }
 176     }
 177
 178     if (i440fx_state) {
 179         i440fx_init_memory_mappings(i440fx_state);
 180     }
 181
 182     if (pci_enabled) {
 183         pc_pci_device_init(pci_bus);
 184     }
 185 }
 186
 187 static void pc_init_pci(ram_addr_t ram_size,
 188                         const char *boot_device,
 189                         const char *kernel_filename,
 190                         const char *kernel_cmdline,
 191                         const char *initrd_filename,
 192                         const char *cpu_model)
 193 {
 194     pc_init1(ram_size, boot_device,
 195              kernel_filename, kernel_cmdline,
 196              initrd_filename, cpu_model, 1);
 197 }
 198
 199 static void pc_init_isa(ram_addr_t ram_size,
 200                         const char *boot_device,
 201                         const char *kernel_filename,
 202                         const char *kernel_cmdline,
 203                         const char *initrd_filename,
 204                         const char *cpu_model)
 205 {
 206     if (cpu_model == NULL)
 207         cpu_model = "486";
 208     pc_init1(ram_size, boot_device,
 209              kernel_filename, kernel_cmdline,
 210              initrd_filename, cpu_model, 0);
 211 }
 212
 213 static QEMUMachine pc_machine = {
 214     .name = "pc-0.14",
 215     .alias = "pc",
 216     .desc = "Standard PC",
 217     .init = pc_init_pci,
 218     .max_cpus = 255,
 219     .is_default = 1,
 220 };
 221
 222 static QEMUMachine pc_machine_v0_13 = {
 223     .name = "pc-0.13",
 224     .desc = "Standard PC",
 225     .init = pc_init_pci,
 226     .max_cpus = 255,
 227     .compat_props = (GlobalProperty[]) {
 228         {
 229             .driver   = "virtio-9p-pci",
 230             .property = "vectors",
 231             .value    = stringify(0),
 232         },{
 233             .driver   = "VGA",
 234             .property = "rombar",
 235             .value    = stringify(0),
 236         },{
 237             .driver   = "vmware-svga",
 238             .property = "rombar",
 239             .value    = stringify(0),
 240         },{
 241             .driver   = "PCI",
 242             .property = "command_serr_enable",
 243             .value    = "off",
 244         },
 245         { /* end of list */ }
 246     },
 247 };
 248
 249 static QEMUMachine pc_machine_v0_12 = {
 250     .name = "pc-0.12",
 251     .desc = "Standard PC",
 252     .init = pc_init_pci,
 253     .max_cpus = 255,
 254     .compat_props = (GlobalProperty[]) {
 255         {
 256             .driver   = "virtio-serial-pci",
 257             .property = "max_ports",
 258             .value    = stringify(1),
 259         },{
 260             .driver   = "virtio-serial-pci",
 261             .property = "vectors",
 262             .value    = stringify(0),
 263         },{
 264             .driver   = "VGA",
 265             .property = "rombar",
 266             .value    = stringify(0),
 267         },{
 268             .driver   = "vmware-svga",
 269             .property = "rombar",
 270             .value    = stringify(0),
 271         },{
 272             .driver   = "PCI",
 273             .property = "command_serr_enable",
 274             .value    = "off",
 275         },
 276         { /* end of list */ }
 277     }
 278 };
 279
 280 static QEMUMachine pc_machine_v0_11 = {
 281     .name = "pc-0.11",
 282     .desc = "Standard PC, qemu 0.11",
 283     .init = pc_init_pci,
 284     .max_cpus = 255,
 285     .compat_props = (GlobalProperty[]) {
 286         {
 287             .driver   = "virtio-blk-pci",
 288             .property = "vectors",
 289             .value    = stringify(0),
 290         },{
 291             .driver   = "virtio-serial-pci",
 292             .property = "max_ports",
 293             .value    = stringify(1),
 294         },{
 295             .driver   = "virtio-serial-pci",
 296             .property = "vectors",
 297             .value    = stringify(0),
 298         },{
 299             .driver   = "ide-drive",
 300             .property = "ver",
 301             .value    = "0.11",
 302         },{
 303             .driver   = "scsi-disk",
 304             .property = "ver",
 305             .value    = "0.11",
 306         },{
 307             .driver   = "PCI",
 308             .property = "rombar",
 309             .value    = stringify(0),
 310         },{
 311             .driver   = "PCI",
 312             .property = "command_serr_enable",
 313             .value    = "off",
 314         },
 315         { /* end of list */ }
 316     }
 317 };
 318
 319 static QEMUMachine pc_machine_v0_10 = {
 320     .name = "pc-0.10",
 321     .desc = "Standard PC, qemu 0.10",
 322     .init = pc_init_pci,
 323     .max_cpus = 255,
 324     .compat_props = (GlobalProperty[]) {
 325         {
 326             .driver   = "virtio-blk-pci",
 327             .property = "class",
 328             .value    = stringify(PCI_CLASS_STORAGE_OTHER),
 329         },{
 330             .driver   = "virtio-serial-pci",
 331             .property = "class",
 332             .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
 333         },{
 334             .driver   = "virtio-serial-pci",
 335             .property = "max_ports",
 336             .value    = stringify(1),
 337         },{
 338             .driver   = "virtio-serial-pci",
 339             .property = "vectors",
 340             .value    = stringify(0),
 341         },{
 342             .driver   = "virtio-net-pci",
 343             .property = "vectors",
 344             .value    = stringify(0),
 345         },{
 346             .driver   = "virtio-blk-pci",
 347             .property = "vectors",
 348             .value    = stringify(0),
 349         },{
 350             .driver   = "ide-drive",
 351             .property = "ver",
 352             .value    = "0.10",
 353         },{
 354             .driver   = "scsi-disk",
 355             .property = "ver",
 356             .value    = "0.10",
 357         },{
 358             .driver   = "PCI",
 359             .property = "rombar",
 360             .value    = stringify(0),
 361         },{
 362             .driver   = "PCI",
 363             .property = "command_serr_enable",
 364             .value    = "off",
 365         },
 366         { /* end of list */ }
 367     },
 368 };
 369
 370 static QEMUMachine isapc_machine = {
 371     .name = "isapc",
 372     .desc = "ISA-only PC",
 373     .init = pc_init_isa,
 374     .max_cpus = 1,
 375 };
 376
 377 static void pc_machine_init(void)
 378 {
 379     qemu_register_machine(&pc_machine);
 380     qemu_register_machine(&pc_machine_v0_13);
 381     qemu_register_machine(&pc_machine_v0_12);
 382     qemu_register_machine(&pc_machine_v0_11);
 383     qemu_register_machine(&pc_machine_v0_10);
 384     qemu_register_machine(&isapc_machine);
 385 }
 386
 387 machine_init(pc_machine_init);