include/exec/cpu-common.h

   1 #ifndef CPU_COMMON_H
   2 #define CPU_COMMON_H 1
   3
   4 /* CPU interfaces that are target independent.  */
   5
   6 #ifndef CONFIG_USER_ONLY
   7 #include "exec/hwaddr.h"
   8 #endif
   9
  10 #ifndef NEED_CPU_H
  11 #include "exec/poison.h"
  12 #endif
  13
  14 #include "qemu/bswap.h"
  15 #include "qemu/queue.h"
  16
  17 /**
  18  * CPUListState:
  19  * @cpu_fprintf: Print function.
  20  * @file: File to print to using @cpu_fprint.
  21  *
  22  * State commonly used for iterating over CPU models.
  23  */
  24 typedef struct CPUListState {
  25     fprintf_function cpu_fprintf;
  26     FILE *file;
  27 } CPUListState;
  28
  29 #if !defined(CONFIG_USER_ONLY)
  30
  31 enum device_endian {
  32     DEVICE_NATIVE_ENDIAN,
  33     DEVICE_BIG_ENDIAN,
  34     DEVICE_LITTLE_ENDIAN,
  35 };
  36
  37 /* address in the RAM (different from a physical address) */
  38 #if defined(CONFIG_XEN_BACKEND)
  39 typedef uint64_t ram_addr_t;
  40 #  define RAM_ADDR_MAX UINT64_MAX
  41 #  define RAM_ADDR_FMT "%" PRIx64
  42 #else
  43 typedef uintptr_t ram_addr_t;
  44 #  define RAM_ADDR_MAX UINTPTR_MAX
  45 #  define RAM_ADDR_FMT "%" PRIxPTR
  46 #endif
  47
  48 extern ram_addr_t ram_size;
  49
  50 /* memory API */
  51
  52 typedef void CPUWriteMemoryFunc(void *opaque, hwaddr addr, uint32_t value);
  53 typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);
  54
  55 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
  56 /* This should not be used by devices.  */
  57 MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
  58 void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);
  59 void qemu_ram_unset_idstr(ram_addr_t addr);
  60
  61 void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
  62                             int len, int is_write);
  63 static inline void cpu_physical_memory_read(hwaddr addr,
  64                                             void *buf, int len)
  65 {
  66     cpu_physical_memory_rw(addr, buf, len, 0);
  67 }
  68 static inline void cpu_physical_memory_write(hwaddr addr,
  69                                              const void *buf, int len)
  70 {
  71     cpu_physical_memory_rw(addr, (void *)buf, len, 1);
  72 }
  73 void *cpu_physical_memory_map(hwaddr addr,
  74                               hwaddr *plen,
  75                               int is_write);
  76 void cpu_physical_memory_unmap(void *buffer, hwaddr len,
  77                                int is_write, hwaddr access_len);
  78 void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
  79
  80 bool cpu_physical_memory_is_io(hwaddr phys_addr);
  81
  82 /* Coalesced MMIO regions are areas where write operations can be reordered.
  83  * This usually implies that write operations are side-effect free.  This allows
  84  * batching which can make a major impact on performance when using
  85  * virtualization.
  86  */
  87 void qemu_flush_coalesced_mmio_buffer(void);
  88
  89 uint32_t ldub_phys(AddressSpace *as, hwaddr addr);
  90 uint32_t lduw_le_phys(AddressSpace *as, hwaddr addr);
  91 uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr);
  92 uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr);
  93 uint32_t ldl_be_phys(AddressSpace *as, hwaddr addr);
  94 uint64_t ldq_le_phys(AddressSpace *as, hwaddr addr);
  95 uint64_t ldq_be_phys(AddressSpace *as, hwaddr addr);
  96 void stb_phys(AddressSpace *as, hwaddr addr, uint32_t val);
  97 void stw_le_phys(AddressSpace *as, hwaddr addr, uint32_t val);
  98 void stw_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
  99 void stl_le_phys(AddressSpace *as, hwaddr addr, uint32_t val);
 100 void stl_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
 101 void stq_le_phys(AddressSpace *as, hwaddr addr, uint64_t val);
 102 void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val);
 103
 104 #ifdef NEED_CPU_H
 105 uint32_t lduw_phys(AddressSpace *as, hwaddr addr);
 106 uint32_t ldl_phys(AddressSpace *as, hwaddr addr);
 107 uint64_t ldq_phys(AddressSpace *as, hwaddr addr);
 108 void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val);
 109 void stw_phys(AddressSpace *as, hwaddr addr, uint32_t val);
 110 void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val);
 111 void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val);
 112 #endif
 113
 114 void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
 115                                    const uint8_t *buf, int len);
 116 void cpu_flush_icache_range(hwaddr start, int len);
 117
 118 extern struct MemoryRegion io_mem_rom;
 119 extern struct MemoryRegion io_mem_notdirty;
 120
 121 typedef void (RAMBlockIterFunc)(void *host_addr,
 122     ram_addr_t offset, ram_addr_t length, void *opaque);
 123
 124 void qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque);
 125
 126 #endif
 127
 128 #endif /* !CPU_COMMON_H */