2 * S/390 misc helper routines
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2009 Alexander Graf
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 #include "host-utils.h"
27 #include "qemu-timer.h"
29 #include <linux/kvm.h>
32 #if !defined(CONFIG_USER_ONLY)
33 #include "softmmu_exec.h"
37 /* #define DEBUG_HELPER */
39 #define HELPER_LOG(x...) qemu_log(x)
41 #define HELPER_LOG(x...)
44 /* raise an exception */
45 void HELPER(exception
)(CPUS390XState
*env
, uint32_t excp
)
47 HELPER_LOG("%s: exception %d\n", __func__
, excp
);
48 env
->exception_index
= excp
;
52 #ifndef CONFIG_USER_ONLY
53 void program_interrupt(CPUS390XState
*env
, uint32_t code
, int ilc
)
55 qemu_log_mask(CPU_LOG_INT
, "program interrupt at %#" PRIx64
"\n",
60 kvm_s390_interrupt(env
, KVM_S390_PROGRAM_INT
, code
);
63 env
->int_pgm_code
= code
;
64 env
->int_pgm_ilc
= ilc
;
65 env
->exception_index
= EXCP_PGM
;
71 * ret < 0 indicates program check, ret = 0, 1, 2, 3 -> cc
73 int sclp_service_call(CPUS390XState
*env
, uint32_t sccb
, uint64_t code
)
79 printf("sclp(0x%x, 0x%" PRIx64
")\n", sccb
, code
);
83 if (cpu_physical_memory_is_io(sccb
)) {
84 return -PGM_ADDRESSING
;
86 if (sccb
& ~0x7ffffff8ul
) {
87 return -PGM_SPECIFICATION
;
91 case SCLP_CMDW_READ_SCP_INFO
:
92 case SCLP_CMDW_READ_SCP_INFO_FORCED
:
93 while ((ram_size
>> (20 + shift
)) > 65535) {
96 stw_phys(sccb
+ SCP_MEM_CODE
, ram_size
>> (20 + shift
));
97 stb_phys(sccb
+ SCP_INCREMENT
, 1 << shift
);
98 stw_phys(sccb
+ SCP_RESPONSE_CODE
, 0x10);
100 s390_sclp_extint(sccb
& ~3);
104 printf("KVM: invalid sclp call 0x%x / 0x%" PRIx64
"x\n", sccb
, code
);
113 /* SCLP service call */
114 uint32_t HELPER(servc
)(CPUS390XState
*env
, uint32_t r1
, uint64_t r2
)
118 r
= sclp_service_call(env
, r1
, r2
);
120 program_interrupt(env
, -r
, 4);
127 uint64_t HELPER(diag
)(CPUS390XState
*env
, uint32_t num
, uint64_t mem
,
135 r
= s390_virtio_hypercall(env
, mem
, code
);
151 program_interrupt(env
, PGM_OPERATION
, ILC_LATER_INC
);
158 void HELPER(stidp
)(CPUS390XState
*env
, uint64_t a1
)
160 cpu_stq_data(env
, a1
, env
->cpu_num
);
164 void HELPER(spx
)(CPUS390XState
*env
, uint64_t a1
)
168 prefix
= cpu_ldl_data(env
, a1
);
169 env
->psa
= prefix
& 0xfffff000;
170 qemu_log("prefix: %#x\n", prefix
);
171 tlb_flush_page(env
, 0);
172 tlb_flush_page(env
, TARGET_PAGE_SIZE
);
176 uint32_t HELPER(sck
)(uint64_t a1
)
178 /* XXX not implemented - is it necessary? */
183 static inline uint64_t clock_value(CPUS390XState
*env
)
187 time
= env
->tod_offset
+
188 time2tod(qemu_get_clock_ns(vm_clock
) - env
->tod_basetime
);
194 uint32_t HELPER(stck
)(CPUS390XState
*env
, uint64_t a1
)
196 cpu_stq_data(env
, a1
, clock_value(env
));
201 /* Store Clock Extended */
202 uint32_t HELPER(stcke
)(CPUS390XState
*env
, uint64_t a1
)
204 cpu_stb_data(env
, a1
, 0);
205 /* basically the same value as stck */
206 cpu_stq_data(env
, a1
+ 1, clock_value(env
) | env
->cpu_num
);
207 /* more fine grained than stck */
208 cpu_stq_data(env
, a1
+ 9, 0);
209 /* XXX programmable fields */
210 cpu_stw_data(env
, a1
+ 17, 0);
215 /* Set Clock Comparator */
216 void HELPER(sckc
)(CPUS390XState
*env
, uint64_t a1
)
218 uint64_t time
= cpu_ldq_data(env
, a1
);
224 /* difference between now and then */
225 time
-= clock_value(env
);
227 time
= (time
* 125) >> 9;
229 qemu_mod_timer(env
->tod_timer
, qemu_get_clock_ns(vm_clock
) + time
);
232 /* Store Clock Comparator */
233 void HELPER(stckc
)(CPUS390XState
*env
, uint64_t a1
)
236 cpu_stq_data(env
, a1
, 0);
240 void HELPER(spt
)(CPUS390XState
*env
, uint64_t a1
)
242 uint64_t time
= cpu_ldq_data(env
, a1
);
249 time
= (time
* 125) >> 9;
251 qemu_mod_timer(env
->cpu_timer
, qemu_get_clock_ns(vm_clock
) + time
);
254 /* Store CPU Timer */
255 void HELPER(stpt
)(CPUS390XState
*env
, uint64_t a1
)
258 cpu_stq_data(env
, a1
, 0);
261 /* Store System Information */
262 uint32_t HELPER(stsi
)(CPUS390XState
*env
, uint64_t a0
, uint32_t r0
,
268 if ((r0
& STSI_LEVEL_MASK
) <= STSI_LEVEL_3
&&
269 ((r0
& STSI_R0_RESERVED_MASK
) || (r1
& STSI_R1_RESERVED_MASK
))) {
270 /* valid function code, invalid reserved bits */
271 program_interrupt(env
, PGM_SPECIFICATION
, 2);
274 sel1
= r0
& STSI_R0_SEL1_MASK
;
275 sel2
= r1
& STSI_R1_SEL2_MASK
;
277 /* XXX: spec exception if sysib is not 4k-aligned */
279 switch (r0
& STSI_LEVEL_MASK
) {
281 if ((sel1
== 1) && (sel2
== 1)) {
282 /* Basic Machine Configuration */
283 struct sysib_111 sysib
;
285 memset(&sysib
, 0, sizeof(sysib
));
286 ebcdic_put(sysib
.manuf
, "QEMU ", 16);
287 /* same as machine type number in STORE CPU ID */
288 ebcdic_put(sysib
.type
, "QEMU", 4);
289 /* same as model number in STORE CPU ID */
290 ebcdic_put(sysib
.model
, "QEMU ", 16);
291 ebcdic_put(sysib
.sequence
, "QEMU ", 16);
292 ebcdic_put(sysib
.plant
, "QEMU", 4);
293 cpu_physical_memory_rw(a0
, (uint8_t *)&sysib
, sizeof(sysib
), 1);
294 } else if ((sel1
== 2) && (sel2
== 1)) {
295 /* Basic Machine CPU */
296 struct sysib_121 sysib
;
298 memset(&sysib
, 0, sizeof(sysib
));
299 /* XXX make different for different CPUs? */
300 ebcdic_put(sysib
.sequence
, "QEMUQEMUQEMUQEMU", 16);
301 ebcdic_put(sysib
.plant
, "QEMU", 4);
302 stw_p(&sysib
.cpu_addr
, env
->cpu_num
);
303 cpu_physical_memory_rw(a0
, (uint8_t *)&sysib
, sizeof(sysib
), 1);
304 } else if ((sel1
== 2) && (sel2
== 2)) {
305 /* Basic Machine CPUs */
306 struct sysib_122 sysib
;
308 memset(&sysib
, 0, sizeof(sysib
));
309 stl_p(&sysib
.capability
, 0x443afc29);
310 /* XXX change when SMP comes */
311 stw_p(&sysib
.total_cpus
, 1);
312 stw_p(&sysib
.active_cpus
, 1);
313 stw_p(&sysib
.standby_cpus
, 0);
314 stw_p(&sysib
.reserved_cpus
, 0);
315 cpu_physical_memory_rw(a0
, (uint8_t *)&sysib
, sizeof(sysib
), 1);
322 if ((sel1
== 2) && (sel2
== 1)) {
324 struct sysib_221 sysib
;
326 memset(&sysib
, 0, sizeof(sysib
));
327 /* XXX make different for different CPUs? */
328 ebcdic_put(sysib
.sequence
, "QEMUQEMUQEMUQEMU", 16);
329 ebcdic_put(sysib
.plant
, "QEMU", 4);
330 stw_p(&sysib
.cpu_addr
, env
->cpu_num
);
331 stw_p(&sysib
.cpu_id
, 0);
332 cpu_physical_memory_rw(a0
, (uint8_t *)&sysib
, sizeof(sysib
), 1);
333 } else if ((sel1
== 2) && (sel2
== 2)) {
335 struct sysib_222 sysib
;
337 memset(&sysib
, 0, sizeof(sysib
));
338 stw_p(&sysib
.lpar_num
, 0);
340 /* XXX change when SMP comes */
341 stw_p(&sysib
.total_cpus
, 1);
342 stw_p(&sysib
.conf_cpus
, 1);
343 stw_p(&sysib
.standby_cpus
, 0);
344 stw_p(&sysib
.reserved_cpus
, 0);
345 ebcdic_put(sysib
.name
, "QEMU ", 8);
346 stl_p(&sysib
.caf
, 1000);
347 stw_p(&sysib
.dedicated_cpus
, 0);
348 stw_p(&sysib
.shared_cpus
, 0);
349 cpu_physical_memory_rw(a0
, (uint8_t *)&sysib
, sizeof(sysib
), 1);
357 if ((sel1
== 2) && (sel2
== 2)) {
359 struct sysib_322 sysib
;
361 memset(&sysib
, 0, sizeof(sysib
));
363 /* XXX change when SMP comes */
364 stw_p(&sysib
.vm
[0].total_cpus
, 1);
365 stw_p(&sysib
.vm
[0].conf_cpus
, 1);
366 stw_p(&sysib
.vm
[0].standby_cpus
, 0);
367 stw_p(&sysib
.vm
[0].reserved_cpus
, 0);
368 ebcdic_put(sysib
.vm
[0].name
, "KVMguest", 8);
369 stl_p(&sysib
.vm
[0].caf
, 1000);
370 ebcdic_put(sysib
.vm
[0].cpi
, "KVM/Linux ", 16);
371 cpu_physical_memory_rw(a0
, (uint8_t *)&sysib
, sizeof(sysib
), 1);
377 case STSI_LEVEL_CURRENT
:
378 env
->regs
[0] = STSI_LEVEL_3
;
388 uint32_t HELPER(sigp
)(CPUS390XState
*env
, uint64_t order_code
, uint32_t r1
,
393 HELPER_LOG("%s: %016" PRIx64
" %08x %016" PRIx64
"\n",
394 __func__
, order_code
, r1
, cpu_addr
);
396 /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
397 as parameter (input). Status (output) is always R1. */
399 switch (order_code
) {
404 /* enumerate CPU status */
406 /* XXX implement when SMP comes */
409 env
->regs
[r1
] &= 0xffffffff00000000ULL
;
412 #if !defined(CONFIG_USER_ONLY)
414 qemu_system_reset_request();
418 qemu_system_shutdown_request();
424 fprintf(stderr
, "XXX unknown sigp: 0x%" PRIx64
"\n", order_code
);