hw/riscv/boot.c

   1 /*
   2  * QEMU RISC-V Boot Helper
   3  *
   4  * Copyright (c) 2017 SiFive, Inc.
   5  * Copyright (c) 2019 Alistair Francis <alistair.francis@wdc.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2 or later, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qemu/datadir.h"
  22 #include "qemu/units.h"
  23 #include "qemu/error-report.h"
  24 #include "exec/cpu-defs.h"
  25 #include "hw/boards.h"
  26 #include "hw/loader.h"
  27 #include "hw/riscv/boot.h"
  28 #include "hw/riscv/boot_opensbi.h"
  29 #include "elf.h"
  30 #include "sysemu/device_tree.h"
  31 #include "sysemu/qtest.h"
  32 #include "sysemu/kvm.h"
  33 #include "sysemu/reset.h"
  34
  35 #include <libfdt.h>
  36
  37 bool riscv_is_32bit(RISCVHartArrayState *harts)
  38 {
  39     return harts->harts[0].env.misa_mxl_max == MXL_RV32;
  40 }
  41
  42 /*
  43  * Return the per-socket PLIC hart topology configuration string
  44  * (caller must free with g_free())
  45  */
  46 char *riscv_plic_hart_config_string(int hart_count)
  47 {
  48     g_autofree const char **vals = g_new(const char *, hart_count + 1);
  49     int i;
  50
  51     for (i = 0; i < hart_count; i++) {
  52         CPUState *cs = qemu_get_cpu(i);
  53         CPURISCVState *env = &RISCV_CPU(cs)->env;
  54
  55         if (kvm_enabled()) {
  56             vals[i] = "S";
  57         } else if (riscv_has_ext(env, RVS)) {
  58             vals[i] = "MS";
  59         } else {
  60             vals[i] = "M";
  61         }
  62     }
  63     vals[i] = NULL;
  64
  65     /* g_strjoinv() obliges us to cast away const here */
  66     return g_strjoinv(",", (char **)vals);
  67 }
  68
  69 target_ulong riscv_calc_kernel_start_addr(RISCVHartArrayState *harts,
  70                                           target_ulong firmware_end_addr) {
  71     if (riscv_is_32bit(harts)) {
  72         return QEMU_ALIGN_UP(firmware_end_addr, 4 * MiB);
  73     } else {
  74         return QEMU_ALIGN_UP(firmware_end_addr, 2 * MiB);
  75     }
  76 }
  77
  78 const char *riscv_default_firmware_name(RISCVHartArrayState *harts)
  79 {
  80     if (riscv_is_32bit(harts)) {
  81         return RISCV32_BIOS_BIN;
  82     }
  83
  84     return RISCV64_BIOS_BIN;
  85 }
  86
  87 static char *riscv_find_bios(const char *bios_filename)
  88 {
  89     char *filename;
  90
  91     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_filename);
  92     if (filename == NULL) {
  93         if (!qtest_enabled()) {
  94             /*
  95              * We only ship OpenSBI binary bios images in the QEMU source.
  96              * For machines that use images other than the default bios,
  97              * running QEMU test will complain hence let's suppress the error
  98              * report for QEMU testing.
  99              */
 100             error_report("Unable to find the RISC-V BIOS \"%s\"",
 101                          bios_filename);
 102             exit(1);
 103         }
 104     }
 105
 106     return filename;
 107 }
 108
 109 char *riscv_find_firmware(const char *firmware_filename,
 110                           const char *default_machine_firmware)
 111 {
 112     char *filename = NULL;
 113
 114     if ((!firmware_filename) || (!strcmp(firmware_filename, "default"))) {
 115         /*
 116          * The user didn't specify -bios, or has specified "-bios default".
 117          * That means we are going to load the OpenSBI binary included in
 118          * the QEMU source.
 119          */
 120         filename = riscv_find_bios(default_machine_firmware);
 121     } else if (strcmp(firmware_filename, "none")) {
 122         filename = riscv_find_bios(firmware_filename);
 123     }
 124
 125     return filename;
 126 }
 127
 128 target_ulong riscv_find_and_load_firmware(MachineState *machine,
 129                                           const char *default_machine_firmware,
 130                                           hwaddr firmware_load_addr,
 131                                           symbol_fn_t sym_cb)
 132 {
 133     char *firmware_filename;
 134     target_ulong firmware_end_addr = firmware_load_addr;
 135
 136     firmware_filename = riscv_find_firmware(machine->firmware,
 137                                             default_machine_firmware);
 138
 139     if (firmware_filename) {
 140         /* If not "none" load the firmware */
 141         firmware_end_addr = riscv_load_firmware(firmware_filename,
 142                                                 firmware_load_addr, sym_cb);
 143         g_free(firmware_filename);
 144     }
 145
 146     return firmware_end_addr;
 147 }
 148
 149 target_ulong riscv_load_firmware(const char *firmware_filename,
 150                                  hwaddr firmware_load_addr,
 151                                  symbol_fn_t sym_cb)
 152 {
 153     uint64_t firmware_entry, firmware_end;
 154     ssize_t firmware_size;
 155
 156     if (load_elf_ram_sym(firmware_filename, NULL, NULL, NULL,
 157                          &firmware_entry, NULL, &firmware_end, NULL,
 158                          0, EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
 159         return firmware_end;
 160     }
 161
 162     firmware_size = load_image_targphys_as(firmware_filename,
 163                                            firmware_load_addr,
 164                                            current_machine->ram_size, NULL);
 165
 166     if (firmware_size > 0) {
 167         return firmware_load_addr + firmware_size;
 168     }
 169
 170     error_report("could not load firmware '%s'", firmware_filename);
 171     exit(1);
 172 }
 173
 174 target_ulong riscv_load_kernel(const char *kernel_filename,
 175                                target_ulong kernel_start_addr,
 176                                symbol_fn_t sym_cb)
 177 {
 178     uint64_t kernel_load_base, kernel_entry;
 179
 180     /*
 181      * NB: Use low address not ELF entry point to ensure that the fw_dynamic
 182      * behaviour when loading an ELF matches the fw_payload, fw_jump and BBL
 183      * behaviour, as well as fw_dynamic with a raw binary, all of which jump to
 184      * the (expected) load address load address. This allows kernels to have
 185      * separate SBI and ELF entry points (used by FreeBSD, for example).
 186      */
 187     if (load_elf_ram_sym(kernel_filename, NULL, NULL, NULL,
 188                          NULL, &kernel_load_base, NULL, NULL, 0,
 189                          EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
 190         return kernel_load_base;
 191     }
 192
 193     if (load_uimage_as(kernel_filename, &kernel_entry, NULL, NULL,
 194                        NULL, NULL, NULL) > 0) {
 195         return kernel_entry;
 196     }
 197
 198     if (load_image_targphys_as(kernel_filename, kernel_start_addr,
 199                                current_machine->ram_size, NULL) > 0) {
 200         return kernel_start_addr;
 201     }
 202
 203     error_report("could not load kernel '%s'", kernel_filename);
 204     exit(1);
 205 }
 206
 207 hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size,
 208                          uint64_t kernel_entry, hwaddr *start)
 209 {
 210     ssize_t size;
 211
 212     /*
 213      * We want to put the initrd far enough into RAM that when the
 214      * kernel is uncompressed it will not clobber the initrd. However
 215      * on boards without much RAM we must ensure that we still leave
 216      * enough room for a decent sized initrd, and on boards with large
 217      * amounts of RAM we must avoid the initrd being so far up in RAM
 218      * that it is outside lowmem and inaccessible to the kernel.
 219      * So for boards with less  than 256MB of RAM we put the initrd
 220      * halfway into RAM, and for boards with 256MB of RAM or more we put
 221      * the initrd at 128MB.
 222      */
 223     *start = kernel_entry + MIN(mem_size / 2, 128 * MiB);
 224
 225     size = load_ramdisk(filename, *start, mem_size - *start);
 226     if (size == -1) {
 227         size = load_image_targphys(filename, *start, mem_size - *start);
 228         if (size == -1) {
 229             error_report("could not load ramdisk '%s'", filename);
 230             exit(1);
 231         }
 232     }
 233
 234     return *start + size;
 235 }
 236
 237 uint64_t riscv_load_fdt(hwaddr dram_base, uint64_t mem_size, void *fdt)
 238 {
 239     uint64_t temp, fdt_addr;
 240     hwaddr dram_end = dram_base + mem_size;
 241     int ret, fdtsize = fdt_totalsize(fdt);
 242
 243     if (fdtsize <= 0) {
 244         error_report("invalid device-tree");
 245         exit(1);
 246     }
 247
 248     /*
 249      * We should put fdt as far as possible to avoid kernel/initrd overwriting
 250      * its content. But it should be addressable by 32 bit system as well.
 251      * Thus, put it at an 2MB aligned address that less than fdt size from the
 252      * end of dram or 3GB whichever is lesser.
 253      */
 254     temp = (dram_base < 3072 * MiB) ? MIN(dram_end, 3072 * MiB) : dram_end;
 255     fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB);
 256
 257     ret = fdt_pack(fdt);
 258     /* Should only fail if we've built a corrupted tree */
 259     g_assert(ret == 0);
 260     /* copy in the device tree */
 261     qemu_fdt_dumpdtb(fdt, fdtsize);
 262
 263     rom_add_blob_fixed_as("fdt", fdt, fdtsize, fdt_addr,
 264                           &address_space_memory);
 265     qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 266                         rom_ptr_for_as(&address_space_memory, fdt_addr, fdtsize));
 267
 268     return fdt_addr;
 269 }
 270
 271 void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base,
 272                                   hwaddr rom_size, uint32_t reset_vec_size,
 273                                   uint64_t kernel_entry)
 274 {
 275     struct fw_dynamic_info dinfo;
 276     size_t dinfo_len;
 277
 278     if (sizeof(dinfo.magic) == 4) {
 279         dinfo.magic = cpu_to_le32(FW_DYNAMIC_INFO_MAGIC_VALUE);
 280         dinfo.version = cpu_to_le32(FW_DYNAMIC_INFO_VERSION);
 281         dinfo.next_mode = cpu_to_le32(FW_DYNAMIC_INFO_NEXT_MODE_S);
 282         dinfo.next_addr = cpu_to_le32(kernel_entry);
 283     } else {
 284         dinfo.magic = cpu_to_le64(FW_DYNAMIC_INFO_MAGIC_VALUE);
 285         dinfo.version = cpu_to_le64(FW_DYNAMIC_INFO_VERSION);
 286         dinfo.next_mode = cpu_to_le64(FW_DYNAMIC_INFO_NEXT_MODE_S);
 287         dinfo.next_addr = cpu_to_le64(kernel_entry);
 288     }
 289     dinfo.options = 0;
 290     dinfo.boot_hart = 0;
 291     dinfo_len = sizeof(dinfo);
 292
 293     /**
 294      * copy the dynamic firmware info. This information is specific to
 295      * OpenSBI but doesn't break any other firmware as long as they don't
 296      * expect any certain value in "a2" register.
 297      */
 298     if (dinfo_len > (rom_size - reset_vec_size)) {
 299         error_report("not enough space to store dynamic firmware info");
 300         exit(1);
 301     }
 302
 303     rom_add_blob_fixed_as("mrom.finfo", &dinfo, dinfo_len,
 304                            rom_base + reset_vec_size,
 305                            &address_space_memory);
 306 }
 307
 308 void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts,
 309                                hwaddr start_addr,
 310                                hwaddr rom_base, hwaddr rom_size,
 311                                uint64_t kernel_entry,
 312                                uint64_t fdt_load_addr)
 313 {
 314     int i;
 315     uint32_t start_addr_hi32 = 0x00000000;
 316     uint32_t fdt_load_addr_hi32 = 0x00000000;
 317
 318     if (!riscv_is_32bit(harts)) {
 319         start_addr_hi32 = start_addr >> 32;
 320         fdt_load_addr_hi32 = fdt_load_addr >> 32;
 321     }
 322     /* reset vector */
 323     uint32_t reset_vec[10] = {
 324         0x00000297,                  /* 1:  auipc  t0, %pcrel_hi(fw_dyn) */
 325         0x02828613,                  /*     addi   a2, t0, %pcrel_lo(1b) */
 326         0xf1402573,                  /*     csrr   a0, mhartid  */
 327         0,
 328         0,
 329         0x00028067,                  /*     jr     t0 */
 330         start_addr,                  /* start: .dword */
 331         start_addr_hi32,
 332         fdt_load_addr,               /* fdt_laddr: .dword */
 333         fdt_load_addr_hi32,
 334                                      /* fw_dyn: */
 335     };
 336     if (riscv_is_32bit(harts)) {
 337         reset_vec[3] = 0x0202a583;   /*     lw     a1, 32(t0) */
 338         reset_vec[4] = 0x0182a283;   /*     lw     t0, 24(t0) */
 339     } else {
 340         reset_vec[3] = 0x0202b583;   /*     ld     a1, 32(t0) */
 341         reset_vec[4] = 0x0182b283;   /*     ld     t0, 24(t0) */
 342     }
 343
 344     /* copy in the reset vector in little_endian byte order */
 345     for (i = 0; i < ARRAY_SIZE(reset_vec); i++) {
 346         reset_vec[i] = cpu_to_le32(reset_vec[i]);
 347     }
 348     rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
 349                           rom_base, &address_space_memory);
 350     riscv_rom_copy_firmware_info(machine, rom_base, rom_size, sizeof(reset_vec),
 351                                  kernel_entry);
 352 }
 353
 354 void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr)
 355 {
 356     CPUState *cs;
 357
 358     for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
 359         RISCVCPU *riscv_cpu = RISCV_CPU(cs);
 360         riscv_cpu->env.kernel_addr = kernel_addr;
 361         riscv_cpu->env.fdt_addr = fdt_addr;
 362     }
 363 }
 364
 365 void riscv_setup_firmware_boot(MachineState *machine)
 366 {
 367     if (machine->kernel_filename) {
 368         FWCfgState *fw_cfg;
 369         fw_cfg = fw_cfg_find();
 370
 371         assert(fw_cfg);
 372         /*
 373          * Expose the kernel, the command line, and the initrd in fw_cfg.
 374          * We don't process them here at all, it's all left to the
 375          * firmware.
 376          */
 377         load_image_to_fw_cfg(fw_cfg,
 378                              FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
 379                              machine->kernel_filename,
 380                              true);
 381         load_image_to_fw_cfg(fw_cfg,
 382                              FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
 383                              machine->initrd_filename, false);
 384
 385         if (machine->kernel_cmdline) {
 386             fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
 387                            strlen(machine->kernel_cmdline) + 1);
 388             fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
 389                               machine->kernel_cmdline);
 390         }
 391     }
 392 }