4 * Generate inline load/store functions for one MMU mode and data
7 * Generate a store function as well as signed and unsigned loads.
9 * Not used directly but included from cpu_ldst.h.
11 * Copyright (c) 2003 Fabrice Bellard
13 * This library is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU Lesser General Public
15 * License as published by the Free Software Foundation; either
16 * version 2 of the License, or (at your option) any later version.
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 * Lesser General Public License for more details.
23 * You should have received a copy of the GNU Lesser General Public
24 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
29 #define DATA_TYPE uint64_t
33 #define DATA_TYPE uint32_t
37 #define DATA_TYPE uint16_t
38 #define DATA_STYPE int16_t
42 #define DATA_TYPE uint8_t
43 #define DATA_STYPE int8_t
45 #error unsupported data size
49 #define RES_TYPE uint64_t
51 #define RES_TYPE uint32_t
54 #ifdef SOFTMMU_CODE_ACCESS
55 #define ADDR_READ addr_code
56 #define MMUSUFFIX _cmmu
58 #define ADDR_READ addr_read
59 #define MMUSUFFIX _mmu
62 /* generic load/store macros */
64 static inline RES_TYPE
65 glue(glue(cpu_ld
, USUFFIX
), MEMSUFFIX
)(CPUArchState
*env
, target_ulong ptr
)
73 page_index
= (addr
>> TARGET_PAGE_BITS
) & (CPU_TLB_SIZE
- 1);
74 mmu_idx
= CPU_MMU_INDEX
;
75 if (unlikely(env
->tlb_table
[mmu_idx
][page_index
].ADDR_READ
!=
76 (addr
& (TARGET_PAGE_MASK
| (DATA_SIZE
- 1))))) {
77 res
= glue(glue(helper_ld
, SUFFIX
), MMUSUFFIX
)(env
, addr
, mmu_idx
);
79 uintptr_t hostaddr
= addr
+ env
->tlb_table
[mmu_idx
][page_index
].addend
;
80 res
= glue(glue(ld
, USUFFIX
), _p
)((uint8_t *)hostaddr
);
87 glue(glue(cpu_lds
, SUFFIX
), MEMSUFFIX
)(CPUArchState
*env
, target_ulong ptr
)
94 page_index
= (addr
>> TARGET_PAGE_BITS
) & (CPU_TLB_SIZE
- 1);
95 mmu_idx
= CPU_MMU_INDEX
;
96 if (unlikely(env
->tlb_table
[mmu_idx
][page_index
].ADDR_READ
!=
97 (addr
& (TARGET_PAGE_MASK
| (DATA_SIZE
- 1))))) {
98 res
= (DATA_STYPE
)glue(glue(helper_ld
, SUFFIX
),
99 MMUSUFFIX
)(env
, addr
, mmu_idx
);
101 uintptr_t hostaddr
= addr
+ env
->tlb_table
[mmu_idx
][page_index
].addend
;
102 res
= glue(glue(lds
, SUFFIX
), _p
)((uint8_t *)hostaddr
);
108 #ifndef SOFTMMU_CODE_ACCESS
110 /* generic store macro */
113 glue(glue(cpu_st
, SUFFIX
), MEMSUFFIX
)(CPUArchState
*env
, target_ulong ptr
,
121 page_index
= (addr
>> TARGET_PAGE_BITS
) & (CPU_TLB_SIZE
- 1);
122 mmu_idx
= CPU_MMU_INDEX
;
123 if (unlikely(env
->tlb_table
[mmu_idx
][page_index
].addr_write
!=
124 (addr
& (TARGET_PAGE_MASK
| (DATA_SIZE
- 1))))) {
125 glue(glue(helper_st
, SUFFIX
), MMUSUFFIX
)(env
, addr
, v
, mmu_idx
);
127 uintptr_t hostaddr
= addr
+ env
->tlb_table
[mmu_idx
][page_index
].addend
;
128 glue(glue(st
, SUFFIX
), _p
)((uint8_t *)hostaddr
, v
);
132 #endif /* !SOFTMMU_CODE_ACCESS */