4 * Copyright Red Hat, Inc. 2013-2014
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
14 #include "qemu/osdep.h"
15 #include "qemu-common.h"
18 #include "hw/virtio/virtio.h"
19 #include "hw/virtio/virtio-gpu.h"
20 #include "qapi/error.h"
24 #include <virglrenderer.h>
26 static struct virgl_renderer_callbacks virtio_gpu_3d_cbs
;
28 static void virgl_cmd_create_resource_2d(VirtIOGPU
*g
,
29 struct virtio_gpu_ctrl_command
*cmd
)
31 struct virtio_gpu_resource_create_2d c2d
;
32 struct virgl_renderer_resource_create_args args
;
34 VIRTIO_GPU_FILL_CMD(c2d
);
35 trace_virtio_gpu_cmd_res_create_2d(c2d
.resource_id
, c2d
.format
,
36 c2d
.width
, c2d
.height
);
38 args
.handle
= c2d
.resource_id
;
40 args
.format
= c2d
.format
;
42 args
.width
= c2d
.width
;
43 args
.height
= c2d
.height
;
48 args
.flags
= VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP
;
49 virgl_renderer_resource_create(&args
, NULL
, 0);
52 static void virgl_cmd_create_resource_3d(VirtIOGPU
*g
,
53 struct virtio_gpu_ctrl_command
*cmd
)
55 struct virtio_gpu_resource_create_3d c3d
;
56 struct virgl_renderer_resource_create_args args
;
58 VIRTIO_GPU_FILL_CMD(c3d
);
59 trace_virtio_gpu_cmd_res_create_3d(c3d
.resource_id
, c3d
.format
,
60 c3d
.width
, c3d
.height
, c3d
.depth
);
62 args
.handle
= c3d
.resource_id
;
63 args
.target
= c3d
.target
;
64 args
.format
= c3d
.format
;
66 args
.width
= c3d
.width
;
67 args
.height
= c3d
.height
;
68 args
.depth
= c3d
.depth
;
69 args
.array_size
= c3d
.array_size
;
70 args
.last_level
= c3d
.last_level
;
71 args
.nr_samples
= c3d
.nr_samples
;
72 args
.flags
= c3d
.flags
;
73 virgl_renderer_resource_create(&args
, NULL
, 0);
76 static void virgl_cmd_resource_unref(VirtIOGPU
*g
,
77 struct virtio_gpu_ctrl_command
*cmd
)
79 struct virtio_gpu_resource_unref unref
;
80 struct iovec
*res_iovs
= NULL
;
83 VIRTIO_GPU_FILL_CMD(unref
);
84 trace_virtio_gpu_cmd_res_unref(unref
.resource_id
);
86 virgl_renderer_resource_detach_iov(unref
.resource_id
,
89 if (res_iovs
!= NULL
&& num_iovs
!= 0) {
90 virtio_gpu_cleanup_mapping_iov(res_iovs
, num_iovs
);
92 virgl_renderer_resource_unref(unref
.resource_id
);
95 static void virgl_cmd_context_create(VirtIOGPU
*g
,
96 struct virtio_gpu_ctrl_command
*cmd
)
98 struct virtio_gpu_ctx_create cc
;
100 VIRTIO_GPU_FILL_CMD(cc
);
101 trace_virtio_gpu_cmd_ctx_create(cc
.hdr
.ctx_id
,
104 virgl_renderer_context_create(cc
.hdr
.ctx_id
, cc
.nlen
,
108 static void virgl_cmd_context_destroy(VirtIOGPU
*g
,
109 struct virtio_gpu_ctrl_command
*cmd
)
111 struct virtio_gpu_ctx_destroy cd
;
113 VIRTIO_GPU_FILL_CMD(cd
);
114 trace_virtio_gpu_cmd_ctx_destroy(cd
.hdr
.ctx_id
);
116 virgl_renderer_context_destroy(cd
.hdr
.ctx_id
);
119 static void virtio_gpu_rect_update(VirtIOGPU
*g
, int idx
, int x
, int y
,
120 int width
, int height
)
122 if (!g
->scanout
[idx
].con
) {
126 dpy_gl_update(g
->scanout
[idx
].con
, x
, y
, width
, height
);
129 static void virgl_cmd_resource_flush(VirtIOGPU
*g
,
130 struct virtio_gpu_ctrl_command
*cmd
)
132 struct virtio_gpu_resource_flush rf
;
135 VIRTIO_GPU_FILL_CMD(rf
);
136 trace_virtio_gpu_cmd_res_flush(rf
.resource_id
,
137 rf
.r
.width
, rf
.r
.height
, rf
.r
.x
, rf
.r
.y
);
139 for (i
= 0; i
< g
->conf
.max_outputs
; i
++) {
140 if (g
->scanout
[i
].resource_id
!= rf
.resource_id
) {
143 virtio_gpu_rect_update(g
, i
, rf
.r
.x
, rf
.r
.y
, rf
.r
.width
, rf
.r
.height
);
147 static void virgl_cmd_set_scanout(VirtIOGPU
*g
,
148 struct virtio_gpu_ctrl_command
*cmd
)
150 struct virtio_gpu_set_scanout ss
;
151 struct virgl_renderer_resource_info info
;
154 VIRTIO_GPU_FILL_CMD(ss
);
155 trace_virtio_gpu_cmd_set_scanout(ss
.scanout_id
, ss
.resource_id
,
156 ss
.r
.width
, ss
.r
.height
, ss
.r
.x
, ss
.r
.y
);
158 if (ss
.scanout_id
>= g
->conf
.max_outputs
) {
159 qemu_log_mask(LOG_GUEST_ERROR
, "%s: illegal scanout id specified %d",
160 __func__
, ss
.scanout_id
);
161 cmd
->error
= VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID
;
166 memset(&info
, 0, sizeof(info
));
168 if (ss
.resource_id
&& ss
.r
.width
&& ss
.r
.height
) {
169 ret
= virgl_renderer_resource_get_info(ss
.resource_id
, &info
);
171 qemu_log_mask(LOG_GUEST_ERROR
,
172 "%s: illegal resource specified %d\n",
173 __func__
, ss
.resource_id
);
174 cmd
->error
= VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID
;
177 qemu_console_resize(g
->scanout
[ss
.scanout_id
].con
,
178 ss
.r
.width
, ss
.r
.height
);
179 virgl_renderer_force_ctx_0();
180 dpy_gl_scanout(g
->scanout
[ss
.scanout_id
].con
, info
.tex_id
,
181 info
.flags
& 1 /* FIXME: Y_0_TOP */,
182 info
.width
, info
.height
,
183 ss
.r
.x
, ss
.r
.y
, ss
.r
.width
, ss
.r
.height
);
185 if (ss
.scanout_id
!= 0) {
186 dpy_gfx_replace_surface(g
->scanout
[ss
.scanout_id
].con
, NULL
);
188 dpy_gl_scanout(g
->scanout
[ss
.scanout_id
].con
, 0, false,
191 g
->scanout
[ss
.scanout_id
].resource_id
= ss
.resource_id
;
194 static void virgl_cmd_submit_3d(VirtIOGPU
*g
,
195 struct virtio_gpu_ctrl_command
*cmd
)
197 struct virtio_gpu_cmd_submit cs
;
201 VIRTIO_GPU_FILL_CMD(cs
);
202 trace_virtio_gpu_cmd_ctx_submit(cs
.hdr
.ctx_id
, cs
.size
);
204 buf
= g_malloc(cs
.size
);
205 s
= iov_to_buf(cmd
->elem
.out_sg
, cmd
->elem
.out_num
,
206 sizeof(cs
), buf
, cs
.size
);
208 qemu_log_mask(LOG_GUEST_ERROR
, "%s: size mismatch (%zd/%d)",
209 __func__
, s
, cs
.size
);
210 cmd
->error
= VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER
;
214 if (virtio_gpu_stats_enabled(g
->conf
)) {
216 g
->stats
.bytes_3d
+= cs
.size
;
219 virgl_renderer_submit_cmd(buf
, cs
.hdr
.ctx_id
, cs
.size
/ 4);
225 static void virgl_cmd_transfer_to_host_2d(VirtIOGPU
*g
,
226 struct virtio_gpu_ctrl_command
*cmd
)
228 struct virtio_gpu_transfer_to_host_2d t2d
;
229 struct virtio_gpu_box box
;
231 VIRTIO_GPU_FILL_CMD(t2d
);
232 trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d
.resource_id
);
238 box
.h
= t2d
.r
.height
;
241 virgl_renderer_transfer_write_iov(t2d
.resource_id
,
246 (struct virgl_box
*)&box
,
247 t2d
.offset
, NULL
, 0);
250 static void virgl_cmd_transfer_to_host_3d(VirtIOGPU
*g
,
251 struct virtio_gpu_ctrl_command
*cmd
)
253 struct virtio_gpu_transfer_host_3d t3d
;
255 VIRTIO_GPU_FILL_CMD(t3d
);
256 trace_virtio_gpu_cmd_res_xfer_toh_3d(t3d
.resource_id
);
258 virgl_renderer_transfer_write_iov(t3d
.resource_id
,
263 (struct virgl_box
*)&t3d
.box
,
264 t3d
.offset
, NULL
, 0);
268 virgl_cmd_transfer_from_host_3d(VirtIOGPU
*g
,
269 struct virtio_gpu_ctrl_command
*cmd
)
271 struct virtio_gpu_transfer_host_3d tf3d
;
273 VIRTIO_GPU_FILL_CMD(tf3d
);
274 trace_virtio_gpu_cmd_res_xfer_fromh_3d(tf3d
.resource_id
);
276 virgl_renderer_transfer_read_iov(tf3d
.resource_id
,
281 (struct virgl_box
*)&tf3d
.box
,
282 tf3d
.offset
, NULL
, 0);
286 static void virgl_resource_attach_backing(VirtIOGPU
*g
,
287 struct virtio_gpu_ctrl_command
*cmd
)
289 struct virtio_gpu_resource_attach_backing att_rb
;
290 struct iovec
*res_iovs
;
293 VIRTIO_GPU_FILL_CMD(att_rb
);
294 trace_virtio_gpu_cmd_res_back_attach(att_rb
.resource_id
);
296 ret
= virtio_gpu_create_mapping_iov(&att_rb
, cmd
, NULL
, &res_iovs
);
298 cmd
->error
= VIRTIO_GPU_RESP_ERR_UNSPEC
;
302 ret
= virgl_renderer_resource_attach_iov(att_rb
.resource_id
,
303 res_iovs
, att_rb
.nr_entries
);
306 virtio_gpu_cleanup_mapping_iov(res_iovs
, att_rb
.nr_entries
);
309 static void virgl_resource_detach_backing(VirtIOGPU
*g
,
310 struct virtio_gpu_ctrl_command
*cmd
)
312 struct virtio_gpu_resource_detach_backing detach_rb
;
313 struct iovec
*res_iovs
= NULL
;
316 VIRTIO_GPU_FILL_CMD(detach_rb
);
317 trace_virtio_gpu_cmd_res_back_detach(detach_rb
.resource_id
);
319 virgl_renderer_resource_detach_iov(detach_rb
.resource_id
,
322 if (res_iovs
== NULL
|| num_iovs
== 0) {
325 virtio_gpu_cleanup_mapping_iov(res_iovs
, num_iovs
);
329 static void virgl_cmd_ctx_attach_resource(VirtIOGPU
*g
,
330 struct virtio_gpu_ctrl_command
*cmd
)
332 struct virtio_gpu_ctx_resource att_res
;
334 VIRTIO_GPU_FILL_CMD(att_res
);
335 trace_virtio_gpu_cmd_ctx_res_attach(att_res
.hdr
.ctx_id
,
336 att_res
.resource_id
);
338 virgl_renderer_ctx_attach_resource(att_res
.hdr
.ctx_id
, att_res
.resource_id
);
341 static void virgl_cmd_ctx_detach_resource(VirtIOGPU
*g
,
342 struct virtio_gpu_ctrl_command
*cmd
)
344 struct virtio_gpu_ctx_resource det_res
;
346 VIRTIO_GPU_FILL_CMD(det_res
);
347 trace_virtio_gpu_cmd_ctx_res_detach(det_res
.hdr
.ctx_id
,
348 det_res
.resource_id
);
350 virgl_renderer_ctx_detach_resource(det_res
.hdr
.ctx_id
, det_res
.resource_id
);
353 static void virgl_cmd_get_capset_info(VirtIOGPU
*g
,
354 struct virtio_gpu_ctrl_command
*cmd
)
356 struct virtio_gpu_get_capset_info info
;
357 struct virtio_gpu_resp_capset_info resp
;
359 VIRTIO_GPU_FILL_CMD(info
);
361 memset(&resp
, 0, sizeof(resp
));
362 if (info
.capset_index
== 0) {
363 resp
.capset_id
= VIRTIO_GPU_CAPSET_VIRGL
;
364 virgl_renderer_get_cap_set(resp
.capset_id
,
365 &resp
.capset_max_version
,
366 &resp
.capset_max_size
);
368 resp
.capset_max_version
= 0;
369 resp
.capset_max_size
= 0;
371 resp
.hdr
.type
= VIRTIO_GPU_RESP_OK_CAPSET_INFO
;
372 virtio_gpu_ctrl_response(g
, cmd
, &resp
.hdr
, sizeof(resp
));
375 static void virgl_cmd_get_capset(VirtIOGPU
*g
,
376 struct virtio_gpu_ctrl_command
*cmd
)
378 struct virtio_gpu_get_capset gc
;
379 struct virtio_gpu_resp_capset
*resp
;
380 uint32_t max_ver
, max_size
;
381 VIRTIO_GPU_FILL_CMD(gc
);
383 virgl_renderer_get_cap_set(gc
.capset_id
, &max_ver
,
386 cmd
->error
= VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER
;
390 resp
= g_malloc0(sizeof(*resp
) + max_size
);
391 resp
->hdr
.type
= VIRTIO_GPU_RESP_OK_CAPSET
;
392 virgl_renderer_fill_caps(gc
.capset_id
,
394 (void *)resp
->capset_data
);
395 virtio_gpu_ctrl_response(g
, cmd
, &resp
->hdr
, sizeof(*resp
) + max_size
);
399 void virtio_gpu_virgl_process_cmd(VirtIOGPU
*g
,
400 struct virtio_gpu_ctrl_command
*cmd
)
402 VIRTIO_GPU_FILL_CMD(cmd
->cmd_hdr
);
404 cmd
->waiting
= g
->renderer_blocked
;
409 virgl_renderer_force_ctx_0();
410 switch (cmd
->cmd_hdr
.type
) {
411 case VIRTIO_GPU_CMD_CTX_CREATE
:
412 virgl_cmd_context_create(g
, cmd
);
414 case VIRTIO_GPU_CMD_CTX_DESTROY
:
415 virgl_cmd_context_destroy(g
, cmd
);
417 case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D
:
418 virgl_cmd_create_resource_2d(g
, cmd
);
420 case VIRTIO_GPU_CMD_RESOURCE_CREATE_3D
:
421 virgl_cmd_create_resource_3d(g
, cmd
);
423 case VIRTIO_GPU_CMD_SUBMIT_3D
:
424 virgl_cmd_submit_3d(g
, cmd
);
426 case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D
:
427 virgl_cmd_transfer_to_host_2d(g
, cmd
);
429 case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D
:
430 virgl_cmd_transfer_to_host_3d(g
, cmd
);
432 case VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D
:
433 virgl_cmd_transfer_from_host_3d(g
, cmd
);
435 case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING
:
436 virgl_resource_attach_backing(g
, cmd
);
438 case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING
:
439 virgl_resource_detach_backing(g
, cmd
);
441 case VIRTIO_GPU_CMD_SET_SCANOUT
:
442 virgl_cmd_set_scanout(g
, cmd
);
444 case VIRTIO_GPU_CMD_RESOURCE_FLUSH
:
445 virgl_cmd_resource_flush(g
, cmd
);
447 case VIRTIO_GPU_CMD_RESOURCE_UNREF
:
448 virgl_cmd_resource_unref(g
, cmd
);
450 case VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE
:
451 /* TODO add security */
452 virgl_cmd_ctx_attach_resource(g
, cmd
);
454 case VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE
:
455 /* TODO add security */
456 virgl_cmd_ctx_detach_resource(g
, cmd
);
458 case VIRTIO_GPU_CMD_GET_CAPSET_INFO
:
459 virgl_cmd_get_capset_info(g
, cmd
);
461 case VIRTIO_GPU_CMD_GET_CAPSET
:
462 virgl_cmd_get_capset(g
, cmd
);
465 case VIRTIO_GPU_CMD_GET_DISPLAY_INFO
:
466 virtio_gpu_get_display_info(g
, cmd
);
469 cmd
->error
= VIRTIO_GPU_RESP_ERR_UNSPEC
;
477 fprintf(stderr
, "%s: ctrl 0x%x, error 0x%x\n", __func__
,
478 cmd
->cmd_hdr
.type
, cmd
->error
);
479 virtio_gpu_ctrl_response_nodata(g
, cmd
, cmd
->error
);
482 if (!(cmd
->cmd_hdr
.flags
& VIRTIO_GPU_FLAG_FENCE
)) {
483 virtio_gpu_ctrl_response_nodata(g
, cmd
, VIRTIO_GPU_RESP_OK_NODATA
);
487 trace_virtio_gpu_fence_ctrl(cmd
->cmd_hdr
.fence_id
, cmd
->cmd_hdr
.type
);
488 virgl_renderer_create_fence(cmd
->cmd_hdr
.fence_id
, cmd
->cmd_hdr
.type
);
491 static void virgl_write_fence(void *opaque
, uint32_t fence
)
493 VirtIOGPU
*g
= opaque
;
494 struct virtio_gpu_ctrl_command
*cmd
, *tmp
;
496 QTAILQ_FOREACH_SAFE(cmd
, &g
->fenceq
, next
, tmp
) {
498 * the guest can end up emitting fences out of order
499 * so we should check all fenced cmds not just the first one.
501 if (cmd
->cmd_hdr
.fence_id
> fence
) {
504 trace_virtio_gpu_fence_resp(cmd
->cmd_hdr
.fence_id
);
505 virtio_gpu_ctrl_response_nodata(g
, cmd
, VIRTIO_GPU_RESP_OK_NODATA
);
506 QTAILQ_REMOVE(&g
->fenceq
, cmd
, next
);
509 if (virtio_gpu_stats_enabled(g
->conf
)) {
510 fprintf(stderr
, "inflight: %3d (-)\r", g
->inflight
);
515 static virgl_renderer_gl_context
516 virgl_create_context(void *opaque
, int scanout_idx
,
517 struct virgl_renderer_gl_ctx_param
*params
)
519 VirtIOGPU
*g
= opaque
;
521 QEMUGLParams qparams
;
523 qparams
.major_ver
= params
->major_ver
;
524 qparams
.minor_ver
= params
->minor_ver
;
526 ctx
= dpy_gl_ctx_create(g
->scanout
[scanout_idx
].con
, &qparams
);
527 return (virgl_renderer_gl_context
)ctx
;
530 static void virgl_destroy_context(void *opaque
, virgl_renderer_gl_context ctx
)
532 VirtIOGPU
*g
= opaque
;
533 QEMUGLContext qctx
= (QEMUGLContext
)ctx
;
535 dpy_gl_ctx_destroy(g
->scanout
[0].con
, qctx
);
538 static int virgl_make_context_current(void *opaque
, int scanout_idx
,
539 virgl_renderer_gl_context ctx
)
541 VirtIOGPU
*g
= opaque
;
542 QEMUGLContext qctx
= (QEMUGLContext
)ctx
;
544 return dpy_gl_ctx_make_current(g
->scanout
[scanout_idx
].con
, qctx
);
547 static struct virgl_renderer_callbacks virtio_gpu_3d_cbs
= {
549 .write_fence
= virgl_write_fence
,
550 .create_gl_context
= virgl_create_context
,
551 .destroy_gl_context
= virgl_destroy_context
,
552 .make_current
= virgl_make_context_current
,
555 static void virtio_gpu_print_stats(void *opaque
)
557 VirtIOGPU
*g
= opaque
;
559 if (g
->stats
.requests
) {
560 fprintf(stderr
, "stats: vq req %4d, %3d -- 3D %4d (%5d)\n",
562 g
->stats
.max_inflight
,
565 g
->stats
.requests
= 0;
566 g
->stats
.max_inflight
= 0;
568 g
->stats
.bytes_3d
= 0;
570 fprintf(stderr
, "stats: idle\r");
572 timer_mod(g
->print_stats
, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + 1000);
575 static void virtio_gpu_fence_poll(void *opaque
)
577 VirtIOGPU
*g
= opaque
;
579 virgl_renderer_poll();
580 virtio_gpu_process_cmdq(g
);
581 if (!QTAILQ_EMPTY(&g
->cmdq
) || !QTAILQ_EMPTY(&g
->fenceq
)) {
582 timer_mod(g
->fence_poll
, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + 10);
586 void virtio_gpu_virgl_fence_poll(VirtIOGPU
*g
)
588 virtio_gpu_fence_poll(g
);
591 void virtio_gpu_virgl_reset(VirtIOGPU
*g
)
595 /* virgl_renderer_reset() ??? */
596 for (i
= 0; i
< g
->conf
.max_outputs
; i
++) {
598 dpy_gfx_replace_surface(g
->scanout
[i
].con
, NULL
);
600 dpy_gl_scanout(g
->scanout
[i
].con
, 0, false, 0, 0, 0, 0, 0, 0);
604 int virtio_gpu_virgl_init(VirtIOGPU
*g
)
608 ret
= virgl_renderer_init(g
, 0, &virtio_gpu_3d_cbs
);
613 g
->fence_poll
= timer_new_ms(QEMU_CLOCK_VIRTUAL
,
614 virtio_gpu_fence_poll
, g
);
616 if (virtio_gpu_stats_enabled(g
->conf
)) {
617 g
->print_stats
= timer_new_ms(QEMU_CLOCK_VIRTUAL
,
618 virtio_gpu_print_stats
, g
);
619 timer_mod(g
->print_stats
, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + 1000);
624 #endif /* CONFIG_VIRGL */