hw/arm/virt: Make accels in GIC finalize logic explicit
[qemu.git] / target / microblaze / cpu-qom.h
blobcda9220fa99f76c913ef19a37f5fcb40499cd81c
1 /*
2 * QEMU MicroBlaze CPU
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
20 #ifndef QEMU_MICROBLAZE_CPU_QOM_H
21 #define QEMU_MICROBLAZE_CPU_QOM_H
23 #include "hw/core/cpu.h"
24 #include "qom/object.h"
26 #define TYPE_MICROBLAZE_CPU "microblaze-cpu"
28 OBJECT_DECLARE_CPU_TYPE(MicroBlazeCPU, MicroBlazeCPUClass, MICROBLAZE_CPU)
30 /**
31 * MicroBlazeCPUClass:
32 * @parent_realize: The parent class' realize handler.
33 * @parent_phases: The parent class' reset phase handlers.
35 * A MicroBlaze CPU model.
37 struct MicroBlazeCPUClass {
38 /*< private >*/
39 CPUClass parent_class;
40 /*< public >*/
42 DeviceRealize parent_realize;
43 ResettablePhases parent_phases;
47 #endif