4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "qemu-common.h"
22 #include "exec/gdbstub.h"
23 #include "qemu/host-utils.h"
24 #ifndef CONFIG_USER_ONLY
25 #include "hw/loader.h"
28 void openrisc_cpu_do_interrupt(CPUState
*cs
)
30 #ifndef CONFIG_USER_ONLY
31 OpenRISCCPU
*cpu
= OPENRISC_CPU(cs
);
32 CPUOpenRISCState
*env
= &cpu
->env
;
35 if (env
->flags
& D_FLAG
) {
36 env
->flags
&= ~D_FLAG
;
40 if (cs
->exception_index
== EXCP_SYSCALL
) {
44 /* For machine-state changed between user-mode and supervisor mode,
45 we need flush TLB when we enter&exit EXCP. */
54 env
->tlb
->cpu_openrisc_map_address_data
= &cpu_openrisc_get_phys_nommu
;
55 env
->tlb
->cpu_openrisc_map_address_code
= &cpu_openrisc_get_phys_nommu
;
57 if (cs
->exception_index
> 0 && cs
->exception_index
< EXCP_NR
) {
58 env
->pc
= (cs
->exception_index
<< 8);
60 cpu_abort(cs
, "Unhandled exception 0x%x\n", cs
->exception_index
);
64 cs
->exception_index
= -1;
67 bool openrisc_cpu_exec_interrupt(CPUState
*cs
, int interrupt_request
)
69 OpenRISCCPU
*cpu
= OPENRISC_CPU(cs
);
70 CPUOpenRISCState
*env
= &cpu
->env
;
73 if ((interrupt_request
& CPU_INTERRUPT_HARD
) && (env
->sr
& SR_IEE
)) {
76 if ((interrupt_request
& CPU_INTERRUPT_TIMER
) && (env
->sr
& SR_TEE
)) {
80 cs
->exception_index
= idx
;
81 openrisc_cpu_do_interrupt(cs
);