2 * QEMU model of the ZynqMP generic DMA
4 * Copyright (c) 2014 Xilinx Inc.
5 * Copyright (c) 2018 FEIMTECH AB
7 * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>,
8 * Francisco Iglesias <francisco.iglesias@feimtech.se>
10 * Permission is hereby granted, free of charge, to any person obtaining a copy
11 * of this software and associated documentation files (the "Software"), to deal
12 * in the Software without restriction, including without limitation the rights
13 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
14 * copies of the Software, and to permit persons to whom the Software is
15 * furnished to do so, subject to the following conditions:
17 * The above copyright notice and this permission notice shall be included in
18 * all copies or substantial portions of the Software.
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
32 #include "hw/sysbus.h"
33 #include "hw/register.h"
34 #include "sysemu/dma.h"
36 #define ZDMA_R_MAX (0x204 / 4)
53 typedef struct XlnxZDMA
{
54 SysBusDevice parent_obj
;
59 qemu_irq irq_zdma_ch_imr
;
68 XlnxZDMADescr dsc_src
;
69 XlnxZDMADescr dsc_dst
;
71 uint32_t regs
[ZDMA_R_MAX
];
72 RegisterInfo regs_info
[ZDMA_R_MAX
];
74 /* We don't model the common bufs. Must be at least 16 bytes
75 to model write only mode. */
79 #define TYPE_XLNX_ZDMA "xlnx.zdma"
81 #define XLNX_ZDMA(obj) \
82 OBJECT_CHECK(XlnxZDMA, (obj), TYPE_XLNX_ZDMA)
84 #endif /* XLNX_ZDMA_H */