include/hw/char/escc.h

   1 #ifndef HW_ESCC_H
   2 #define HW_ESCC_H
   3
   4 #include "chardev/char-fe.h"
   5 #include "chardev/char-serial.h"
   6 #include "ui/input.h"
   7
   8 /* escc.c */
   9 #define TYPE_ESCC "escc"
  10 #define ESCC_SIZE 4
  11
  12 #define ESCC(obj) OBJECT_CHECK(ESCCState, (obj), TYPE_ESCC)
  13
  14 typedef enum {
  15     escc_chn_a, escc_chn_b,
  16 } ESCCChnID;
  17
  18 typedef enum {
  19     escc_serial, escc_kbd, escc_mouse,
  20 } ESCCChnType;
  21
  22 #define ESCC_SERIO_QUEUE_SIZE 256
  23
  24 typedef struct {
  25     uint8_t data[ESCC_SERIO_QUEUE_SIZE];
  26     int rptr, wptr, count;
  27 } ESCCSERIOQueue;
  28
  29 #define ESCC_SERIAL_REGS 16
  30 typedef struct ESCCChannelState {
  31     qemu_irq irq;
  32     uint32_t rxint, txint, rxint_under_svc, txint_under_svc;
  33     struct ESCCChannelState *otherchn;
  34     uint32_t reg;
  35     uint8_t wregs[ESCC_SERIAL_REGS], rregs[ESCC_SERIAL_REGS];
  36     ESCCSERIOQueue queue;
  37     CharBackend chr;
  38     int e0_mode, led_mode, caps_lock_mode, num_lock_mode;
  39     int disabled;
  40     int clock;
  41     uint32_t vmstate_dummy;
  42     ESCCChnID chn; /* this channel, A (base+4) or B (base+0) */
  43     ESCCChnType type;
  44     uint8_t rx, tx;
  45     QemuInputHandlerState *hs;
  46 } ESCCChannelState;
  47
  48 typedef struct ESCCState {
  49     SysBusDevice parent_obj;
  50
  51     struct ESCCChannelState chn[2];
  52     uint32_t it_shift;
  53     MemoryRegion mmio;
  54     uint32_t disabled;
  55     uint32_t frequency;
  56 } ESCCState;
  57
  58 #endif