2 * QEMU Floppy disk emulator (Intel 82078)
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
32 #include "qemu-error.h"
33 #include "qemu-timer.h"
36 #include "qdev-addr.h"
40 /********************************************************/
41 /* debug Floppy devices */
42 //#define DEBUG_FLOPPY
45 #define FLOPPY_DPRINTF(fmt, ...) \
46 do { printf("FLOPPY: " fmt , ## __VA_ARGS__); } while (0)
48 #define FLOPPY_DPRINTF(fmt, ...)
51 #define FLOPPY_ERROR(fmt, ...) \
52 do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
54 /********************************************************/
55 /* Floppy drive emulation */
57 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
58 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
60 /* Will always be a fixed parameter for us */
61 #define FD_SECTOR_LEN 512
62 #define FD_SECTOR_SC 2 /* Sector size code */
63 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
65 /* Floppy disk drive emulation */
66 typedef enum FDiskFlags
{
67 FDISK_DBL_SIDES
= 0x01,
70 typedef struct FDrive
{
74 uint8_t perpendicular
; /* 2.88 MB access mode */
81 uint8_t last_sect
; /* Nb sector per track */
82 uint8_t max_track
; /* Nb of tracks */
83 uint16_t bps
; /* Bytes per sector */
84 uint8_t ro
; /* Is read-only */
87 static void fd_init(FDrive
*drv
)
90 drv
->drive
= FDRIVE_DRV_NONE
;
91 drv
->perpendicular
= 0;
97 static int fd_sector_calc(uint8_t head
, uint8_t track
, uint8_t sect
,
100 return (((track
* 2) + head
) * last_sect
) + sect
- 1;
103 /* Returns current position, in sectors, for given drive */
104 static int fd_sector(FDrive
*drv
)
106 return fd_sector_calc(drv
->head
, drv
->track
, drv
->sect
, drv
->last_sect
);
109 /* Seek to a new position:
110 * returns 0 if already on right track
111 * returns 1 if track changed
112 * returns 2 if track is invalid
113 * returns 3 if sector is invalid
114 * returns 4 if seek is disabled
116 static int fd_seek(FDrive
*drv
, uint8_t head
, uint8_t track
, uint8_t sect
,
122 if (track
> drv
->max_track
||
123 (head
!= 0 && (drv
->flags
& FDISK_DBL_SIDES
) == 0)) {
124 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
125 head
, track
, sect
, 1,
126 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
127 drv
->max_track
, drv
->last_sect
);
130 if (sect
> drv
->last_sect
) {
131 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
132 head
, track
, sect
, 1,
133 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
134 drv
->max_track
, drv
->last_sect
);
137 sector
= fd_sector_calc(head
, track
, sect
, drv
->last_sect
);
139 if (sector
!= fd_sector(drv
)) {
142 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
143 head
, track
, sect
, 1, drv
->max_track
, drv
->last_sect
);
148 if (drv
->track
!= track
)
157 /* Set drive back to track 0 */
158 static void fd_recalibrate(FDrive
*drv
)
160 FLOPPY_DPRINTF("recalibrate\n");
166 /* Revalidate a disk drive after a disk change */
167 static void fd_revalidate(FDrive
*drv
)
169 int nb_heads
, max_track
, last_sect
, ro
;
172 FLOPPY_DPRINTF("revalidate\n");
173 if (drv
->bs
!= NULL
&& bdrv_is_inserted(drv
->bs
)) {
174 ro
= bdrv_is_read_only(drv
->bs
);
175 bdrv_get_floppy_geometry_hint(drv
->bs
, &nb_heads
, &max_track
,
176 &last_sect
, drv
->drive
, &drive
);
177 if (nb_heads
!= 0 && max_track
!= 0 && last_sect
!= 0) {
178 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
179 nb_heads
- 1, max_track
, last_sect
);
181 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n", nb_heads
,
182 max_track
, last_sect
, ro
? "ro" : "rw");
185 drv
->flags
&= ~FDISK_DBL_SIDES
;
187 drv
->flags
|= FDISK_DBL_SIDES
;
189 drv
->max_track
= max_track
;
190 drv
->last_sect
= last_sect
;
194 FLOPPY_DPRINTF("No disk in drive\n");
197 drv
->flags
&= ~FDISK_DBL_SIDES
;
201 /********************************************************/
202 /* Intel 82078 floppy disk controller emulation */
204 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
);
205 static void fdctrl_reset_fifo(FDCtrl
*fdctrl
);
206 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
207 int dma_pos
, int dma_len
);
208 static void fdctrl_raise_irq(FDCtrl
*fdctrl
, uint8_t status0
);
210 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
);
211 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
);
212 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
);
213 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
);
214 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
);
215 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
);
216 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
);
217 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
);
218 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
);
219 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
);
220 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
);
231 FD_STATE_MULTI
= 0x01, /* multi track flag */
232 FD_STATE_FORMAT
= 0x02, /* format flag */
233 FD_STATE_SEEK
= 0x04, /* seek flag */
248 FD_CMD_READ_TRACK
= 0x02,
249 FD_CMD_SPECIFY
= 0x03,
250 FD_CMD_SENSE_DRIVE_STATUS
= 0x04,
253 FD_CMD_RECALIBRATE
= 0x07,
254 FD_CMD_SENSE_INTERRUPT_STATUS
= 0x08,
255 FD_CMD_WRITE_DELETED
= 0x09,
256 FD_CMD_READ_ID
= 0x0a,
257 FD_CMD_READ_DELETED
= 0x0c,
258 FD_CMD_FORMAT_TRACK
= 0x0d,
259 FD_CMD_DUMPREG
= 0x0e,
261 FD_CMD_VERSION
= 0x10,
262 FD_CMD_SCAN_EQUAL
= 0x11,
263 FD_CMD_PERPENDICULAR_MODE
= 0x12,
264 FD_CMD_CONFIGURE
= 0x13,
266 FD_CMD_VERIFY
= 0x16,
267 FD_CMD_POWERDOWN_MODE
= 0x17,
268 FD_CMD_PART_ID
= 0x18,
269 FD_CMD_SCAN_LOW_OR_EQUAL
= 0x19,
270 FD_CMD_SCAN_HIGH_OR_EQUAL
= 0x1d,
272 FD_CMD_OPTION
= 0x33,
273 FD_CMD_RESTORE
= 0x4e,
274 FD_CMD_DRIVE_SPECIFICATION_COMMAND
= 0x8e,
275 FD_CMD_RELATIVE_SEEK_OUT
= 0x8f,
276 FD_CMD_FORMAT_AND_WRITE
= 0xcd,
277 FD_CMD_RELATIVE_SEEK_IN
= 0xcf,
281 FD_CONFIG_PRETRK
= 0xff, /* Pre-compensation set to track 0 */
282 FD_CONFIG_FIFOTHR
= 0x0f, /* FIFO threshold set to 1 byte */
283 FD_CONFIG_POLL
= 0x10, /* Poll enabled */
284 FD_CONFIG_EFIFO
= 0x20, /* FIFO disabled */
285 FD_CONFIG_EIS
= 0x40, /* No implied seeks */
291 FD_SR0_ABNTERM
= 0x40,
292 FD_SR0_INVCMD
= 0x80,
293 FD_SR0_RDYCHG
= 0xc0,
297 FD_SR1_EC
= 0x80, /* End of cylinder */
301 FD_SR2_SNS
= 0x04, /* Scan not satisfied */
302 FD_SR2_SEH
= 0x08, /* Scan equal hit */
313 FD_SRA_INTPEND
= 0x80,
327 FD_DOR_SELMASK
= 0x03,
329 FD_DOR_SELMASK
= 0x01,
331 FD_DOR_nRESET
= 0x04,
333 FD_DOR_MOTEN0
= 0x10,
334 FD_DOR_MOTEN1
= 0x20,
335 FD_DOR_MOTEN2
= 0x40,
336 FD_DOR_MOTEN3
= 0x80,
341 FD_TDR_BOOTSEL
= 0x0c,
343 FD_TDR_BOOTSEL
= 0x04,
348 FD_DSR_DRATEMASK
= 0x03,
349 FD_DSR_PWRDOWN
= 0x40,
350 FD_DSR_SWRESET
= 0x80,
354 FD_MSR_DRV0BUSY
= 0x01,
355 FD_MSR_DRV1BUSY
= 0x02,
356 FD_MSR_DRV2BUSY
= 0x04,
357 FD_MSR_DRV3BUSY
= 0x08,
358 FD_MSR_CMDBUSY
= 0x10,
359 FD_MSR_NONDMA
= 0x20,
365 FD_DIR_DSKCHG
= 0x80,
368 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
369 #define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
370 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
373 /* Controller's identification */
378 /* Controller state */
379 QEMUTimer
*result_timer
;
383 uint8_t dor_vmstate
; /* only used as temp during vmstate */
398 uint8_t eot
; /* last wanted sector */
399 /* States kept only to be returned back */
403 /* precompensation */
407 /* Power down config (also with status regB access mode */
412 uint8_t num_floppies
;
413 FDrive drives
[MAX_FD
];
417 typedef struct FDCtrlSysBus
{
422 typedef struct FDCtrlISABus
{
429 static uint32_t fdctrl_read (void *opaque
, uint32_t reg
)
431 FDCtrl
*fdctrl
= opaque
;
436 retval
= fdctrl_read_statusA(fdctrl
);
439 retval
= fdctrl_read_statusB(fdctrl
);
442 retval
= fdctrl_read_dor(fdctrl
);
445 retval
= fdctrl_read_tape(fdctrl
);
448 retval
= fdctrl_read_main_status(fdctrl
);
451 retval
= fdctrl_read_data(fdctrl
);
454 retval
= fdctrl_read_dir(fdctrl
);
457 retval
= (uint32_t)(-1);
460 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg
& 7, retval
);
465 static void fdctrl_write (void *opaque
, uint32_t reg
, uint32_t value
)
467 FDCtrl
*fdctrl
= opaque
;
469 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg
& 7, value
);
473 fdctrl_write_dor(fdctrl
, value
);
476 fdctrl_write_tape(fdctrl
, value
);
479 fdctrl_write_rate(fdctrl
, value
);
482 fdctrl_write_data(fdctrl
, value
);
489 static uint32_t fdctrl_read_port (void *opaque
, uint32_t reg
)
491 return fdctrl_read(opaque
, reg
& 7);
494 static void fdctrl_write_port (void *opaque
, uint32_t reg
, uint32_t value
)
496 fdctrl_write(opaque
, reg
& 7, value
);
499 static uint32_t fdctrl_read_mem (void *opaque
, target_phys_addr_t reg
)
501 return fdctrl_read(opaque
, (uint32_t)reg
);
504 static void fdctrl_write_mem (void *opaque
,
505 target_phys_addr_t reg
, uint32_t value
)
507 fdctrl_write(opaque
, (uint32_t)reg
, value
);
510 static CPUReadMemoryFunc
* const fdctrl_mem_read
[3] = {
516 static CPUWriteMemoryFunc
* const fdctrl_mem_write
[3] = {
522 static CPUReadMemoryFunc
* const fdctrl_mem_read_strict
[3] = {
528 static CPUWriteMemoryFunc
* const fdctrl_mem_write_strict
[3] = {
534 static const VMStateDescription vmstate_fdrive
= {
537 .minimum_version_id
= 1,
538 .minimum_version_id_old
= 1,
539 .fields
= (VMStateField
[]) {
540 VMSTATE_UINT8(head
, FDrive
),
541 VMSTATE_UINT8(track
, FDrive
),
542 VMSTATE_UINT8(sect
, FDrive
),
543 VMSTATE_END_OF_LIST()
547 static void fdc_pre_save(void *opaque
)
551 s
->dor_vmstate
= s
->dor
| GET_CUR_DRV(s
);
554 static int fdc_post_load(void *opaque
, int version_id
)
558 SET_CUR_DRV(s
, s
->dor_vmstate
& FD_DOR_SELMASK
);
559 s
->dor
= s
->dor_vmstate
& ~FD_DOR_SELMASK
;
563 static const VMStateDescription vmstate_fdc
= {
566 .minimum_version_id
= 2,
567 .minimum_version_id_old
= 2,
568 .pre_save
= fdc_pre_save
,
569 .post_load
= fdc_post_load
,
570 .fields
= (VMStateField
[]) {
571 /* Controller State */
572 VMSTATE_UINT8(sra
, FDCtrl
),
573 VMSTATE_UINT8(srb
, FDCtrl
),
574 VMSTATE_UINT8(dor_vmstate
, FDCtrl
),
575 VMSTATE_UINT8(tdr
, FDCtrl
),
576 VMSTATE_UINT8(dsr
, FDCtrl
),
577 VMSTATE_UINT8(msr
, FDCtrl
),
578 VMSTATE_UINT8(status0
, FDCtrl
),
579 VMSTATE_UINT8(status1
, FDCtrl
),
580 VMSTATE_UINT8(status2
, FDCtrl
),
582 VMSTATE_VARRAY_INT32(fifo
, FDCtrl
, fifo_size
, 0, vmstate_info_uint8
,
584 VMSTATE_UINT32(data_pos
, FDCtrl
),
585 VMSTATE_UINT32(data_len
, FDCtrl
),
586 VMSTATE_UINT8(data_state
, FDCtrl
),
587 VMSTATE_UINT8(data_dir
, FDCtrl
),
588 VMSTATE_UINT8(eot
, FDCtrl
),
589 /* States kept only to be returned back */
590 VMSTATE_UINT8(timer0
, FDCtrl
),
591 VMSTATE_UINT8(timer1
, FDCtrl
),
592 VMSTATE_UINT8(precomp_trk
, FDCtrl
),
593 VMSTATE_UINT8(config
, FDCtrl
),
594 VMSTATE_UINT8(lock
, FDCtrl
),
595 VMSTATE_UINT8(pwrd
, FDCtrl
),
596 VMSTATE_UINT8_EQUAL(num_floppies
, FDCtrl
),
597 VMSTATE_STRUCT_ARRAY(drives
, FDCtrl
, MAX_FD
, 1,
598 vmstate_fdrive
, FDrive
),
599 VMSTATE_END_OF_LIST()
603 static void fdctrl_external_reset_sysbus(DeviceState
*d
)
605 FDCtrlSysBus
*sys
= container_of(d
, FDCtrlSysBus
, busdev
.qdev
);
606 FDCtrl
*s
= &sys
->state
;
611 static void fdctrl_external_reset_isa(DeviceState
*d
)
613 FDCtrlISABus
*isa
= container_of(d
, FDCtrlISABus
, busdev
.qdev
);
614 FDCtrl
*s
= &isa
->state
;
619 static void fdctrl_handle_tc(void *opaque
, int irq
, int level
)
621 //FDCtrl *s = opaque;
625 FLOPPY_DPRINTF("TC pulsed\n");
629 /* XXX: may change if moved to bdrv */
630 int fdctrl_get_drive_type(FDCtrl
*fdctrl
, int drive_num
)
632 return fdctrl
->drives
[drive_num
].drive
;
635 /* Change IRQ state */
636 static void fdctrl_reset_irq(FDCtrl
*fdctrl
)
638 if (!(fdctrl
->sra
& FD_SRA_INTPEND
))
640 FLOPPY_DPRINTF("Reset interrupt\n");
641 qemu_set_irq(fdctrl
->irq
, 0);
642 fdctrl
->sra
&= ~FD_SRA_INTPEND
;
645 static void fdctrl_raise_irq(FDCtrl
*fdctrl
, uint8_t status0
)
648 if (fdctrl
->sun4m
&& (fdctrl
->msr
& FD_MSR_CMDBUSY
)) {
650 fdctrl
->msr
&= ~FD_MSR_CMDBUSY
;
651 fdctrl
->msr
|= FD_MSR_RQM
| FD_MSR_DIO
;
652 fdctrl
->status0
= status0
;
655 if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
656 qemu_set_irq(fdctrl
->irq
, 1);
657 fdctrl
->sra
|= FD_SRA_INTPEND
;
659 fdctrl
->reset_sensei
= 0;
660 fdctrl
->status0
= status0
;
661 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl
->status0
);
664 /* Reset controller */
665 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
)
669 FLOPPY_DPRINTF("reset controller\n");
670 fdctrl_reset_irq(fdctrl
);
671 /* Initialise controller */
674 if (!fdctrl
->drives
[1].bs
)
675 fdctrl
->sra
|= FD_SRA_nDRV2
;
677 fdctrl
->dor
= FD_DOR_nRESET
;
678 fdctrl
->dor
|= (fdctrl
->dma_chann
!= -1) ? FD_DOR_DMAEN
: 0;
679 fdctrl
->msr
= FD_MSR_RQM
;
681 fdctrl
->data_pos
= 0;
682 fdctrl
->data_len
= 0;
683 fdctrl
->data_state
= 0;
684 fdctrl
->data_dir
= FD_DIR_WRITE
;
685 for (i
= 0; i
< MAX_FD
; i
++)
686 fd_recalibrate(&fdctrl
->drives
[i
]);
687 fdctrl_reset_fifo(fdctrl
);
689 fdctrl_raise_irq(fdctrl
, FD_SR0_RDYCHG
);
690 fdctrl
->reset_sensei
= FD_RESET_SENSEI_COUNT
;
694 static inline FDrive
*drv0(FDCtrl
*fdctrl
)
696 return &fdctrl
->drives
[(fdctrl
->tdr
& FD_TDR_BOOTSEL
) >> 2];
699 static inline FDrive
*drv1(FDCtrl
*fdctrl
)
701 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (1 << 2))
702 return &fdctrl
->drives
[1];
704 return &fdctrl
->drives
[0];
708 static inline FDrive
*drv2(FDCtrl
*fdctrl
)
710 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (2 << 2))
711 return &fdctrl
->drives
[2];
713 return &fdctrl
->drives
[1];
716 static inline FDrive
*drv3(FDCtrl
*fdctrl
)
718 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (3 << 2))
719 return &fdctrl
->drives
[3];
721 return &fdctrl
->drives
[2];
725 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
)
727 switch (fdctrl
->cur_drv
) {
728 case 0: return drv0(fdctrl
);
729 case 1: return drv1(fdctrl
);
731 case 2: return drv2(fdctrl
);
732 case 3: return drv3(fdctrl
);
734 default: return NULL
;
738 /* Status A register : 0x00 (read-only) */
739 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
)
741 uint32_t retval
= fdctrl
->sra
;
743 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval
);
748 /* Status B register : 0x01 (read-only) */
749 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
)
751 uint32_t retval
= fdctrl
->srb
;
753 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval
);
758 /* Digital output register : 0x02 */
759 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
)
761 uint32_t retval
= fdctrl
->dor
;
764 retval
|= fdctrl
->cur_drv
;
765 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval
);
770 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
)
772 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value
);
775 if (value
& FD_DOR_MOTEN0
)
776 fdctrl
->srb
|= FD_SRB_MTR0
;
778 fdctrl
->srb
&= ~FD_SRB_MTR0
;
779 if (value
& FD_DOR_MOTEN1
)
780 fdctrl
->srb
|= FD_SRB_MTR1
;
782 fdctrl
->srb
&= ~FD_SRB_MTR1
;
786 fdctrl
->srb
|= FD_SRB_DR0
;
788 fdctrl
->srb
&= ~FD_SRB_DR0
;
791 if (!(value
& FD_DOR_nRESET
)) {
792 if (fdctrl
->dor
& FD_DOR_nRESET
) {
793 FLOPPY_DPRINTF("controller enter RESET state\n");
796 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
797 FLOPPY_DPRINTF("controller out of RESET state\n");
798 fdctrl_reset(fdctrl
, 1);
799 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
803 fdctrl
->cur_drv
= value
& FD_DOR_SELMASK
;
808 /* Tape drive register : 0x03 */
809 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
)
811 uint32_t retval
= fdctrl
->tdr
;
813 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval
);
818 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
)
821 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
822 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
825 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value
);
826 /* Disk boot selection indicator */
827 fdctrl
->tdr
= value
& FD_TDR_BOOTSEL
;
828 /* Tape indicators: never allow */
831 /* Main status register : 0x04 (read) */
832 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
)
834 uint32_t retval
= fdctrl
->msr
;
836 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
837 fdctrl
->dor
|= FD_DOR_nRESET
;
841 retval
|= FD_MSR_DIO
;
842 fdctrl_reset_irq(fdctrl
);
845 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval
);
850 /* Data select rate register : 0x04 (write) */
851 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
)
854 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
855 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
858 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value
);
859 /* Reset: autoclear */
860 if (value
& FD_DSR_SWRESET
) {
861 fdctrl
->dor
&= ~FD_DOR_nRESET
;
862 fdctrl_reset(fdctrl
, 1);
863 fdctrl
->dor
|= FD_DOR_nRESET
;
865 if (value
& FD_DSR_PWRDOWN
) {
866 fdctrl_reset(fdctrl
, 1);
871 static int fdctrl_media_changed(FDrive
*drv
)
877 ret
= bdrv_media_changed(drv
->bs
);
884 /* Digital input register : 0x07 (read-only) */
885 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
)
889 if (fdctrl_media_changed(drv0(fdctrl
))
890 || fdctrl_media_changed(drv1(fdctrl
))
892 || fdctrl_media_changed(drv2(fdctrl
))
893 || fdctrl_media_changed(drv3(fdctrl
))
896 retval
|= FD_DIR_DSKCHG
;
898 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval
);
904 /* FIFO state control */
905 static void fdctrl_reset_fifo(FDCtrl
*fdctrl
)
907 fdctrl
->data_dir
= FD_DIR_WRITE
;
908 fdctrl
->data_pos
= 0;
909 fdctrl
->msr
&= ~(FD_MSR_CMDBUSY
| FD_MSR_DIO
);
912 /* Set FIFO status for the host to read */
913 static void fdctrl_set_fifo(FDCtrl
*fdctrl
, int fifo_len
, int do_irq
)
915 fdctrl
->data_dir
= FD_DIR_READ
;
916 fdctrl
->data_len
= fifo_len
;
917 fdctrl
->data_pos
= 0;
918 fdctrl
->msr
|= FD_MSR_CMDBUSY
| FD_MSR_RQM
| FD_MSR_DIO
;
920 fdctrl_raise_irq(fdctrl
, 0x00);
923 /* Set an error: unimplemented/unknown command */
924 static void fdctrl_unimplemented(FDCtrl
*fdctrl
, int direction
)
926 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl
->fifo
[0]);
927 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
928 fdctrl_set_fifo(fdctrl
, 1, 0);
931 /* Seek to next sector */
932 static int fdctrl_seek_to_next_sect(FDCtrl
*fdctrl
, FDrive
*cur_drv
)
934 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
935 cur_drv
->head
, cur_drv
->track
, cur_drv
->sect
,
937 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
939 if (cur_drv
->sect
>= cur_drv
->last_sect
||
940 cur_drv
->sect
== fdctrl
->eot
) {
942 if (FD_MULTI_TRACK(fdctrl
->data_state
)) {
943 if (cur_drv
->head
== 0 &&
944 (cur_drv
->flags
& FDISK_DBL_SIDES
) != 0) {
949 if ((cur_drv
->flags
& FDISK_DBL_SIDES
) == 0)
956 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
957 cur_drv
->head
, cur_drv
->track
,
958 cur_drv
->sect
, fd_sector(cur_drv
));
965 /* Callback for transfer end (stop or abort) */
966 static void fdctrl_stop_transfer(FDCtrl
*fdctrl
, uint8_t status0
,
967 uint8_t status1
, uint8_t status2
)
971 cur_drv
= get_cur_drv(fdctrl
);
972 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
973 status0
, status1
, status2
,
974 status0
| (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
));
975 fdctrl
->fifo
[0] = status0
| (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
976 fdctrl
->fifo
[1] = status1
;
977 fdctrl
->fifo
[2] = status2
;
978 fdctrl
->fifo
[3] = cur_drv
->track
;
979 fdctrl
->fifo
[4] = cur_drv
->head
;
980 fdctrl
->fifo
[5] = cur_drv
->sect
;
981 fdctrl
->fifo
[6] = FD_SECTOR_SC
;
982 fdctrl
->data_dir
= FD_DIR_READ
;
983 if (!(fdctrl
->msr
& FD_MSR_NONDMA
)) {
984 DMA_release_DREQ(fdctrl
->dma_chann
);
986 fdctrl
->msr
|= FD_MSR_RQM
| FD_MSR_DIO
;
987 fdctrl
->msr
&= ~FD_MSR_NONDMA
;
988 fdctrl_set_fifo(fdctrl
, 7, 1);
991 /* Prepare a data transfer (either DMA or FIFO) */
992 static void fdctrl_start_transfer(FDCtrl
*fdctrl
, int direction
)
998 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
999 cur_drv
= get_cur_drv(fdctrl
);
1000 kt
= fdctrl
->fifo
[2];
1001 kh
= fdctrl
->fifo
[3];
1002 ks
= fdctrl
->fifo
[4];
1003 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1004 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1005 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
));
1006 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1009 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1010 fdctrl
->fifo
[3] = kt
;
1011 fdctrl
->fifo
[4] = kh
;
1012 fdctrl
->fifo
[5] = ks
;
1016 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1017 fdctrl
->fifo
[3] = kt
;
1018 fdctrl
->fifo
[4] = kh
;
1019 fdctrl
->fifo
[5] = ks
;
1022 /* No seek enabled */
1023 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1024 fdctrl
->fifo
[3] = kt
;
1025 fdctrl
->fifo
[4] = kh
;
1026 fdctrl
->fifo
[5] = ks
;
1035 /* Set the FIFO state */
1036 fdctrl
->data_dir
= direction
;
1037 fdctrl
->data_pos
= 0;
1038 fdctrl
->msr
|= FD_MSR_CMDBUSY
;
1039 if (fdctrl
->fifo
[0] & 0x80)
1040 fdctrl
->data_state
|= FD_STATE_MULTI
;
1042 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1044 fdctrl
->data_state
|= FD_STATE_SEEK
;
1046 fdctrl
->data_state
&= ~FD_STATE_SEEK
;
1047 if (fdctrl
->fifo
[5] == 00) {
1048 fdctrl
->data_len
= fdctrl
->fifo
[8];
1051 fdctrl
->data_len
= 128 << (fdctrl
->fifo
[5] > 7 ? 7 : fdctrl
->fifo
[5]);
1052 tmp
= (fdctrl
->fifo
[6] - ks
+ 1);
1053 if (fdctrl
->fifo
[0] & 0x80)
1054 tmp
+= fdctrl
->fifo
[6];
1055 fdctrl
->data_len
*= tmp
;
1057 fdctrl
->eot
= fdctrl
->fifo
[6];
1058 if (fdctrl
->dor
& FD_DOR_DMAEN
) {
1060 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1061 dma_mode
= DMA_get_channel_mode(fdctrl
->dma_chann
);
1062 dma_mode
= (dma_mode
>> 2) & 3;
1063 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1064 dma_mode
, direction
,
1065 (128 << fdctrl
->fifo
[5]) *
1066 (cur_drv
->last_sect
- ks
+ 1), fdctrl
->data_len
);
1067 if (((direction
== FD_DIR_SCANE
|| direction
== FD_DIR_SCANL
||
1068 direction
== FD_DIR_SCANH
) && dma_mode
== 0) ||
1069 (direction
== FD_DIR_WRITE
&& dma_mode
== 2) ||
1070 (direction
== FD_DIR_READ
&& dma_mode
== 1)) {
1071 /* No access is allowed until DMA transfer has completed */
1072 fdctrl
->msr
&= ~FD_MSR_RQM
;
1073 /* Now, we just have to wait for the DMA controller to
1076 DMA_hold_DREQ(fdctrl
->dma_chann
);
1077 DMA_schedule(fdctrl
->dma_chann
);
1080 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode
, direction
);
1083 FLOPPY_DPRINTF("start non-DMA transfer\n");
1084 fdctrl
->msr
|= FD_MSR_NONDMA
;
1085 if (direction
!= FD_DIR_WRITE
)
1086 fdctrl
->msr
|= FD_MSR_DIO
;
1087 /* IO based transfer: calculate len */
1088 fdctrl_raise_irq(fdctrl
, 0x00);
1093 /* Prepare a transfer of deleted data */
1094 static void fdctrl_start_transfer_del(FDCtrl
*fdctrl
, int direction
)
1096 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1098 /* We don't handle deleted data,
1099 * so we don't return *ANYTHING*
1101 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1104 /* handlers for DMA transfers */
1105 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
1106 int dma_pos
, int dma_len
)
1110 int len
, start_pos
, rel_pos
;
1111 uint8_t status0
= 0x00, status1
= 0x00, status2
= 0x00;
1114 if (fdctrl
->msr
& FD_MSR_RQM
) {
1115 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1118 cur_drv
= get_cur_drv(fdctrl
);
1119 if (fdctrl
->data_dir
== FD_DIR_SCANE
|| fdctrl
->data_dir
== FD_DIR_SCANL
||
1120 fdctrl
->data_dir
== FD_DIR_SCANH
)
1121 status2
= FD_SR2_SNS
;
1122 if (dma_len
> fdctrl
->data_len
)
1123 dma_len
= fdctrl
->data_len
;
1124 if (cur_drv
->bs
== NULL
) {
1125 if (fdctrl
->data_dir
== FD_DIR_WRITE
)
1126 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1128 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1130 goto transfer_error
;
1132 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1133 for (start_pos
= fdctrl
->data_pos
; fdctrl
->data_pos
< dma_len
;) {
1134 len
= dma_len
- fdctrl
->data_pos
;
1135 if (len
+ rel_pos
> FD_SECTOR_LEN
)
1136 len
= FD_SECTOR_LEN
- rel_pos
;
1137 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1138 "(%d-0x%08x 0x%08x)\n", len
, dma_len
, fdctrl
->data_pos
,
1139 fdctrl
->data_len
, GET_CUR_DRV(fdctrl
), cur_drv
->head
,
1140 cur_drv
->track
, cur_drv
->sect
, fd_sector(cur_drv
),
1141 fd_sector(cur_drv
) * FD_SECTOR_LEN
);
1142 if (fdctrl
->data_dir
!= FD_DIR_WRITE
||
1143 len
< FD_SECTOR_LEN
|| rel_pos
!= 0) {
1144 /* READ & SCAN commands and realign to a sector for WRITE */
1145 if (bdrv_read(cur_drv
->bs
, fd_sector(cur_drv
),
1146 fdctrl
->fifo
, 1) < 0) {
1147 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1148 fd_sector(cur_drv
));
1149 /* Sure, image size is too small... */
1150 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1153 switch (fdctrl
->data_dir
) {
1156 DMA_write_memory (nchan
, fdctrl
->fifo
+ rel_pos
,
1157 fdctrl
->data_pos
, len
);
1160 /* WRITE commands */
1161 DMA_read_memory (nchan
, fdctrl
->fifo
+ rel_pos
,
1162 fdctrl
->data_pos
, len
);
1163 if (bdrv_write(cur_drv
->bs
, fd_sector(cur_drv
),
1164 fdctrl
->fifo
, 1) < 0) {
1165 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv
));
1166 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1167 goto transfer_error
;
1173 uint8_t tmpbuf
[FD_SECTOR_LEN
];
1175 DMA_read_memory (nchan
, tmpbuf
, fdctrl
->data_pos
, len
);
1176 ret
= memcmp(tmpbuf
, fdctrl
->fifo
+ rel_pos
, len
);
1178 status2
= FD_SR2_SEH
;
1181 if ((ret
< 0 && fdctrl
->data_dir
== FD_DIR_SCANL
) ||
1182 (ret
> 0 && fdctrl
->data_dir
== FD_DIR_SCANH
)) {
1189 fdctrl
->data_pos
+= len
;
1190 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1192 /* Seek to next sector */
1193 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
))
1198 len
= fdctrl
->data_pos
- start_pos
;
1199 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1200 fdctrl
->data_pos
, len
, fdctrl
->data_len
);
1201 if (fdctrl
->data_dir
== FD_DIR_SCANE
||
1202 fdctrl
->data_dir
== FD_DIR_SCANL
||
1203 fdctrl
->data_dir
== FD_DIR_SCANH
)
1204 status2
= FD_SR2_SEH
;
1205 if (FD_DID_SEEK(fdctrl
->data_state
))
1206 status0
|= FD_SR0_SEEK
;
1207 fdctrl
->data_len
-= len
;
1208 fdctrl_stop_transfer(fdctrl
, status0
, status1
, status2
);
1214 /* Data register : 0x05 */
1215 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
)
1218 uint32_t retval
= 0;
1221 cur_drv
= get_cur_drv(fdctrl
);
1222 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1223 if (!(fdctrl
->msr
& FD_MSR_RQM
) || !(fdctrl
->msr
& FD_MSR_DIO
)) {
1224 FLOPPY_ERROR("controller not ready for reading\n");
1227 pos
= fdctrl
->data_pos
;
1228 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
1229 pos
%= FD_SECTOR_LEN
;
1231 if (fdctrl
->data_pos
!= 0)
1232 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
1233 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1234 fd_sector(cur_drv
));
1237 if (bdrv_read(cur_drv
->bs
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1238 FLOPPY_DPRINTF("error getting sector %d\n",
1239 fd_sector(cur_drv
));
1240 /* Sure, image size is too small... */
1241 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1245 retval
= fdctrl
->fifo
[pos
];
1246 if (++fdctrl
->data_pos
== fdctrl
->data_len
) {
1247 fdctrl
->data_pos
= 0;
1248 /* Switch from transfer mode to status mode
1249 * then from status mode to command mode
1251 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
1252 fdctrl_stop_transfer(fdctrl
, FD_SR0_SEEK
, 0x00, 0x00);
1254 fdctrl_reset_fifo(fdctrl
);
1255 fdctrl_reset_irq(fdctrl
);
1258 FLOPPY_DPRINTF("data register: 0x%02x\n", retval
);
1263 static void fdctrl_format_sector(FDCtrl
*fdctrl
)
1268 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1269 cur_drv
= get_cur_drv(fdctrl
);
1270 kt
= fdctrl
->fifo
[6];
1271 kh
= fdctrl
->fifo
[7];
1272 ks
= fdctrl
->fifo
[8];
1273 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1274 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1275 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
));
1276 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1279 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1280 fdctrl
->fifo
[3] = kt
;
1281 fdctrl
->fifo
[4] = kh
;
1282 fdctrl
->fifo
[5] = ks
;
1286 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1287 fdctrl
->fifo
[3] = kt
;
1288 fdctrl
->fifo
[4] = kh
;
1289 fdctrl
->fifo
[5] = ks
;
1292 /* No seek enabled */
1293 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1294 fdctrl
->fifo
[3] = kt
;
1295 fdctrl
->fifo
[4] = kh
;
1296 fdctrl
->fifo
[5] = ks
;
1299 fdctrl
->data_state
|= FD_STATE_SEEK
;
1304 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1305 if (cur_drv
->bs
== NULL
||
1306 bdrv_write(cur_drv
->bs
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1307 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv
));
1308 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1310 if (cur_drv
->sect
== cur_drv
->last_sect
) {
1311 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1312 /* Last sector done */
1313 if (FD_DID_SEEK(fdctrl
->data_state
))
1314 fdctrl_stop_transfer(fdctrl
, FD_SR0_SEEK
, 0x00, 0x00);
1316 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1319 fdctrl
->data_pos
= 0;
1320 fdctrl
->data_len
= 4;
1325 static void fdctrl_handle_lock(FDCtrl
*fdctrl
, int direction
)
1327 fdctrl
->lock
= (fdctrl
->fifo
[0] & 0x80) ? 1 : 0;
1328 fdctrl
->fifo
[0] = fdctrl
->lock
<< 4;
1329 fdctrl_set_fifo(fdctrl
, 1, fdctrl
->lock
);
1332 static void fdctrl_handle_dumpreg(FDCtrl
*fdctrl
, int direction
)
1334 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1336 /* Drives position */
1337 fdctrl
->fifo
[0] = drv0(fdctrl
)->track
;
1338 fdctrl
->fifo
[1] = drv1(fdctrl
)->track
;
1340 fdctrl
->fifo
[2] = drv2(fdctrl
)->track
;
1341 fdctrl
->fifo
[3] = drv3(fdctrl
)->track
;
1343 fdctrl
->fifo
[2] = 0;
1344 fdctrl
->fifo
[3] = 0;
1347 fdctrl
->fifo
[4] = fdctrl
->timer0
;
1348 fdctrl
->fifo
[5] = (fdctrl
->timer1
<< 1) | (fdctrl
->dor
& FD_DOR_DMAEN
? 1 : 0);
1349 fdctrl
->fifo
[6] = cur_drv
->last_sect
;
1350 fdctrl
->fifo
[7] = (fdctrl
->lock
<< 7) |
1351 (cur_drv
->perpendicular
<< 2);
1352 fdctrl
->fifo
[8] = fdctrl
->config
;
1353 fdctrl
->fifo
[9] = fdctrl
->precomp_trk
;
1354 fdctrl_set_fifo(fdctrl
, 10, 0);
1357 static void fdctrl_handle_version(FDCtrl
*fdctrl
, int direction
)
1359 /* Controller's version */
1360 fdctrl
->fifo
[0] = fdctrl
->version
;
1361 fdctrl_set_fifo(fdctrl
, 1, 1);
1364 static void fdctrl_handle_partid(FDCtrl
*fdctrl
, int direction
)
1366 fdctrl
->fifo
[0] = 0x41; /* Stepping 1 */
1367 fdctrl_set_fifo(fdctrl
, 1, 0);
1370 static void fdctrl_handle_restore(FDCtrl
*fdctrl
, int direction
)
1372 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1374 /* Drives position */
1375 drv0(fdctrl
)->track
= fdctrl
->fifo
[3];
1376 drv1(fdctrl
)->track
= fdctrl
->fifo
[4];
1378 drv2(fdctrl
)->track
= fdctrl
->fifo
[5];
1379 drv3(fdctrl
)->track
= fdctrl
->fifo
[6];
1382 fdctrl
->timer0
= fdctrl
->fifo
[7];
1383 fdctrl
->timer1
= fdctrl
->fifo
[8];
1384 cur_drv
->last_sect
= fdctrl
->fifo
[9];
1385 fdctrl
->lock
= fdctrl
->fifo
[10] >> 7;
1386 cur_drv
->perpendicular
= (fdctrl
->fifo
[10] >> 2) & 0xF;
1387 fdctrl
->config
= fdctrl
->fifo
[11];
1388 fdctrl
->precomp_trk
= fdctrl
->fifo
[12];
1389 fdctrl
->pwrd
= fdctrl
->fifo
[13];
1390 fdctrl_reset_fifo(fdctrl
);
1393 static void fdctrl_handle_save(FDCtrl
*fdctrl
, int direction
)
1395 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1397 fdctrl
->fifo
[0] = 0;
1398 fdctrl
->fifo
[1] = 0;
1399 /* Drives position */
1400 fdctrl
->fifo
[2] = drv0(fdctrl
)->track
;
1401 fdctrl
->fifo
[3] = drv1(fdctrl
)->track
;
1403 fdctrl
->fifo
[4] = drv2(fdctrl
)->track
;
1404 fdctrl
->fifo
[5] = drv3(fdctrl
)->track
;
1406 fdctrl
->fifo
[4] = 0;
1407 fdctrl
->fifo
[5] = 0;
1410 fdctrl
->fifo
[6] = fdctrl
->timer0
;
1411 fdctrl
->fifo
[7] = fdctrl
->timer1
;
1412 fdctrl
->fifo
[8] = cur_drv
->last_sect
;
1413 fdctrl
->fifo
[9] = (fdctrl
->lock
<< 7) |
1414 (cur_drv
->perpendicular
<< 2);
1415 fdctrl
->fifo
[10] = fdctrl
->config
;
1416 fdctrl
->fifo
[11] = fdctrl
->precomp_trk
;
1417 fdctrl
->fifo
[12] = fdctrl
->pwrd
;
1418 fdctrl
->fifo
[13] = 0;
1419 fdctrl
->fifo
[14] = 0;
1420 fdctrl_set_fifo(fdctrl
, 15, 1);
1423 static void fdctrl_handle_readid(FDCtrl
*fdctrl
, int direction
)
1425 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1427 /* XXX: should set main status register to busy */
1428 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1429 qemu_mod_timer(fdctrl
->result_timer
,
1430 qemu_get_clock(vm_clock
) + (get_ticks_per_sec() / 50));
1433 static void fdctrl_handle_format_track(FDCtrl
*fdctrl
, int direction
)
1437 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1438 cur_drv
= get_cur_drv(fdctrl
);
1439 fdctrl
->data_state
|= FD_STATE_FORMAT
;
1440 if (fdctrl
->fifo
[0] & 0x80)
1441 fdctrl
->data_state
|= FD_STATE_MULTI
;
1443 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1444 fdctrl
->data_state
&= ~FD_STATE_SEEK
;
1446 fdctrl
->fifo
[2] > 7 ? 16384 : 128 << fdctrl
->fifo
[2];
1448 cur_drv
->last_sect
=
1449 cur_drv
->flags
& FDISK_DBL_SIDES
? fdctrl
->fifo
[3] :
1450 fdctrl
->fifo
[3] / 2;
1452 cur_drv
->last_sect
= fdctrl
->fifo
[3];
1454 /* TODO: implement format using DMA expected by the Bochs BIOS
1455 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1456 * the sector with the specified fill byte
1458 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1459 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1462 static void fdctrl_handle_specify(FDCtrl
*fdctrl
, int direction
)
1464 fdctrl
->timer0
= (fdctrl
->fifo
[1] >> 4) & 0xF;
1465 fdctrl
->timer1
= fdctrl
->fifo
[2] >> 1;
1466 if (fdctrl
->fifo
[2] & 1)
1467 fdctrl
->dor
&= ~FD_DOR_DMAEN
;
1469 fdctrl
->dor
|= FD_DOR_DMAEN
;
1470 /* No result back */
1471 fdctrl_reset_fifo(fdctrl
);
1474 static void fdctrl_handle_sense_drive_status(FDCtrl
*fdctrl
, int direction
)
1478 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1479 cur_drv
= get_cur_drv(fdctrl
);
1480 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1481 /* 1 Byte status back */
1482 fdctrl
->fifo
[0] = (cur_drv
->ro
<< 6) |
1483 (cur_drv
->track
== 0 ? 0x10 : 0x00) |
1484 (cur_drv
->head
<< 2) |
1485 GET_CUR_DRV(fdctrl
) |
1487 fdctrl_set_fifo(fdctrl
, 1, 0);
1490 static void fdctrl_handle_recalibrate(FDCtrl
*fdctrl
, int direction
)
1494 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1495 cur_drv
= get_cur_drv(fdctrl
);
1496 fd_recalibrate(cur_drv
);
1497 fdctrl_reset_fifo(fdctrl
);
1498 /* Raise Interrupt */
1499 fdctrl_raise_irq(fdctrl
, FD_SR0_SEEK
);
1502 static void fdctrl_handle_sense_interrupt_status(FDCtrl
*fdctrl
, int direction
)
1504 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1506 if(fdctrl
->reset_sensei
> 0) {
1508 FD_SR0_RDYCHG
+ FD_RESET_SENSEI_COUNT
- fdctrl
->reset_sensei
;
1509 fdctrl
->reset_sensei
--;
1511 /* XXX: status0 handling is broken for read/write
1512 commands, so we do this hack. It should be suppressed
1515 FD_SR0_SEEK
| (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
1518 fdctrl
->fifo
[1] = cur_drv
->track
;
1519 fdctrl_set_fifo(fdctrl
, 2, 0);
1520 fdctrl_reset_irq(fdctrl
);
1521 fdctrl
->status0
= FD_SR0_RDYCHG
;
1524 static void fdctrl_handle_seek(FDCtrl
*fdctrl
, int direction
)
1528 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1529 cur_drv
= get_cur_drv(fdctrl
);
1530 fdctrl_reset_fifo(fdctrl
);
1531 if (fdctrl
->fifo
[2] > cur_drv
->max_track
) {
1532 fdctrl_raise_irq(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
);
1534 cur_drv
->track
= fdctrl
->fifo
[2];
1535 /* Raise Interrupt */
1536 fdctrl_raise_irq(fdctrl
, FD_SR0_SEEK
);
1540 static void fdctrl_handle_perpendicular_mode(FDCtrl
*fdctrl
, int direction
)
1542 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1544 if (fdctrl
->fifo
[1] & 0x80)
1545 cur_drv
->perpendicular
= fdctrl
->fifo
[1] & 0x7;
1546 /* No result back */
1547 fdctrl_reset_fifo(fdctrl
);
1550 static void fdctrl_handle_configure(FDCtrl
*fdctrl
, int direction
)
1552 fdctrl
->config
= fdctrl
->fifo
[2];
1553 fdctrl
->precomp_trk
= fdctrl
->fifo
[3];
1554 /* No result back */
1555 fdctrl_reset_fifo(fdctrl
);
1558 static void fdctrl_handle_powerdown_mode(FDCtrl
*fdctrl
, int direction
)
1560 fdctrl
->pwrd
= fdctrl
->fifo
[1];
1561 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
1562 fdctrl_set_fifo(fdctrl
, 1, 1);
1565 static void fdctrl_handle_option(FDCtrl
*fdctrl
, int direction
)
1567 /* No result back */
1568 fdctrl_reset_fifo(fdctrl
);
1571 static void fdctrl_handle_drive_specification_command(FDCtrl
*fdctrl
, int direction
)
1573 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1575 if (fdctrl
->fifo
[fdctrl
->data_pos
- 1] & 0x80) {
1576 /* Command parameters done */
1577 if (fdctrl
->fifo
[fdctrl
->data_pos
- 1] & 0x40) {
1578 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
1579 fdctrl
->fifo
[2] = 0;
1580 fdctrl
->fifo
[3] = 0;
1581 fdctrl_set_fifo(fdctrl
, 4, 1);
1583 fdctrl_reset_fifo(fdctrl
);
1585 } else if (fdctrl
->data_len
> 7) {
1587 fdctrl
->fifo
[0] = 0x80 |
1588 (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
1589 fdctrl_set_fifo(fdctrl
, 1, 1);
1593 static void fdctrl_handle_relative_seek_out(FDCtrl
*fdctrl
, int direction
)
1597 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1598 cur_drv
= get_cur_drv(fdctrl
);
1599 if (fdctrl
->fifo
[2] + cur_drv
->track
>= cur_drv
->max_track
) {
1600 cur_drv
->track
= cur_drv
->max_track
- 1;
1602 cur_drv
->track
+= fdctrl
->fifo
[2];
1604 fdctrl_reset_fifo(fdctrl
);
1605 /* Raise Interrupt */
1606 fdctrl_raise_irq(fdctrl
, FD_SR0_SEEK
);
1609 static void fdctrl_handle_relative_seek_in(FDCtrl
*fdctrl
, int direction
)
1613 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1614 cur_drv
= get_cur_drv(fdctrl
);
1615 if (fdctrl
->fifo
[2] > cur_drv
->track
) {
1618 cur_drv
->track
-= fdctrl
->fifo
[2];
1620 fdctrl_reset_fifo(fdctrl
);
1621 /* Raise Interrupt */
1622 fdctrl_raise_irq(fdctrl
, FD_SR0_SEEK
);
1625 static const struct {
1630 void (*handler
)(FDCtrl
*fdctrl
, int direction
);
1633 { FD_CMD_READ
, 0x1f, "READ", 8, fdctrl_start_transfer
, FD_DIR_READ
},
1634 { FD_CMD_WRITE
, 0x3f, "WRITE", 8, fdctrl_start_transfer
, FD_DIR_WRITE
},
1635 { FD_CMD_SEEK
, 0xff, "SEEK", 2, fdctrl_handle_seek
},
1636 { FD_CMD_SENSE_INTERRUPT_STATUS
, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status
},
1637 { FD_CMD_RECALIBRATE
, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate
},
1638 { FD_CMD_FORMAT_TRACK
, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track
},
1639 { FD_CMD_READ_TRACK
, 0xbf, "READ TRACK", 8, fdctrl_start_transfer
, FD_DIR_READ
},
1640 { FD_CMD_RESTORE
, 0xff, "RESTORE", 17, fdctrl_handle_restore
}, /* part of READ DELETED DATA */
1641 { FD_CMD_SAVE
, 0xff, "SAVE", 0, fdctrl_handle_save
}, /* part of READ DELETED DATA */
1642 { FD_CMD_READ_DELETED
, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_READ
},
1643 { FD_CMD_SCAN_EQUAL
, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANE
},
1644 { FD_CMD_VERIFY
, 0x1f, "VERIFY", 8, fdctrl_unimplemented
},
1645 { FD_CMD_SCAN_LOW_OR_EQUAL
, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANL
},
1646 { FD_CMD_SCAN_HIGH_OR_EQUAL
, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANH
},
1647 { FD_CMD_WRITE_DELETED
, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_WRITE
},
1648 { FD_CMD_READ_ID
, 0xbf, "READ ID", 1, fdctrl_handle_readid
},
1649 { FD_CMD_SPECIFY
, 0xff, "SPECIFY", 2, fdctrl_handle_specify
},
1650 { FD_CMD_SENSE_DRIVE_STATUS
, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status
},
1651 { FD_CMD_PERPENDICULAR_MODE
, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode
},
1652 { FD_CMD_CONFIGURE
, 0xff, "CONFIGURE", 3, fdctrl_handle_configure
},
1653 { FD_CMD_POWERDOWN_MODE
, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode
},
1654 { FD_CMD_OPTION
, 0xff, "OPTION", 1, fdctrl_handle_option
},
1655 { FD_CMD_DRIVE_SPECIFICATION_COMMAND
, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command
},
1656 { FD_CMD_RELATIVE_SEEK_OUT
, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out
},
1657 { FD_CMD_FORMAT_AND_WRITE
, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented
},
1658 { FD_CMD_RELATIVE_SEEK_IN
, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in
},
1659 { FD_CMD_LOCK
, 0x7f, "LOCK", 0, fdctrl_handle_lock
},
1660 { FD_CMD_DUMPREG
, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg
},
1661 { FD_CMD_VERSION
, 0xff, "VERSION", 0, fdctrl_handle_version
},
1662 { FD_CMD_PART_ID
, 0xff, "PART ID", 0, fdctrl_handle_partid
},
1663 { FD_CMD_WRITE
, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer
, FD_DIR_WRITE
}, /* not in specification ; BeOS 4.5 bug */
1664 { 0, 0, "unknown", 0, fdctrl_unimplemented
}, /* default handler */
1666 /* Associate command to an index in the 'handlers' array */
1667 static uint8_t command_to_handler
[256];
1669 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
)
1675 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1676 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1679 if (!(fdctrl
->msr
& FD_MSR_RQM
) || (fdctrl
->msr
& FD_MSR_DIO
)) {
1680 FLOPPY_ERROR("controller not ready for writing\n");
1683 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1684 /* Is it write command time ? */
1685 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
1686 /* FIFO data write */
1687 pos
= fdctrl
->data_pos
++;
1688 pos
%= FD_SECTOR_LEN
;
1689 fdctrl
->fifo
[pos
] = value
;
1690 if (pos
== FD_SECTOR_LEN
- 1 ||
1691 fdctrl
->data_pos
== fdctrl
->data_len
) {
1692 cur_drv
= get_cur_drv(fdctrl
);
1693 if (bdrv_write(cur_drv
->bs
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1694 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv
));
1697 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
1698 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1699 fd_sector(cur_drv
));
1703 /* Switch from transfer mode to status mode
1704 * then from status mode to command mode
1706 if (fdctrl
->data_pos
== fdctrl
->data_len
)
1707 fdctrl_stop_transfer(fdctrl
, FD_SR0_SEEK
, 0x00, 0x00);
1710 if (fdctrl
->data_pos
== 0) {
1712 pos
= command_to_handler
[value
& 0xff];
1713 FLOPPY_DPRINTF("%s command\n", handlers
[pos
].name
);
1714 fdctrl
->data_len
= handlers
[pos
].parameters
+ 1;
1717 FLOPPY_DPRINTF("%s: %02x\n", __func__
, value
);
1718 fdctrl
->fifo
[fdctrl
->data_pos
++] = value
;
1719 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
1720 /* We now have all parameters
1721 * and will be able to treat the command
1723 if (fdctrl
->data_state
& FD_STATE_FORMAT
) {
1724 fdctrl_format_sector(fdctrl
);
1728 pos
= command_to_handler
[fdctrl
->fifo
[0] & 0xff];
1729 FLOPPY_DPRINTF("treat %s command\n", handlers
[pos
].name
);
1730 (*handlers
[pos
].handler
)(fdctrl
, handlers
[pos
].direction
);
1734 static void fdctrl_result_timer(void *opaque
)
1736 FDCtrl
*fdctrl
= opaque
;
1737 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1739 /* Pretend we are spinning.
1740 * This is needed for Coherent, which uses READ ID to check for
1741 * sector interleaving.
1743 if (cur_drv
->last_sect
!= 0) {
1744 cur_drv
->sect
= (cur_drv
->sect
% cur_drv
->last_sect
) + 1;
1746 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1749 /* Init functions */
1750 static int fdctrl_connect_drives(FDCtrl
*fdctrl
)
1755 for (i
= 0; i
< MAX_FD
; i
++) {
1756 drive
= &fdctrl
->drives
[i
];
1759 if (bdrv_get_on_error(drive
->bs
, 0) != BLOCK_ERR_STOP_ENOSPC
) {
1760 error_report("fdc doesn't support drive option werror");
1763 if (bdrv_get_on_error(drive
->bs
, 1) != BLOCK_ERR_REPORT
) {
1764 error_report("fdc doesn't support drive option rerror");
1770 fd_revalidate(drive
);
1772 bdrv_set_removable(drive
->bs
, 1);
1778 FDCtrl
*fdctrl_init_isa(DriveInfo
**fds
)
1782 dev
= isa_create("isa-fdc");
1784 qdev_prop_set_drive_nofail(&dev
->qdev
, "driveA", fds
[0]->bdrv
);
1787 qdev_prop_set_drive_nofail(&dev
->qdev
, "driveB", fds
[1]->bdrv
);
1789 qdev_init_nofail(&dev
->qdev
);
1790 return &(DO_UPCAST(FDCtrlISABus
, busdev
, dev
)->state
);
1793 FDCtrl
*fdctrl_init_sysbus(qemu_irq irq
, int dma_chann
,
1794 target_phys_addr_t mmio_base
, DriveInfo
**fds
)
1800 dev
= qdev_create(NULL
, "sysbus-fdc");
1801 sys
= DO_UPCAST(FDCtrlSysBus
, busdev
.qdev
, dev
);
1802 fdctrl
= &sys
->state
;
1803 fdctrl
->dma_chann
= dma_chann
; /* FIXME */
1805 qdev_prop_set_drive_nofail(dev
, "driveA", fds
[0]->bdrv
);
1808 qdev_prop_set_drive_nofail(dev
, "driveB", fds
[1]->bdrv
);
1810 qdev_init_nofail(dev
);
1811 sysbus_connect_irq(&sys
->busdev
, 0, irq
);
1812 sysbus_mmio_map(&sys
->busdev
, 0, mmio_base
);
1817 FDCtrl
*sun4m_fdctrl_init(qemu_irq irq
, target_phys_addr_t io_base
,
1818 DriveInfo
**fds
, qemu_irq
*fdc_tc
)
1824 dev
= qdev_create(NULL
, "SUNW,fdtwo");
1826 qdev_prop_set_drive_nofail(dev
, "drive", fds
[0]->bdrv
);
1828 qdev_init_nofail(dev
);
1829 sys
= DO_UPCAST(FDCtrlSysBus
, busdev
.qdev
, dev
);
1830 fdctrl
= &sys
->state
;
1831 sysbus_connect_irq(&sys
->busdev
, 0, irq
);
1832 sysbus_mmio_map(&sys
->busdev
, 0, io_base
);
1833 *fdc_tc
= qdev_get_gpio_in(dev
, 0);
1838 static int fdctrl_init_common(FDCtrl
*fdctrl
)
1841 static int command_tables_inited
= 0;
1843 /* Fill 'command_to_handler' lookup table */
1844 if (!command_tables_inited
) {
1845 command_tables_inited
= 1;
1846 for (i
= ARRAY_SIZE(handlers
) - 1; i
>= 0; i
--) {
1847 for (j
= 0; j
< sizeof(command_to_handler
); j
++) {
1848 if ((j
& handlers
[i
].mask
) == handlers
[i
].value
) {
1849 command_to_handler
[j
] = i
;
1855 FLOPPY_DPRINTF("init controller\n");
1856 fdctrl
->fifo
= qemu_memalign(512, FD_SECTOR_LEN
);
1857 fdctrl
->fifo_size
= 512;
1858 fdctrl
->result_timer
= qemu_new_timer(vm_clock
,
1859 fdctrl_result_timer
, fdctrl
);
1861 fdctrl
->version
= 0x90; /* Intel 82078 controller */
1862 fdctrl
->config
= FD_CONFIG_EIS
| FD_CONFIG_EFIFO
; /* Implicit seek, polling & FIFO enabled */
1863 fdctrl
->num_floppies
= MAX_FD
;
1865 if (fdctrl
->dma_chann
!= -1)
1866 DMA_register_channel(fdctrl
->dma_chann
, &fdctrl_transfer_handler
, fdctrl
);
1867 return fdctrl_connect_drives(fdctrl
);
1870 static int isabus_fdc_init1(ISADevice
*dev
)
1872 FDCtrlISABus
*isa
= DO_UPCAST(FDCtrlISABus
, busdev
, dev
);
1873 FDCtrl
*fdctrl
= &isa
->state
;
1879 register_ioport_read(iobase
+ 0x01, 5, 1,
1880 &fdctrl_read_port
, fdctrl
);
1881 register_ioport_read(iobase
+ 0x07, 1, 1,
1882 &fdctrl_read_port
, fdctrl
);
1883 register_ioport_write(iobase
+ 0x01, 5, 1,
1884 &fdctrl_write_port
, fdctrl
);
1885 register_ioport_write(iobase
+ 0x07, 1, 1,
1886 &fdctrl_write_port
, fdctrl
);
1887 isa_init_ioport_range(dev
, iobase
, 6);
1888 isa_init_ioport(dev
, iobase
+ 7);
1890 isa_init_irq(&isa
->busdev
, &fdctrl
->irq
, isairq
);
1891 fdctrl
->dma_chann
= dma_chann
;
1893 qdev_set_legacy_instance_id(&dev
->qdev
, iobase
, 2);
1894 ret
= fdctrl_init_common(fdctrl
);
1896 add_boot_device_path(isa
->bootindexA
, &dev
->qdev
, "/floppy@0");
1897 add_boot_device_path(isa
->bootindexB
, &dev
->qdev
, "/floppy@1");
1902 static int sysbus_fdc_init1(SysBusDevice
*dev
)
1904 FDCtrlSysBus
*sys
= DO_UPCAST(FDCtrlSysBus
, busdev
, dev
);
1905 FDCtrl
*fdctrl
= &sys
->state
;
1909 io
= cpu_register_io_memory(fdctrl_mem_read
, fdctrl_mem_write
, fdctrl
,
1910 DEVICE_NATIVE_ENDIAN
);
1911 sysbus_init_mmio(dev
, 0x08, io
);
1912 sysbus_init_irq(dev
, &fdctrl
->irq
);
1913 qdev_init_gpio_in(&dev
->qdev
, fdctrl_handle_tc
, 1);
1914 fdctrl
->dma_chann
= -1;
1916 qdev_set_legacy_instance_id(&dev
->qdev
, io
, 2);
1917 ret
= fdctrl_init_common(fdctrl
);
1922 static int sun4m_fdc_init1(SysBusDevice
*dev
)
1924 FDCtrl
*fdctrl
= &(FROM_SYSBUS(FDCtrlSysBus
, dev
)->state
);
1927 io
= cpu_register_io_memory(fdctrl_mem_read_strict
,
1928 fdctrl_mem_write_strict
, fdctrl
,
1929 DEVICE_NATIVE_ENDIAN
);
1930 sysbus_init_mmio(dev
, 0x08, io
);
1931 sysbus_init_irq(dev
, &fdctrl
->irq
);
1932 qdev_init_gpio_in(&dev
->qdev
, fdctrl_handle_tc
, 1);
1935 qdev_set_legacy_instance_id(&dev
->qdev
, io
, 2);
1936 return fdctrl_init_common(fdctrl
);
1939 static const VMStateDescription vmstate_isa_fdc
={
1942 .minimum_version_id
= 2,
1943 .fields
= (VMStateField
[]) {
1944 VMSTATE_STRUCT(state
, FDCtrlISABus
, 0, vmstate_fdc
, FDCtrl
),
1945 VMSTATE_END_OF_LIST()
1949 static ISADeviceInfo isa_fdc_info
= {
1950 .init
= isabus_fdc_init1
,
1951 .qdev
.name
= "isa-fdc",
1952 .qdev
.fw_name
= "fdc",
1953 .qdev
.size
= sizeof(FDCtrlISABus
),
1955 .qdev
.vmsd
= &vmstate_isa_fdc
,
1956 .qdev
.reset
= fdctrl_external_reset_isa
,
1957 .qdev
.props
= (Property
[]) {
1958 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus
, state
.drives
[0].bs
),
1959 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus
, state
.drives
[1].bs
),
1960 DEFINE_PROP_INT32("bootindexA", FDCtrlISABus
, bootindexA
, -1),
1961 DEFINE_PROP_INT32("bootindexB", FDCtrlISABus
, bootindexB
, -1),
1962 DEFINE_PROP_END_OF_LIST(),
1966 static const VMStateDescription vmstate_sysbus_fdc
={
1969 .minimum_version_id
= 2,
1970 .fields
= (VMStateField
[]) {
1971 VMSTATE_STRUCT(state
, FDCtrlSysBus
, 0, vmstate_fdc
, FDCtrl
),
1972 VMSTATE_END_OF_LIST()
1976 static SysBusDeviceInfo sysbus_fdc_info
= {
1977 .init
= sysbus_fdc_init1
,
1978 .qdev
.name
= "sysbus-fdc",
1979 .qdev
.size
= sizeof(FDCtrlSysBus
),
1980 .qdev
.vmsd
= &vmstate_sysbus_fdc
,
1981 .qdev
.reset
= fdctrl_external_reset_sysbus
,
1982 .qdev
.props
= (Property
[]) {
1983 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus
, state
.drives
[0].bs
),
1984 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus
, state
.drives
[1].bs
),
1985 DEFINE_PROP_END_OF_LIST(),
1989 static SysBusDeviceInfo sun4m_fdc_info
= {
1990 .init
= sun4m_fdc_init1
,
1991 .qdev
.name
= "SUNW,fdtwo",
1992 .qdev
.size
= sizeof(FDCtrlSysBus
),
1993 .qdev
.vmsd
= &vmstate_sysbus_fdc
,
1994 .qdev
.reset
= fdctrl_external_reset_sysbus
,
1995 .qdev
.props
= (Property
[]) {
1996 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus
, state
.drives
[0].bs
),
1997 DEFINE_PROP_END_OF_LIST(),
2001 static void fdc_register_devices(void)
2003 isa_qdev_register(&isa_fdc_info
);
2004 sysbus_register_withprop(&sysbus_fdc_info
);
2005 sysbus_register_withprop(&sun4m_fdc_info
);
2008 device_init(fdc_register_devices
)