hw/ac97.c

   1 /*
   2  * Copyright (C) 2006 InnoTek Systemberatung GmbH
   3  *
   4  * This file is part of VirtualBox Open Source Edition (OSE), as
   5  * available from http://www.virtualbox.org. This file is free software;
   6  * you can redistribute it and/or modify it under the terms of the GNU
   7  * General Public License as published by the Free Software Foundation,
   8  * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
   9  * distribution. VirtualBox OSE is distributed in the hope that it will
  10  * be useful, but WITHOUT ANY WARRANTY of any kind.
  11  *
  12  * If you received this file as part of a commercial VirtualBox
  13  * distribution, then only the terms of your commercial VirtualBox
  14  * license agreement apply instead of the previous paragraph.
  15  *
  16  * Contributions after 2012-01-13 are licensed under the terms of the
  17  * GNU GPL, version 2 or (at your option) any later version.
  18  */
  19
  20 #include "hw.h"
  21 #include "audiodev.h"
  22 #include "audio/audio.h"
  23 #include "pci.h"
  24 #include "dma.h"
  25
  26 enum {
  27     AC97_Reset                     = 0x00,
  28     AC97_Master_Volume_Mute        = 0x02,
  29     AC97_Headphone_Volume_Mute     = 0x04,
  30     AC97_Master_Volume_Mono_Mute   = 0x06,
  31     AC97_Master_Tone_RL            = 0x08,
  32     AC97_PC_BEEP_Volume_Mute       = 0x0A,
  33     AC97_Phone_Volume_Mute         = 0x0C,
  34     AC97_Mic_Volume_Mute           = 0x0E,
  35     AC97_Line_In_Volume_Mute       = 0x10,
  36     AC97_CD_Volume_Mute            = 0x12,
  37     AC97_Video_Volume_Mute         = 0x14,
  38     AC97_Aux_Volume_Mute           = 0x16,
  39     AC97_PCM_Out_Volume_Mute       = 0x18,
  40     AC97_Record_Select             = 0x1A,
  41     AC97_Record_Gain_Mute          = 0x1C,
  42     AC97_Record_Gain_Mic_Mute      = 0x1E,
  43     AC97_General_Purpose           = 0x20,
  44     AC97_3D_Control                = 0x22,
  45     AC97_AC_97_RESERVED            = 0x24,
  46     AC97_Powerdown_Ctrl_Stat       = 0x26,
  47     AC97_Extended_Audio_ID         = 0x28,
  48     AC97_Extended_Audio_Ctrl_Stat  = 0x2A,
  49     AC97_PCM_Front_DAC_Rate        = 0x2C,
  50     AC97_PCM_Surround_DAC_Rate     = 0x2E,
  51     AC97_PCM_LFE_DAC_Rate          = 0x30,
  52     AC97_PCM_LR_ADC_Rate           = 0x32,
  53     AC97_MIC_ADC_Rate              = 0x34,
  54     AC97_6Ch_Vol_C_LFE_Mute        = 0x36,
  55     AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
  56     AC97_Vendor_Reserved           = 0x58,
  57     AC97_Vendor_ID1                = 0x7c,
  58     AC97_Vendor_ID2                = 0x7e
  59 };
  60
  61 #define SOFT_VOLUME
  62 #define SR_FIFOE 16             /* rwc */
  63 #define SR_BCIS  8              /* rwc */
  64 #define SR_LVBCI 4              /* rwc */
  65 #define SR_CELV  2              /* ro */
  66 #define SR_DCH   1              /* ro */
  67 #define SR_VALID_MASK ((1 << 5) - 1)
  68 #define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
  69 #define SR_RO_MASK (SR_DCH | SR_CELV)
  70 #define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
  71
  72 #define CR_IOCE  16             /* rw */
  73 #define CR_FEIE  8              /* rw */
  74 #define CR_LVBIE 4              /* rw */
  75 #define CR_RR    2              /* rw */
  76 #define CR_RPBM  1              /* rw */
  77 #define CR_VALID_MASK ((1 << 5) - 1)
  78 #define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE)
  79
  80 #define GC_WR    4              /* rw */
  81 #define GC_CR    2              /* rw */
  82 #define GC_VALID_MASK ((1 << 6) - 1)
  83
  84 #define GS_MD3   (1<<17)        /* rw */
  85 #define GS_AD3   (1<<16)        /* rw */
  86 #define GS_RCS   (1<<15)        /* rwc */
  87 #define GS_B3S12 (1<<14)        /* ro */
  88 #define GS_B2S12 (1<<13)        /* ro */
  89 #define GS_B1S12 (1<<12)        /* ro */
  90 #define GS_S1R1  (1<<11)        /* rwc */
  91 #define GS_S0R1  (1<<10)        /* rwc */
  92 #define GS_S1CR  (1<<9)         /* ro */
  93 #define GS_S0CR  (1<<8)         /* ro */
  94 #define GS_MINT  (1<<7)         /* ro */
  95 #define GS_POINT (1<<6)         /* ro */
  96 #define GS_PIINT (1<<5)         /* ro */
  97 #define GS_RSRVD ((1<<4)|(1<<3))
  98 #define GS_MOINT (1<<2)         /* ro */
  99 #define GS_MIINT (1<<1)         /* ro */
 100 #define GS_GSCI  1              /* rwc */
 101 #define GS_RO_MASK (GS_B3S12|                   \
 102                     GS_B2S12|                   \
 103                     GS_B1S12|                   \
 104                     GS_S1CR|                    \
 105                     GS_S0CR|                    \
 106                     GS_MINT|                    \
 107                     GS_POINT|                   \
 108                     GS_PIINT|                   \
 109                     GS_RSRVD|                   \
 110                     GS_MOINT|                   \
 111                     GS_MIINT)
 112 #define GS_VALID_MASK ((1 << 18) - 1)
 113 #define GS_WCLEAR_MASK (GS_RCS|GS_S1R1|GS_S0R1|GS_GSCI)
 114
 115 #define BD_IOC (1<<31)
 116 #define BD_BUP (1<<30)
 117
 118 #define EACS_VRA 1
 119 #define EACS_VRM 8
 120
 121 #define MUTE_SHIFT 15
 122
 123 #define REC_MASK 7
 124 enum {
 125     REC_MIC = 0,
 126     REC_CD,
 127     REC_VIDEO,
 128     REC_AUX,
 129     REC_LINE_IN,
 130     REC_STEREO_MIX,
 131     REC_MONO_MIX,
 132     REC_PHONE
 133 };
 134
 135 typedef struct BD {
 136     uint32_t addr;
 137     uint32_t ctl_len;
 138 } BD;
 139
 140 typedef struct AC97BusMasterRegs {
 141     uint32_t bdbar;             /* rw 0 */
 142     uint8_t civ;                /* ro 0 */
 143     uint8_t lvi;                /* rw 0 */
 144     uint16_t sr;                /* rw 1 */
 145     uint16_t picb;              /* ro 0 */
 146     uint8_t piv;                /* ro 0 */
 147     uint8_t cr;                 /* rw 0 */
 148     unsigned int bd_valid;
 149     BD bd;
 150 } AC97BusMasterRegs;
 151
 152 typedef struct AC97LinkState {
 153     PCIDevice dev;
 154     QEMUSoundCard card;
 155     uint32_t use_broken_id;
 156     uint32_t glob_cnt;
 157     uint32_t glob_sta;
 158     uint32_t cas;
 159     uint32_t last_samp;
 160     AC97BusMasterRegs bm_regs[3];
 161     uint8_t mixer_data[256];
 162     SWVoiceIn *voice_pi;
 163     SWVoiceOut *voice_po;
 164     SWVoiceIn *voice_mc;
 165     int invalid_freq[3];
 166     uint8_t silence[128];
 167     int bup_flag;
 168     MemoryRegion io_nam;
 169     MemoryRegion io_nabm;
 170 } AC97LinkState;
 171
 172 enum {
 173     BUP_SET = 1,
 174     BUP_LAST = 2
 175 };
 176
 177 #ifdef DEBUG_AC97
 178 #define dolog(...) AUD_log ("ac97", __VA_ARGS__)
 179 #else
 180 #define dolog(...)
 181 #endif
 182
 183 #define MKREGS(prefix, start)                   \
 184 enum {                                          \
 185     prefix ## _BDBAR = start,                   \
 186     prefix ## _CIV = start + 4,                 \
 187     prefix ## _LVI = start + 5,                 \
 188     prefix ## _SR = start + 6,                  \
 189     prefix ## _PICB = start + 8,                \
 190     prefix ## _PIV = start + 10,                \
 191     prefix ## _CR = start + 11                  \
 192 }
 193
 194 enum {
 195     PI_INDEX = 0,
 196     PO_INDEX,
 197     MC_INDEX,
 198     LAST_INDEX
 199 };
 200
 201 MKREGS (PI, PI_INDEX * 16);
 202 MKREGS (PO, PO_INDEX * 16);
 203 MKREGS (MC, MC_INDEX * 16);
 204
 205 enum {
 206     GLOB_CNT = 0x2c,
 207     GLOB_STA = 0x30,
 208     CAS      = 0x34
 209 };
 210
 211 #define GET_BM(index) (((index) >> 4) & 3)
 212
 213 static void po_callback (void *opaque, int free);
 214 static void pi_callback (void *opaque, int avail);
 215 static void mc_callback (void *opaque, int avail);
 216
 217 static void warm_reset (AC97LinkState *s)
 218 {
 219     (void) s;
 220 }
 221
 222 static void cold_reset (AC97LinkState * s)
 223 {
 224     (void) s;
 225 }
 226
 227 static void fetch_bd (AC97LinkState *s, AC97BusMasterRegs *r)
 228 {
 229     uint8_t b[8];
 230
 231     pci_dma_read (&s->dev, r->bdbar + r->civ * 8, b, 8);
 232     r->bd_valid = 1;
 233     r->bd.addr = le32_to_cpu (*(uint32_t *) &b[0]) & ~3;
 234     r->bd.ctl_len = le32_to_cpu (*(uint32_t *) &b[4]);
 235     r->picb = r->bd.ctl_len & 0xffff;
 236     dolog ("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
 237            r->civ, r->bd.addr, r->bd.ctl_len >> 16,
 238            r->bd.ctl_len & 0xffff,
 239            (r->bd.ctl_len & 0xffff) << 1);
 240 }
 241
 242 static void update_sr (AC97LinkState *s, AC97BusMasterRegs *r, uint32_t new_sr)
 243 {
 244     int event = 0;
 245     int level = 0;
 246     uint32_t new_mask = new_sr & SR_INT_MASK;
 247     uint32_t old_mask = r->sr & SR_INT_MASK;
 248     uint32_t masks[] = {GS_PIINT, GS_POINT, GS_MINT};
 249
 250     if (new_mask ^ old_mask) {
 251         /** @todo is IRQ deasserted when only one of status bits is cleared? */
 252         if (!new_mask) {
 253             event = 1;
 254             level = 0;
 255         }
 256         else {
 257             if ((new_mask & SR_LVBCI) && (r->cr & CR_LVBIE)) {
 258                 event = 1;
 259                 level = 1;
 260             }
 261             if ((new_mask & SR_BCIS) && (r->cr & CR_IOCE)) {
 262                 event = 1;
 263                 level = 1;
 264             }
 265         }
 266     }
 267
 268     r->sr = new_sr;
 269
 270     dolog ("IOC%d LVB%d sr=%#x event=%d level=%d\n",
 271            r->sr & SR_BCIS, r->sr & SR_LVBCI,
 272            r->sr,
 273            event, level);
 274
 275     if (!event)
 276         return;
 277
 278     if (level) {
 279         s->glob_sta |= masks[r - s->bm_regs];
 280         dolog ("set irq level=1\n");
 281         qemu_set_irq (s->dev.irq[0], 1);
 282     }
 283     else {
 284         s->glob_sta &= ~masks[r - s->bm_regs];
 285         dolog ("set irq level=0\n");
 286         qemu_set_irq (s->dev.irq[0], 0);
 287     }
 288 }
 289
 290 static void voice_set_active (AC97LinkState *s, int bm_index, int on)
 291 {
 292     switch (bm_index) {
 293     case PI_INDEX:
 294         AUD_set_active_in (s->voice_pi, on);
 295         break;
 296
 297     case PO_INDEX:
 298         AUD_set_active_out (s->voice_po, on);
 299         break;
 300
 301     case MC_INDEX:
 302         AUD_set_active_in (s->voice_mc, on);
 303         break;
 304
 305     default:
 306         AUD_log ("ac97", "invalid bm_index(%d) in voice_set_active", bm_index);
 307         break;
 308     }
 309 }
 310
 311 static void reset_bm_regs (AC97LinkState *s, AC97BusMasterRegs *r)
 312 {
 313     dolog ("reset_bm_regs\n");
 314     r->bdbar = 0;
 315     r->civ = 0;
 316     r->lvi = 0;
 317     /** todo do we need to do that? */
 318     update_sr (s, r, SR_DCH);
 319     r->picb = 0;
 320     r->piv = 0;
 321     r->cr = r->cr & CR_DONT_CLEAR_MASK;
 322     r->bd_valid = 0;
 323
 324     voice_set_active (s, r - s->bm_regs, 0);
 325     memset (s->silence, 0, sizeof (s->silence));
 326 }
 327
 328 static void mixer_store (AC97LinkState *s, uint32_t i, uint16_t v)
 329 {
 330     if (i + 2 > sizeof (s->mixer_data)) {
 331         dolog ("mixer_store: index %d out of bounds %zd\n",
 332                i, sizeof (s->mixer_data));
 333         return;
 334     }
 335
 336     s->mixer_data[i + 0] = v & 0xff;
 337     s->mixer_data[i + 1] = v >> 8;
 338 }
 339
 340 static uint16_t mixer_load (AC97LinkState *s, uint32_t i)
 341 {
 342     uint16_t val = 0xffff;
 343
 344     if (i + 2 > sizeof (s->mixer_data)) {
 345         dolog ("mixer_store: index %d out of bounds %zd\n",
 346                i, sizeof (s->mixer_data));
 347     }
 348     else {
 349         val = s->mixer_data[i + 0] | (s->mixer_data[i + 1] << 8);
 350     }
 351
 352     return val;
 353 }
 354
 355 static void open_voice (AC97LinkState *s, int index, int freq)
 356 {
 357     struct audsettings as;
 358
 359     as.freq = freq;
 360     as.nchannels = 2;
 361     as.fmt = AUD_FMT_S16;
 362     as.endianness = 0;
 363
 364     if (freq > 0) {
 365         s->invalid_freq[index] = 0;
 366         switch (index) {
 367         case PI_INDEX:
 368             s->voice_pi = AUD_open_in (
 369                 &s->card,
 370                 s->voice_pi,
 371                 "ac97.pi",
 372                 s,
 373                 pi_callback,
 374                 &as
 375                 );
 376             break;
 377
 378         case PO_INDEX:
 379             s->voice_po = AUD_open_out (
 380                 &s->card,
 381                 s->voice_po,
 382                 "ac97.po",
 383                 s,
 384                 po_callback,
 385                 &as
 386                 );
 387             break;
 388
 389         case MC_INDEX:
 390             s->voice_mc = AUD_open_in (
 391                 &s->card,
 392                 s->voice_mc,
 393                 "ac97.mc",
 394                 s,
 395                 mc_callback,
 396                 &as
 397                 );
 398             break;
 399         }
 400     }
 401     else {
 402         s->invalid_freq[index] = freq;
 403         switch (index) {
 404         case PI_INDEX:
 405             AUD_close_in (&s->card, s->voice_pi);
 406             s->voice_pi = NULL;
 407             break;
 408
 409         case PO_INDEX:
 410             AUD_close_out (&s->card, s->voice_po);
 411             s->voice_po = NULL;
 412             break;
 413
 414         case MC_INDEX:
 415             AUD_close_in (&s->card, s->voice_mc);
 416             s->voice_mc = NULL;
 417             break;
 418         }
 419     }
 420 }
 421
 422 static void reset_voices (AC97LinkState *s, uint8_t active[LAST_INDEX])
 423 {
 424     uint16_t freq;
 425
 426     freq = mixer_load (s, AC97_PCM_LR_ADC_Rate);
 427     open_voice (s, PI_INDEX, freq);
 428     AUD_set_active_in (s->voice_pi, active[PI_INDEX]);
 429
 430     freq = mixer_load (s, AC97_PCM_Front_DAC_Rate);
 431     open_voice (s, PO_INDEX, freq);
 432     AUD_set_active_out (s->voice_po, active[PO_INDEX]);
 433
 434     freq = mixer_load (s, AC97_MIC_ADC_Rate);
 435     open_voice (s, MC_INDEX, freq);
 436     AUD_set_active_in (s->voice_mc, active[MC_INDEX]);
 437 }
 438
 439 static void mixer_reset (AC97LinkState *s)
 440 {
 441     uint8_t active[LAST_INDEX];
 442
 443     dolog ("mixer_reset\n");
 444     memset (s->mixer_data, 0, sizeof (s->mixer_data));
 445     memset (active, 0, sizeof (active));
 446     mixer_store (s, AC97_Reset                   , 0x0000); /* 6940 */
 447     mixer_store (s, AC97_Master_Volume_Mono_Mute , 0x8000);
 448     mixer_store (s, AC97_PC_BEEP_Volume_Mute     , 0x0000);
 449
 450     mixer_store (s, AC97_Phone_Volume_Mute       , 0x8008);
 451     mixer_store (s, AC97_Mic_Volume_Mute         , 0x8008);
 452     mixer_store (s, AC97_CD_Volume_Mute          , 0x8808);
 453     mixer_store (s, AC97_Aux_Volume_Mute         , 0x8808);
 454     mixer_store (s, AC97_Record_Gain_Mic_Mute    , 0x8000);
 455     mixer_store (s, AC97_General_Purpose         , 0x0000);
 456     mixer_store (s, AC97_3D_Control              , 0x0000);
 457     mixer_store (s, AC97_Powerdown_Ctrl_Stat     , 0x000f);
 458
 459     /*
 460      * Sigmatel 9700 (STAC9700)
 461      */
 462     mixer_store (s, AC97_Vendor_ID1              , 0x8384);
 463     mixer_store (s, AC97_Vendor_ID2              , 0x7600); /* 7608 */
 464
 465     mixer_store (s, AC97_Extended_Audio_ID       , 0x0809);
 466     mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
 467     mixer_store (s, AC97_PCM_Front_DAC_Rate      , 0xbb80);
 468     mixer_store (s, AC97_PCM_Surround_DAC_Rate   , 0xbb80);
 469     mixer_store (s, AC97_PCM_LFE_DAC_Rate        , 0xbb80);
 470     mixer_store (s, AC97_PCM_LR_ADC_Rate         , 0xbb80);
 471     mixer_store (s, AC97_MIC_ADC_Rate            , 0xbb80);
 472
 473     reset_voices (s, active);
 474 }
 475
 476 /**
 477  * Native audio mixer
 478  * I/O Reads
 479  */
 480 static uint32_t nam_readb (void *opaque, uint32_t addr)
 481 {
 482     AC97LinkState *s = opaque;
 483     dolog ("U nam readb %#x\n", addr);
 484     s->cas = 0;
 485     return ~0U;
 486 }
 487
 488 static uint32_t nam_readw (void *opaque, uint32_t addr)
 489 {
 490     AC97LinkState *s = opaque;
 491     uint32_t val = ~0U;
 492     uint32_t index = addr;
 493     s->cas = 0;
 494     val = mixer_load (s, index);
 495     return val;
 496 }
 497
 498 static uint32_t nam_readl (void *opaque, uint32_t addr)
 499 {
 500     AC97LinkState *s = opaque;
 501     dolog ("U nam readl %#x\n", addr);
 502     s->cas = 0;
 503     return ~0U;
 504 }
 505
 506 /**
 507  * Native audio mixer
 508  * I/O Writes
 509  */
 510 static void nam_writeb (void *opaque, uint32_t addr, uint32_t val)
 511 {
 512     AC97LinkState *s = opaque;
 513     dolog ("U nam writeb %#x <- %#x\n", addr, val);
 514     s->cas = 0;
 515 }
 516
 517 static void nam_writew (void *opaque, uint32_t addr, uint32_t val)
 518 {
 519     AC97LinkState *s = opaque;
 520     uint32_t index = addr;
 521     s->cas = 0;
 522     switch (index) {
 523     case AC97_Reset:
 524         mixer_reset (s);
 525         break;
 526     case AC97_Powerdown_Ctrl_Stat:
 527         val &= ~0xf;
 528         val |= mixer_load (s, index) & 0xf;
 529         mixer_store (s, index, val);
 530         break;
 531     case AC97_Vendor_ID1:
 532     case AC97_Vendor_ID2:
 533         dolog ("Attempt to write vendor ID to %#x\n", val);
 534         break;
 535     case AC97_Extended_Audio_ID:
 536         dolog ("Attempt to write extended audio ID to %#x\n", val);
 537         break;
 538     case AC97_Extended_Audio_Ctrl_Stat:
 539         if (!(val & EACS_VRA)) {
 540             mixer_store (s, AC97_PCM_Front_DAC_Rate, 0xbb80);
 541             mixer_store (s, AC97_PCM_LR_ADC_Rate,    0xbb80);
 542             open_voice (s, PI_INDEX, 48000);
 543             open_voice (s, PO_INDEX, 48000);
 544         }
 545         if (!(val & EACS_VRM)) {
 546             mixer_store (s, AC97_MIC_ADC_Rate, 0xbb80);
 547             open_voice (s, MC_INDEX, 48000);
 548         }
 549         dolog ("Setting extended audio control to %#x\n", val);
 550         mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, val);
 551         break;
 552     case AC97_PCM_Front_DAC_Rate:
 553         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
 554             mixer_store (s, index, val);
 555             dolog ("Set front DAC rate to %d\n", val);
 556             open_voice (s, PO_INDEX, val);
 557         }
 558         else {
 559             dolog ("Attempt to set front DAC rate to %d, "
 560                    "but VRA is not set\n",
 561                    val);
 562         }
 563         break;
 564     case AC97_MIC_ADC_Rate:
 565         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM) {
 566             mixer_store (s, index, val);
 567             dolog ("Set MIC ADC rate to %d\n", val);
 568             open_voice (s, MC_INDEX, val);
 569         }
 570         else {
 571             dolog ("Attempt to set MIC ADC rate to %d, "
 572                    "but VRM is not set\n",
 573                    val);
 574         }
 575         break;
 576     case AC97_PCM_LR_ADC_Rate:
 577         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
 578             mixer_store (s, index, val);
 579             dolog ("Set front LR ADC rate to %d\n", val);
 580             open_voice (s, PI_INDEX, val);
 581         }
 582         else {
 583             dolog ("Attempt to set LR ADC rate to %d, but VRA is not set\n",
 584                     val);
 585         }
 586         break;
 587     default:
 588         dolog ("U nam writew %#x <- %#x\n", addr, val);
 589         mixer_store (s, index, val);
 590         break;
 591     }
 592 }
 593
 594 static void nam_writel (void *opaque, uint32_t addr, uint32_t val)
 595 {
 596     AC97LinkState *s = opaque;
 597     dolog ("U nam writel %#x <- %#x\n", addr, val);
 598     s->cas = 0;
 599 }
 600
 601 /**
 602  * Native audio bus master
 603  * I/O Reads
 604  */
 605 static uint32_t nabm_readb (void *opaque, uint32_t addr)
 606 {
 607     AC97LinkState *s = opaque;
 608     AC97BusMasterRegs *r = NULL;
 609     uint32_t index = addr;
 610     uint32_t val = ~0U;
 611
 612     switch (index) {
 613     case CAS:
 614         dolog ("CAS %d\n", s->cas);
 615         val = s->cas;
 616         s->cas = 1;
 617         break;
 618     case PI_CIV:
 619     case PO_CIV:
 620     case MC_CIV:
 621         r = &s->bm_regs[GET_BM (index)];
 622         val = r->civ;
 623         dolog ("CIV[%d] -> %#x\n", GET_BM (index), val);
 624         break;
 625     case PI_LVI:
 626     case PO_LVI:
 627     case MC_LVI:
 628         r = &s->bm_regs[GET_BM (index)];
 629         val = r->lvi;
 630         dolog ("LVI[%d] -> %#x\n", GET_BM (index), val);
 631         break;
 632     case PI_PIV:
 633     case PO_PIV:
 634     case MC_PIV:
 635         r = &s->bm_regs[GET_BM (index)];
 636         val = r->piv;
 637         dolog ("PIV[%d] -> %#x\n", GET_BM (index), val);
 638         break;
 639     case PI_CR:
 640     case PO_CR:
 641     case MC_CR:
 642         r = &s->bm_regs[GET_BM (index)];
 643         val = r->cr;
 644         dolog ("CR[%d] -> %#x\n", GET_BM (index), val);
 645         break;
 646     case PI_SR:
 647     case PO_SR:
 648     case MC_SR:
 649         r = &s->bm_regs[GET_BM (index)];
 650         val = r->sr & 0xff;
 651         dolog ("SRb[%d] -> %#x\n", GET_BM (index), val);
 652         break;
 653     default:
 654         dolog ("U nabm readb %#x -> %#x\n", addr, val);
 655         break;
 656     }
 657     return val;
 658 }
 659
 660 static uint32_t nabm_readw (void *opaque, uint32_t addr)
 661 {
 662     AC97LinkState *s = opaque;
 663     AC97BusMasterRegs *r = NULL;
 664     uint32_t index = addr;
 665     uint32_t val = ~0U;
 666
 667     switch (index) {
 668     case PI_SR:
 669     case PO_SR:
 670     case MC_SR:
 671         r = &s->bm_regs[GET_BM (index)];
 672         val = r->sr;
 673         dolog ("SR[%d] -> %#x\n", GET_BM (index), val);
 674         break;
 675     case PI_PICB:
 676     case PO_PICB:
 677     case MC_PICB:
 678         r = &s->bm_regs[GET_BM (index)];
 679         val = r->picb;
 680         dolog ("PICB[%d] -> %#x\n", GET_BM (index), val);
 681         break;
 682     default:
 683         dolog ("U nabm readw %#x -> %#x\n", addr, val);
 684         break;
 685     }
 686     return val;
 687 }
 688
 689 static uint32_t nabm_readl (void *opaque, uint32_t addr)
 690 {
 691     AC97LinkState *s = opaque;
 692     AC97BusMasterRegs *r = NULL;
 693     uint32_t index = addr;
 694     uint32_t val = ~0U;
 695
 696     switch (index) {
 697     case PI_BDBAR:
 698     case PO_BDBAR:
 699     case MC_BDBAR:
 700         r = &s->bm_regs[GET_BM (index)];
 701         val = r->bdbar;
 702         dolog ("BMADDR[%d] -> %#x\n", GET_BM (index), val);
 703         break;
 704     case PI_CIV:
 705     case PO_CIV:
 706     case MC_CIV:
 707         r = &s->bm_regs[GET_BM (index)];
 708         val = r->civ | (r->lvi << 8) | (r->sr << 16);
 709         dolog ("CIV LVI SR[%d] -> %#x, %#x, %#x\n", GET_BM (index),
 710                r->civ, r->lvi, r->sr);
 711         break;
 712     case PI_PICB:
 713     case PO_PICB:
 714     case MC_PICB:
 715         r = &s->bm_regs[GET_BM (index)];
 716         val = r->picb | (r->piv << 16) | (r->cr << 24);
 717         dolog ("PICB PIV CR[%d] -> %#x %#x %#x %#x\n", GET_BM (index),
 718                val, r->picb, r->piv, r->cr);
 719         break;
 720     case GLOB_CNT:
 721         val = s->glob_cnt;
 722         dolog ("glob_cnt -> %#x\n", val);
 723         break;
 724     case GLOB_STA:
 725         val = s->glob_sta | GS_S0CR;
 726         dolog ("glob_sta -> %#x\n", val);
 727         break;
 728     default:
 729         dolog ("U nabm readl %#x -> %#x\n", addr, val);
 730         break;
 731     }
 732     return val;
 733 }
 734
 735 /**
 736  * Native audio bus master
 737  * I/O Writes
 738  */
 739 static void nabm_writeb (void *opaque, uint32_t addr, uint32_t val)
 740 {
 741     AC97LinkState *s = opaque;
 742     AC97BusMasterRegs *r = NULL;
 743     uint32_t index = addr;
 744     switch (index) {
 745     case PI_LVI:
 746     case PO_LVI:
 747     case MC_LVI:
 748         r = &s->bm_regs[GET_BM (index)];
 749         if ((r->cr & CR_RPBM) && (r->sr & SR_DCH)) {
 750             r->sr &= ~(SR_DCH | SR_CELV);
 751             r->civ = r->piv;
 752             r->piv = (r->piv + 1) % 32;
 753             fetch_bd (s, r);
 754         }
 755         r->lvi = val % 32;
 756         dolog ("LVI[%d] <- %#x\n", GET_BM (index), val);
 757         break;
 758     case PI_CR:
 759     case PO_CR:
 760     case MC_CR:
 761         r = &s->bm_regs[GET_BM (index)];
 762         if (val & CR_RR) {
 763             reset_bm_regs (s, r);
 764         }
 765         else {
 766             r->cr = val & CR_VALID_MASK;
 767             if (!(r->cr & CR_RPBM)) {
 768                 voice_set_active (s, r - s->bm_regs, 0);
 769                 r->sr |= SR_DCH;
 770             }
 771             else {
 772                 r->civ = r->piv;
 773                 r->piv = (r->piv + 1) % 32;
 774                 fetch_bd (s, r);
 775                 r->sr &= ~SR_DCH;
 776                 voice_set_active (s, r - s->bm_regs, 1);
 777             }
 778         }
 779         dolog ("CR[%d] <- %#x (cr %#x)\n", GET_BM (index), val, r->cr);
 780         break;
 781     case PI_SR:
 782     case PO_SR:
 783     case MC_SR:
 784         r = &s->bm_regs[GET_BM (index)];
 785         r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
 786         update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
 787         dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
 788         break;
 789     default:
 790         dolog ("U nabm writeb %#x <- %#x\n", addr, val);
 791         break;
 792     }
 793 }
 794
 795 static void nabm_writew (void *opaque, uint32_t addr, uint32_t val)
 796 {
 797     AC97LinkState *s = opaque;
 798     AC97BusMasterRegs *r = NULL;
 799     uint32_t index = addr;
 800     switch (index) {
 801     case PI_SR:
 802     case PO_SR:
 803     case MC_SR:
 804         r = &s->bm_regs[GET_BM (index)];
 805         r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
 806         update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
 807         dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
 808         break;
 809     default:
 810         dolog ("U nabm writew %#x <- %#x\n", addr, val);
 811         break;
 812     }
 813 }
 814
 815 static void nabm_writel (void *opaque, uint32_t addr, uint32_t val)
 816 {
 817     AC97LinkState *s = opaque;
 818     AC97BusMasterRegs *r = NULL;
 819     uint32_t index = addr;
 820     switch (index) {
 821     case PI_BDBAR:
 822     case PO_BDBAR:
 823     case MC_BDBAR:
 824         r = &s->bm_regs[GET_BM (index)];
 825         r->bdbar = val & ~3;
 826         dolog ("BDBAR[%d] <- %#x (bdbar %#x)\n",
 827                GET_BM (index), val, r->bdbar);
 828         break;
 829     case GLOB_CNT:
 830         if (val & GC_WR)
 831             warm_reset (s);
 832         if (val & GC_CR)
 833             cold_reset (s);
 834         if (!(val & (GC_WR | GC_CR)))
 835             s->glob_cnt = val & GC_VALID_MASK;
 836         dolog ("glob_cnt <- %#x (glob_cnt %#x)\n", val, s->glob_cnt);
 837         break;
 838     case GLOB_STA:
 839         s->glob_sta &= ~(val & GS_WCLEAR_MASK);
 840         s->glob_sta |= (val & ~(GS_WCLEAR_MASK | GS_RO_MASK)) & GS_VALID_MASK;
 841         dolog ("glob_sta <- %#x (glob_sta %#x)\n", val, s->glob_sta);
 842         break;
 843     default:
 844         dolog ("U nabm writel %#x <- %#x\n", addr, val);
 845         break;
 846     }
 847 }
 848
 849 static int write_audio (AC97LinkState *s, AC97BusMasterRegs *r,
 850                         int max, int *stop)
 851 {
 852     uint8_t tmpbuf[4096];
 853     uint32_t addr = r->bd.addr;
 854     uint32_t temp = r->picb << 1;
 855     uint32_t written = 0;
 856     int to_copy = 0;
 857     temp = audio_MIN (temp, max);
 858
 859     if (!temp) {
 860         *stop = 1;
 861         return 0;
 862     }
 863
 864     while (temp) {
 865         int copied;
 866         to_copy = audio_MIN (temp, sizeof (tmpbuf));
 867         pci_dma_read (&s->dev, addr, tmpbuf, to_copy);
 868         copied = AUD_write (s->voice_po, tmpbuf, to_copy);
 869         dolog ("write_audio max=%x to_copy=%x copied=%x\n",
 870                max, to_copy, copied);
 871         if (!copied) {
 872             *stop = 1;
 873             break;
 874         }
 875         temp -= copied;
 876         addr += copied;
 877         written += copied;
 878     }
 879
 880     if (!temp) {
 881         if (to_copy < 4) {
 882             dolog ("whoops\n");
 883             s->last_samp = 0;
 884         }
 885         else {
 886             s->last_samp = *(uint32_t *) &tmpbuf[to_copy - 4];
 887         }
 888     }
 889
 890     r->bd.addr = addr;
 891     return written;
 892 }
 893
 894 static void write_bup (AC97LinkState *s, int elapsed)
 895 {
 896     dolog ("write_bup\n");
 897     if (!(s->bup_flag & BUP_SET)) {
 898         if (s->bup_flag & BUP_LAST) {
 899             int i;
 900             uint8_t *p = s->silence;
 901             for (i = 0; i < sizeof (s->silence) / 4; i++, p += 4) {
 902                 *(uint32_t *) p = s->last_samp;
 903             }
 904         }
 905         else {
 906             memset (s->silence, 0, sizeof (s->silence));
 907         }
 908         s->bup_flag |= BUP_SET;
 909     }
 910
 911     while (elapsed) {
 912         int temp = audio_MIN (elapsed, sizeof (s->silence));
 913         while (temp) {
 914             int copied = AUD_write (s->voice_po, s->silence, temp);
 915             if (!copied)
 916                 return;
 917             temp -= copied;
 918             elapsed -= copied;
 919         }
 920     }
 921 }
 922
 923 static int read_audio (AC97LinkState *s, AC97BusMasterRegs *r,
 924                        int max, int *stop)
 925 {
 926     uint8_t tmpbuf[4096];
 927     uint32_t addr = r->bd.addr;
 928     uint32_t temp = r->picb << 1;
 929     uint32_t nread = 0;
 930     int to_copy = 0;
 931     SWVoiceIn *voice = (r - s->bm_regs) == MC_INDEX ? s->voice_mc : s->voice_pi;
 932
 933     temp = audio_MIN (temp, max);
 934
 935     if (!temp) {
 936         *stop = 1;
 937         return 0;
 938     }
 939
 940     while (temp) {
 941         int acquired;
 942         to_copy = audio_MIN (temp, sizeof (tmpbuf));
 943         acquired = AUD_read (voice, tmpbuf, to_copy);
 944         if (!acquired) {
 945             *stop = 1;
 946             break;
 947         }
 948         pci_dma_write (&s->dev, addr, tmpbuf, acquired);
 949         temp -= acquired;
 950         addr += acquired;
 951         nread += acquired;
 952     }
 953
 954     r->bd.addr = addr;
 955     return nread;
 956 }
 957
 958 static void transfer_audio (AC97LinkState *s, int index, int elapsed)
 959 {
 960     AC97BusMasterRegs *r = &s->bm_regs[index];
 961     int stop = 0;
 962
 963     if (s->invalid_freq[index]) {
 964         AUD_log ("ac97", "attempt to use voice %d with invalid frequency %d\n",
 965                  index, s->invalid_freq[index]);
 966         return;
 967     }
 968
 969     if (r->sr & SR_DCH) {
 970         if (r->cr & CR_RPBM) {
 971             switch (index) {
 972             case PO_INDEX:
 973                 write_bup (s, elapsed);
 974                 break;
 975             }
 976         }
 977         return;
 978     }
 979
 980     while ((elapsed >> 1) && !stop) {
 981         int temp;
 982
 983         if (!r->bd_valid) {
 984             dolog ("invalid bd\n");
 985             fetch_bd (s, r);
 986         }
 987
 988         if (!r->picb) {
 989             dolog ("fresh bd %d is empty %#x %#x\n",
 990                    r->civ, r->bd.addr, r->bd.ctl_len);
 991             if (r->civ == r->lvi) {
 992                 r->sr |= SR_DCH; /* CELV? */
 993                 s->bup_flag = 0;
 994                 break;
 995             }
 996             r->sr &= ~SR_CELV;
 997             r->civ = r->piv;
 998             r->piv = (r->piv + 1) % 32;
 999             fetch_bd (s, r);
1000             return;
1001         }
1002
1003         switch (index) {
1004         case PO_INDEX:
1005             temp = write_audio (s, r, elapsed, &stop);
1006             elapsed -= temp;
1007             r->picb -= (temp >> 1);
1008             break;
1009
1010         case PI_INDEX:
1011         case MC_INDEX:
1012             temp = read_audio (s, r, elapsed, &stop);
1013             elapsed -= temp;
1014             r->picb -= (temp >> 1);
1015             break;
1016         }
1017
1018         if (!r->picb) {
1019             uint32_t new_sr = r->sr & ~SR_CELV;
1020
1021             if (r->bd.ctl_len & BD_IOC) {
1022                 new_sr |= SR_BCIS;
1023             }
1024
1025             if (r->civ == r->lvi) {
1026                 dolog ("Underrun civ (%d) == lvi (%d)\n", r->civ, r->lvi);
1027
1028                 new_sr |= SR_LVBCI | SR_DCH | SR_CELV;
1029                 stop = 1;
1030                 s->bup_flag = (r->bd.ctl_len & BD_BUP) ? BUP_LAST : 0;
1031             }
1032             else {
1033                 r->civ = r->piv;
1034                 r->piv = (r->piv + 1) % 32;
1035                 fetch_bd (s, r);
1036             }
1037
1038             update_sr (s, r, new_sr);
1039         }
1040     }
1041 }
1042
1043 static void pi_callback (void *opaque, int avail)
1044 {
1045     transfer_audio (opaque, PI_INDEX, avail);
1046 }
1047
1048 static void mc_callback (void *opaque, int avail)
1049 {
1050     transfer_audio (opaque, MC_INDEX, avail);
1051 }
1052
1053 static void po_callback (void *opaque, int free)
1054 {
1055     transfer_audio (opaque, PO_INDEX, free);
1056 }
1057
1058 static const VMStateDescription vmstate_ac97_bm_regs = {
1059     .name = "ac97_bm_regs",
1060     .version_id = 1,
1061     .minimum_version_id = 1,
1062     .minimum_version_id_old = 1,
1063     .fields      = (VMStateField []) {
1064         VMSTATE_UINT32 (bdbar, AC97BusMasterRegs),
1065         VMSTATE_UINT8 (civ, AC97BusMasterRegs),
1066         VMSTATE_UINT8 (lvi, AC97BusMasterRegs),
1067         VMSTATE_UINT16 (sr, AC97BusMasterRegs),
1068         VMSTATE_UINT16 (picb, AC97BusMasterRegs),
1069         VMSTATE_UINT8 (piv, AC97BusMasterRegs),
1070         VMSTATE_UINT8 (cr, AC97BusMasterRegs),
1071         VMSTATE_UINT32 (bd_valid, AC97BusMasterRegs),
1072         VMSTATE_UINT32 (bd.addr, AC97BusMasterRegs),
1073         VMSTATE_UINT32 (bd.ctl_len, AC97BusMasterRegs),
1074         VMSTATE_END_OF_LIST ()
1075     }
1076 };
1077
1078 static int ac97_post_load (void *opaque, int version_id)
1079 {
1080     uint8_t active[LAST_INDEX];
1081     AC97LinkState *s = opaque;
1082
1083     active[PI_INDEX] = !!(s->bm_regs[PI_INDEX].cr & CR_RPBM);
1084     active[PO_INDEX] = !!(s->bm_regs[PO_INDEX].cr & CR_RPBM);
1085     active[MC_INDEX] = !!(s->bm_regs[MC_INDEX].cr & CR_RPBM);
1086     reset_voices (s, active);
1087
1088     s->bup_flag = 0;
1089     s->last_samp = 0;
1090     return 0;
1091 }
1092
1093 static bool is_version_2 (void *opaque, int version_id)
1094 {
1095     return version_id == 2;
1096 }
1097
1098 static const VMStateDescription vmstate_ac97 = {
1099     .name = "ac97",
1100     .version_id = 3,
1101     .minimum_version_id = 2,
1102     .minimum_version_id_old = 2,
1103     .post_load = ac97_post_load,
1104     .fields      = (VMStateField []) {
1105         VMSTATE_PCI_DEVICE (dev, AC97LinkState),
1106         VMSTATE_UINT32 (glob_cnt, AC97LinkState),
1107         VMSTATE_UINT32 (glob_sta, AC97LinkState),
1108         VMSTATE_UINT32 (cas, AC97LinkState),
1109         VMSTATE_STRUCT_ARRAY (bm_regs, AC97LinkState, 3, 1,
1110                               vmstate_ac97_bm_regs, AC97BusMasterRegs),
1111         VMSTATE_BUFFER (mixer_data, AC97LinkState),
1112         VMSTATE_UNUSED_TEST (is_version_2, 3),
1113         VMSTATE_END_OF_LIST ()
1114     }
1115 };
1116
1117 static const MemoryRegionPortio nam_portio[] = {
1118     { 0, 256 * 1, 1, .read = nam_readb, },
1119     { 0, 256 * 2, 2, .read = nam_readw, },
1120     { 0, 256 * 4, 4, .read = nam_readl, },
1121     { 0, 256 * 1, 1, .write = nam_writeb, },
1122     { 0, 256 * 2, 2, .write = nam_writew, },
1123     { 0, 256 * 4, 4, .write = nam_writel, },
1124     PORTIO_END_OF_LIST (),
1125 };
1126
1127 static const MemoryRegionOps ac97_io_nam_ops = {
1128     .old_portio = nam_portio,
1129 };
1130
1131 static const MemoryRegionPortio nabm_portio[] = {
1132     { 0, 64 * 1, 1, .read = nabm_readb, },
1133     { 0, 64 * 2, 2, .read = nabm_readw, },
1134     { 0, 64 * 4, 4, .read = nabm_readl, },
1135     { 0, 64 * 1, 1, .write = nabm_writeb, },
1136     { 0, 64 * 2, 2, .write = nabm_writew, },
1137     { 0, 64 * 4, 4, .write = nabm_writel, },
1138     PORTIO_END_OF_LIST ()
1139 };
1140
1141 static const MemoryRegionOps ac97_io_nabm_ops = {
1142     .old_portio = nabm_portio,
1143 };
1144
1145 static void ac97_on_reset (void *opaque)
1146 {
1147     AC97LinkState *s = opaque;
1148
1149     reset_bm_regs (s, &s->bm_regs[0]);
1150     reset_bm_regs (s, &s->bm_regs[1]);
1151     reset_bm_regs (s, &s->bm_regs[2]);
1152
1153     /*
1154      * Reset the mixer too. The Windows XP driver seems to rely on
1155      * this. At least it wants to read the vendor id before it resets
1156      * the codec manually.
1157      */
1158     mixer_reset (s);
1159 }
1160
1161 static int ac97_initfn (PCIDevice *dev)
1162 {
1163     AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, dev);
1164     uint8_t *c = s->dev.config;
1165
1166     /* TODO: no need to override */
1167     c[PCI_COMMAND] = 0x00;      /* pcicmd pci command rw, ro */
1168     c[PCI_COMMAND + 1] = 0x00;
1169
1170     /* TODO: */
1171     c[PCI_STATUS] = PCI_STATUS_FAST_BACK;      /* pcists pci status rwc, ro */
1172     c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_MEDIUM >> 8;
1173
1174     c[PCI_CLASS_PROG] = 0x00;      /* pi programming interface ro */
1175
1176     /* TODO set when bar is registered. no need to override. */
1177     /* nabmar native audio mixer base address rw */
1178     c[PCI_BASE_ADDRESS_0] = PCI_BASE_ADDRESS_SPACE_IO;
1179     c[PCI_BASE_ADDRESS_0 + 1] = 0x00;
1180     c[PCI_BASE_ADDRESS_0 + 2] = 0x00;
1181     c[PCI_BASE_ADDRESS_0 + 3] = 0x00;
1182
1183     /* TODO set when bar is registered. no need to override. */
1184       /* nabmbar native audio bus mastering base address rw */
1185     c[PCI_BASE_ADDRESS_0 + 4] = PCI_BASE_ADDRESS_SPACE_IO;
1186     c[PCI_BASE_ADDRESS_0 + 5] = 0x00;
1187     c[PCI_BASE_ADDRESS_0 + 6] = 0x00;
1188     c[PCI_BASE_ADDRESS_0 + 7] = 0x00;
1189
1190     if (s->use_broken_id) {
1191         c[PCI_SUBSYSTEM_VENDOR_ID] = 0x86;
1192         c[PCI_SUBSYSTEM_VENDOR_ID + 1] = 0x80;
1193         c[PCI_SUBSYSTEM_ID] = 0x00;
1194         c[PCI_SUBSYSTEM_ID + 1] = 0x00;
1195     }
1196
1197     c[PCI_INTERRUPT_LINE] = 0x00;      /* intr_ln interrupt line rw */
1198     c[PCI_INTERRUPT_PIN] = 0x01;      /* intr_pn interrupt pin ro */
1199
1200     memory_region_init_io (&s->io_nam, &ac97_io_nam_ops, s, "ac97-nam", 1024);
1201     memory_region_init_io (&s->io_nabm, &ac97_io_nabm_ops, s, "ac97-nabm", 256);
1202     pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nam);
1203     pci_register_bar (&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nabm);
1204     qemu_register_reset (ac97_on_reset, s);
1205     AUD_register_card ("ac97", &s->card);
1206     ac97_on_reset (s);
1207     return 0;
1208 }
1209
1210 static int ac97_exitfn (PCIDevice *dev)
1211 {
1212     AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, dev);
1213
1214     memory_region_destroy (&s->io_nam);
1215     memory_region_destroy (&s->io_nabm);
1216     return 0;
1217 }
1218
1219 int ac97_init (PCIBus *bus)
1220 {
1221     pci_create_simple (bus, -1, "AC97");
1222     return 0;
1223 }
1224
1225 static Property ac97_properties[] = {
1226     DEFINE_PROP_UINT32 ("use_broken_id", AC97LinkState, use_broken_id, 0),
1227     DEFINE_PROP_END_OF_LIST (),
1228 };
1229
1230 static void ac97_class_init (ObjectClass *klass, void *data)
1231 {
1232     DeviceClass *dc = DEVICE_CLASS (klass);
1233     PCIDeviceClass *k = PCI_DEVICE_CLASS (klass);
1234
1235     k->init = ac97_initfn;
1236     k->exit = ac97_exitfn;
1237     k->vendor_id = PCI_VENDOR_ID_INTEL;
1238     k->device_id = PCI_DEVICE_ID_INTEL_82801AA_5;
1239     k->revision = 0x01;
1240     k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
1241     dc->desc = "Intel 82801AA AC97 Audio";
1242     dc->vmsd = &vmstate_ac97;
1243     dc->props = ac97_properties;
1244 }
1245
1246 static TypeInfo ac97_info = {
1247     .name          = "AC97",
1248     .parent        = TYPE_PCI_DEVICE,
1249     .instance_size = sizeof (AC97LinkState),
1250     .class_init    = ac97_class_init,
1251 };
1252
1253 static void ac97_register_types (void)
1254 {
1255     type_register_static (&ac97_info);
1256 }
1257
1258 type_init (ac97_register_types)