x86: acpi: cleanup PCI device _DSM duplication
[qemu.git] / include / sysemu / numa.h
blob4173ef2afa75baba7cb2f03f861a1edc6f78bc87
1 #ifndef SYSEMU_NUMA_H
2 #define SYSEMU_NUMA_H
4 #include "qemu/bitmap.h"
5 #include "qapi/qapi-types-machine.h"
6 #include "exec/cpu-common.h"
8 struct CPUArchId;
10 #define MAX_NODES 128
11 #define NUMA_NODE_UNASSIGNED MAX_NODES
12 #define NUMA_DISTANCE_MIN 10
13 #define NUMA_DISTANCE_DEFAULT 20
14 #define NUMA_DISTANCE_MAX 254
15 #define NUMA_DISTANCE_UNREACHABLE 255
17 /* the value of AcpiHmatLBInfo flags */
18 enum {
19 HMAT_LB_MEM_MEMORY = 0,
20 HMAT_LB_MEM_CACHE_1ST_LEVEL = 1,
21 HMAT_LB_MEM_CACHE_2ND_LEVEL = 2,
22 HMAT_LB_MEM_CACHE_3RD_LEVEL = 3,
23 HMAT_LB_LEVELS /* must be the last entry */
26 /* the value of AcpiHmatLBInfo data type */
27 enum {
28 HMAT_LB_DATA_ACCESS_LATENCY = 0,
29 HMAT_LB_DATA_READ_LATENCY = 1,
30 HMAT_LB_DATA_WRITE_LATENCY = 2,
31 HMAT_LB_DATA_ACCESS_BANDWIDTH = 3,
32 HMAT_LB_DATA_READ_BANDWIDTH = 4,
33 HMAT_LB_DATA_WRITE_BANDWIDTH = 5,
34 HMAT_LB_TYPES /* must be the last entry */
37 #define UINT16_BITS 16
39 struct NodeInfo {
40 uint64_t node_mem;
41 struct HostMemoryBackend *node_memdev;
42 bool present;
43 bool has_cpu;
44 uint8_t lb_info_provided;
45 uint16_t initiator;
46 uint8_t distance[MAX_NODES];
49 struct NumaNodeMem {
50 uint64_t node_mem;
51 uint64_t node_plugged_mem;
54 struct HMAT_LB_Data {
55 uint8_t initiator;
56 uint8_t target;
57 uint64_t data;
59 typedef struct HMAT_LB_Data HMAT_LB_Data;
61 struct HMAT_LB_Info {
62 /* Indicates it's memory or the specified level memory side cache. */
63 uint8_t hierarchy;
65 /* Present the type of data, access/read/write latency or bandwidth. */
66 uint8_t data_type;
68 /* The range bitmap of bandwidth for calculating common base */
69 uint64_t range_bitmap;
71 /* The common base unit for latencies or bandwidths */
72 uint64_t base;
74 /* Array to store the latencies or bandwidths */
75 GArray *list;
77 typedef struct HMAT_LB_Info HMAT_LB_Info;
79 struct NumaState {
80 /* Number of NUMA nodes */
81 int num_nodes;
83 /* Allow setting NUMA distance for different NUMA nodes */
84 bool have_numa_distance;
86 /* Detect if HMAT support is enabled. */
87 bool hmat_enabled;
89 /* NUMA nodes information */
90 NodeInfo nodes[MAX_NODES];
92 /* NUMA nodes HMAT Locality Latency and Bandwidth Information */
93 HMAT_LB_Info *hmat_lb[HMAT_LB_LEVELS][HMAT_LB_TYPES];
95 /* Memory Side Cache Information Structure */
96 NumaHmatCacheOptions *hmat_cache[MAX_NODES][HMAT_LB_LEVELS];
98 typedef struct NumaState NumaState;
100 void set_numa_options(MachineState *ms, NumaOptions *object, Error **errp);
101 void parse_numa_opts(MachineState *ms);
102 void parse_numa_hmat_lb(NumaState *numa_state, NumaHmatLBOptions *node,
103 Error **errp);
104 void parse_numa_hmat_cache(MachineState *ms, NumaHmatCacheOptions *node,
105 Error **errp);
106 void numa_complete_configuration(MachineState *ms);
107 void query_numa_node_mem(NumaNodeMem node_mem[], MachineState *ms);
108 extern QemuOptsList qemu_numa_opts;
109 void numa_cpu_pre_plug(const struct CPUArchId *slot, DeviceState *dev,
110 Error **errp);
111 bool numa_uses_legacy_mem(void);
113 #endif