target/i386/tcg/helper-tcg.h

   1 /*
   2  * TCG specific prototypes for helpers
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef I386_HELPER_TCG_H
  21 #define I386_HELPER_TCG_H
  22
  23 #include "exec/exec-all.h"
  24
  25 /* Maximum instruction code size */
  26 #define TARGET_MAX_INSN_SIZE 16
  27
  28 #if defined(TARGET_X86_64)
  29 # define TCG_PHYS_ADDR_BITS 40
  30 #else
  31 # define TCG_PHYS_ADDR_BITS 36
  32 #endif
  33
  34 QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS);
  35
  36 /**
  37  * x86_cpu_do_interrupt:
  38  * @cpu: vCPU the interrupt is to be handled by.
  39  */
  40 void x86_cpu_do_interrupt(CPUState *cpu);
  41 #ifndef CONFIG_USER_ONLY
  42 bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req);
  43 #endif
  44
  45 void breakpoint_handler(CPUState *cs);
  46
  47 /* n must be a constant to be efficient */
  48 static inline target_long lshift(target_long x, int n)
  49 {
  50     if (n >= 0) {
  51         return x << n;
  52     } else {
  53         return x >> (-n);
  54     }
  55 }
  56
  57 /* translate.c */
  58 void tcg_x86_init(void);
  59
  60 /* excp_helper.c */
  61 G_NORETURN void raise_exception(CPUX86State *env, int exception_index);
  62 G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index,
  63                                    uintptr_t retaddr);
  64 G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index,
  65                                     int error_code);
  66 G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index,
  67                                        int error_code, uintptr_t retaddr);
  68 G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int is_int,
  69                                 int error_code, int next_eip_addend);
  70 G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr,
  71                                         MMUAccessType access_type,
  72                                         uintptr_t retaddr);
  73 #ifdef CONFIG_USER_ONLY
  74 void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,
  75                             MMUAccessType access_type,
  76                             bool maperr, uintptr_t ra);
  77 void x86_cpu_record_sigbus(CPUState *cs, vaddr addr,
  78                            MMUAccessType access_type, uintptr_t ra);
  79 #else
  80 bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
  81                       MMUAccessType access_type, int mmu_idx,
  82                       bool probe, uintptr_t retaddr);
  83 G_NORETURN void x86_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
  84                                             MMUAccessType access_type,
  85                                             int mmu_idx, uintptr_t retaddr);
  86 #endif
  87
  88 /* cc_helper.c */
  89 extern const uint8_t parity_table[256];
  90
  91 /* misc_helper.c */
  92 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask);
  93 G_NORETURN void do_pause(CPUX86State *env);
  94
  95 /* sysemu/svm_helper.c */
  96 #ifndef CONFIG_USER_ONLY
  97 G_NORETURN void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code,
  98                            uint64_t exit_info_1, uintptr_t retaddr);
  99 void do_vmexit(CPUX86State *env);
 100 #endif
 101
 102 /* seg_helper.c */
 103 void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw);
 104 void do_interrupt_all(X86CPU *cpu, int intno, int is_int,
 105                       int error_code, target_ulong next_eip, int is_hw);
 106 void handle_even_inj(CPUX86State *env, int intno, int is_int,
 107                      int error_code, int is_hw, int rm);
 108 int exception_has_error_code(int intno);
 109
 110 /* smm_helper.c */
 111 void do_smm_enter(X86CPU *cpu);
 112
 113 /* bpt_helper.c */
 114 bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update);
 115
 116 #endif /* I386_HELPER_TCG_H */