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[qemu.git] / hw / ppc_newworld.c
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1 /*
2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
25 #include "hw.h"
26 #include "ppc.h"
27 #include "ppc_mac.h"
28 #include "mac_dbdma.h"
29 #include "nvram.h"
30 #include "pc.h"
31 #include "pci.h"
32 #include "usb-ohci.h"
33 #include "net.h"
34 #include "sysemu.h"
35 #include "boards.h"
36 #include "fw_cfg.h"
37 #include "escc.h"
38 #include "openpic.h"
39 #include "ide.h"
40 #include "loader.h"
41 #include "elf.h"
43 #define MAX_IDE_BUS 2
44 #define VGA_BIOS_SIZE 65536
45 #define CFG_ADDR 0xf0000510
47 /* debug UniNorth */
48 //#define DEBUG_UNIN
50 #ifdef DEBUG_UNIN
51 #define UNIN_DPRINTF(fmt, ...) \
52 do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
53 #else
54 #define UNIN_DPRINTF(fmt, ...)
55 #endif
57 /* UniN device */
58 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
60 UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
63 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
65 uint32_t value;
67 value = 0;
68 UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
70 return value;
73 static CPUWriteMemoryFunc * const unin_write[] = {
74 &unin_writel,
75 &unin_writel,
76 &unin_writel,
79 static CPUReadMemoryFunc * const unin_read[] = {
80 &unin_readl,
81 &unin_readl,
82 &unin_readl,
85 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
87 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
88 return 0;
91 /* PowerPC Mac99 hardware initialisation */
92 static void ppc_core99_init (ram_addr_t ram_size,
93 const char *boot_device,
94 const char *kernel_filename,
95 const char *kernel_cmdline,
96 const char *initrd_filename,
97 const char *cpu_model)
99 CPUState *env = NULL, *envs[MAX_CPUS];
100 char *filename;
101 qemu_irq *pic, **openpic_irqs;
102 int unin_memory;
103 int linux_boot, i;
104 ram_addr_t ram_offset, bios_offset, vga_bios_offset;
105 uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
106 PCIBus *pci_bus;
107 MacIONVRAMState *nvr;
108 int nvram_mem_index;
109 int vga_bios_size, bios_size;
110 qemu_irq *dummy_irq;
111 int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
112 int ppc_boot_device;
113 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
114 void *fw_cfg;
115 void *dbdma;
116 uint8_t *vga_bios_ptr;
118 linux_boot = (kernel_filename != NULL);
120 /* init CPUs */
121 if (cpu_model == NULL)
122 cpu_model = "G4";
123 for (i = 0; i < smp_cpus; i++) {
124 env = cpu_init(cpu_model);
125 if (!env) {
126 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
127 exit(1);
129 /* Set time-base frequency to 100 Mhz */
130 cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
131 #if 0
132 env->osi_call = vga_osi_call;
133 #endif
134 qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
135 envs[i] = env;
138 /* allocate RAM */
139 ram_offset = qemu_ram_alloc(ram_size);
140 cpu_register_physical_memory(0, ram_size, ram_offset);
142 /* allocate and load BIOS */
143 bios_offset = qemu_ram_alloc(BIOS_SIZE);
144 if (bios_name == NULL)
145 bios_name = PROM_FILENAME;
146 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
147 cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
149 /* Load OpenBIOS (ELF) */
150 if (filename) {
151 bios_size = load_elf(filename, 0, NULL, NULL, NULL, 1, ELF_MACHINE, 0);
153 qemu_free(filename);
154 } else {
155 bios_size = -1;
157 if (bios_size < 0 || bios_size > BIOS_SIZE) {
158 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
159 exit(1);
162 /* allocate and load VGA BIOS */
163 vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
164 vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
165 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
166 if (filename) {
167 vga_bios_size = load_image(filename, vga_bios_ptr + 8);
168 qemu_free(filename);
169 } else {
170 vga_bios_size = -1;
172 if (vga_bios_size < 0) {
173 /* if no bios is present, we can still work */
174 fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
175 VGABIOS_FILENAME);
176 vga_bios_size = 0;
177 } else {
178 /* set a specific header (XXX: find real Apple format for NDRV
179 drivers) */
180 vga_bios_ptr[0] = 'N';
181 vga_bios_ptr[1] = 'D';
182 vga_bios_ptr[2] = 'R';
183 vga_bios_ptr[3] = 'V';
184 cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
185 vga_bios_size += 8;
187 /* Round to page boundary */
188 vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
189 TARGET_PAGE_MASK;
192 if (linux_boot) {
193 uint64_t lowaddr = 0;
194 int bswap_needed;
196 #ifdef BSWAP_NEEDED
197 bswap_needed = 1;
198 #else
199 bswap_needed = 0;
200 #endif
201 kernel_base = KERNEL_LOAD_ADDR;
203 /* Now we can load the kernel. The first step tries to load the kernel
204 supposing PhysAddr = 0x00000000. If that was wrong the kernel is
205 loaded again, the new PhysAddr being computed from lowaddr. */
206 kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL,
207 1, ELF_MACHINE, 0);
208 if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
209 kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
210 NULL, NULL, NULL, 1, ELF_MACHINE, 0);
212 if (kernel_size < 0)
213 kernel_size = load_aout(kernel_filename, kernel_base,
214 ram_size - kernel_base, bswap_needed,
215 TARGET_PAGE_SIZE);
216 if (kernel_size < 0)
217 kernel_size = load_image_targphys(kernel_filename,
218 kernel_base,
219 ram_size - kernel_base);
220 if (kernel_size < 0) {
221 hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
222 exit(1);
224 /* load initrd */
225 if (initrd_filename) {
226 initrd_base = INITRD_LOAD_ADDR;
227 initrd_size = load_image_targphys(initrd_filename, initrd_base,
228 ram_size - initrd_base);
229 if (initrd_size < 0) {
230 hw_error("qemu: could not load initial ram disk '%s'\n",
231 initrd_filename);
232 exit(1);
234 } else {
235 initrd_base = 0;
236 initrd_size = 0;
238 ppc_boot_device = 'm';
239 } else {
240 kernel_base = 0;
241 kernel_size = 0;
242 initrd_base = 0;
243 initrd_size = 0;
244 ppc_boot_device = '\0';
245 /* We consider that NewWorld PowerMac never have any floppy drive
246 * For now, OHW cannot boot from the network.
248 for (i = 0; boot_device[i] != '\0'; i++) {
249 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
250 ppc_boot_device = boot_device[i];
251 break;
254 if (ppc_boot_device == '\0') {
255 fprintf(stderr, "No valid boot device for Mac99 machine\n");
256 exit(1);
260 isa_mem_base = 0x80000000;
262 /* Register 8 MB of ISA IO space */
263 isa_mmio_init(0xf2000000, 0x00800000);
265 /* UniN init */
266 unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
267 cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
269 openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
270 openpic_irqs[0] =
271 qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
272 for (i = 0; i < smp_cpus; i++) {
273 /* Mac99 IRQ connection between OpenPIC outputs pins
274 * and PowerPC input pins
276 switch (PPC_INPUT(env)) {
277 case PPC_FLAGS_INPUT_6xx:
278 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
279 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
280 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
281 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
282 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
283 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
284 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
285 /* Not connected ? */
286 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
287 /* Check this */
288 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
289 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
290 break;
291 #if defined(TARGET_PPC64)
292 case PPC_FLAGS_INPUT_970:
293 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
294 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
295 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
296 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
297 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
298 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
299 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
300 /* Not connected ? */
301 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
302 /* Check this */
303 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
304 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
305 break;
306 #endif /* defined(TARGET_PPC64) */
307 default:
308 hw_error("Bus model not supported on mac99 machine\n");
309 exit(1);
312 pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
313 pci_bus = pci_pmac_init(pic);
314 /* init basic PC hardware */
315 pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
317 /* XXX: suppress that */
318 dummy_irq = i8259_init(NULL);
320 escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
321 serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
323 for(i = 0; i < nb_nics; i++)
324 pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
326 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
327 fprintf(stderr, "qemu: too many IDE bus\n");
328 exit(1);
330 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
331 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
333 dbdma = DBDMA_init(&dbdma_mem_index);
334 pci_cmd646_ide_init(pci_bus, hd, 0);
336 /* cuda also initialize ADB */
337 cuda_init(&cuda_mem_index, pic[0x19]);
339 adb_kbd_init(&adb_bus);
340 adb_mouse_init(&adb_bus);
343 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
344 dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
345 escc_mem_index);
347 if (usb_enabled) {
348 usb_ohci_init_pci(pci_bus, -1);
351 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
352 graphic_depth = 15;
354 /* The NewWorld NVRAM is not located in the MacIO device */
355 nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
356 pmac_format_nvram_partition(nvr, 0x2000);
357 macio_nvram_map(nvr, 0xFFF04000);
358 /* No PCI init: the BIOS will do it */
360 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
361 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
362 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
363 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
364 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
365 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
366 if (kernel_cmdline) {
367 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
368 pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
369 } else {
370 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
372 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
373 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
374 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
376 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
377 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
378 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
380 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
383 static QEMUMachine core99_machine = {
384 .name = "mac99",
385 .desc = "Mac99 based PowerMAC",
386 .init = ppc_core99_init,
387 .max_cpus = MAX_CPUS,
390 static void core99_machine_init(void)
392 qemu_register_machine(&core99_machine);
395 machine_init(core99_machine_init);