hw/ppc/spapr: Look up CPU alias names instead of hard-coding the aliases
[qemu.git] / hw / ppc / spapr_cpu_core.c
blobbcb483dbe69af4ece1a659780494b5073543d2ae
1 /*
2 * sPAPR CPU core device, acts as container of CPU thread devices.
4 * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 */
9 #include "hw/cpu/core.h"
10 #include "hw/ppc/spapr_cpu_core.h"
11 #include "target-ppc/cpu.h"
12 #include "hw/ppc/spapr.h"
13 #include "hw/boards.h"
14 #include "qapi/error.h"
15 #include "sysemu/cpus.h"
16 #include "target-ppc/kvm_ppc.h"
17 #include "hw/ppc/ppc.h"
18 #include "target-ppc/mmu-hash64.h"
19 #include "sysemu/numa.h"
21 static void spapr_cpu_reset(void *opaque)
23 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
24 PowerPCCPU *cpu = opaque;
25 CPUState *cs = CPU(cpu);
26 CPUPPCState *env = &cpu->env;
28 cpu_reset(cs);
30 /* All CPUs start halted. CPU0 is unhalted from the machine level
31 * reset code and the rest are explicitly started up by the guest
32 * using an RTAS call */
33 cs->halted = 1;
35 env->spr[SPR_HIOR] = 0;
37 ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
38 &error_fatal);
41 static void spapr_cpu_destroy(PowerPCCPU *cpu)
43 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
45 xics_cpu_destroy(spapr->xics, cpu);
46 qemu_unregister_reset(spapr_cpu_reset, cpu);
49 void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp)
51 CPUPPCState *env = &cpu->env;
52 CPUState *cs = CPU(cpu);
53 int i;
55 /* Set time-base frequency to 512 MHz */
56 cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
58 /* Enable PAPR mode in TCG or KVM */
59 cpu_ppc_set_papr(cpu);
61 if (cpu->max_compat) {
62 Error *local_err = NULL;
64 ppc_set_compat(cpu, cpu->max_compat, &local_err);
65 if (local_err) {
66 error_propagate(errp, local_err);
67 return;
71 /* Set NUMA node for the added CPUs */
72 for (i = 0; i < nb_numa_nodes; i++) {
73 if (test_bit(cs->cpu_index, numa_info[i].node_cpu)) {
74 cs->numa_node = i;
75 break;
79 xics_cpu_setup(spapr->xics, cpu);
81 qemu_register_reset(spapr_cpu_reset, cpu);
82 spapr_cpu_reset(cpu);
86 * Return the sPAPR CPU core type for @model which essentially is the CPU
87 * model specified with -cpu cmdline option.
89 char *spapr_get_cpu_core_type(const char *model)
91 char *core_type;
92 gchar **model_pieces = g_strsplit(model, ",", 2);
94 core_type = g_strdup_printf("%s-%s", model_pieces[0], TYPE_SPAPR_CPU_CORE);
95 g_strfreev(model_pieces);
97 /* Check whether it exists or whether we have to look up an alias name */
98 if (!object_class_by_name(core_type)) {
99 const char *realmodel;
101 g_free(core_type);
102 realmodel = ppc_cpu_lookup_alias(model);
103 if (realmodel) {
104 return spapr_get_cpu_core_type(realmodel);
106 return NULL;
109 return core_type;
112 static void spapr_core_release(DeviceState *dev, void *opaque)
114 sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
115 const char *typename = object_class_get_name(sc->cpu_class);
116 size_t size = object_type_get_instance_size(typename);
117 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
118 CPUCore *cc = CPU_CORE(dev);
119 int i;
121 for (i = 0; i < cc->nr_threads; i++) {
122 void *obj = sc->threads + i * size;
123 DeviceState *dev = DEVICE(obj);
124 CPUState *cs = CPU(dev);
125 PowerPCCPU *cpu = POWERPC_CPU(cs);
127 spapr_cpu_destroy(cpu);
128 cpu_remove_sync(cs);
129 object_unparent(obj);
132 spapr->cores[cc->core_id / smp_threads] = NULL;
134 g_free(sc->threads);
135 object_unparent(OBJECT(dev));
138 void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
139 Error **errp)
141 CPUCore *cc = CPU_CORE(dev);
142 int smt = kvmppc_smt_threads();
143 int index = cc->core_id / smp_threads;
144 sPAPRDRConnector *drc =
145 spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
146 sPAPRDRConnectorClass *drck;
147 Error *local_err = NULL;
149 if (index == 0) {
150 error_setg(errp, "Boot CPU core may not be unplugged");
151 return;
154 g_assert(drc);
156 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
157 drck->detach(drc, dev, spapr_core_release, NULL, &local_err);
158 if (local_err) {
159 error_propagate(errp, local_err);
160 return;
163 spapr_hotplug_req_remove_by_index(drc);
166 void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
167 Error **errp)
169 sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
170 sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
171 CPUCore *cc = CPU_CORE(dev);
172 CPUState *cs = CPU(core->threads);
173 sPAPRDRConnector *drc;
174 sPAPRDRConnectorClass *drck;
175 Error *local_err = NULL;
176 void *fdt = NULL;
177 int fdt_offset = 0;
178 int index = cc->core_id / smp_threads;
179 int smt = kvmppc_smt_threads();
181 drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
182 spapr->cores[index] = OBJECT(dev);
184 g_assert(drc);
187 * Setup CPU DT entries only for hotplugged CPUs. For boot time or
188 * coldplugged CPUs DT entries are setup in spapr_finalize_fdt().
190 if (dev->hotplugged) {
191 fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
194 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
195 drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_err);
196 if (local_err) {
197 g_free(fdt);
198 spapr->cores[index] = NULL;
199 error_propagate(errp, local_err);
200 return;
203 if (dev->hotplugged) {
205 * Send hotplug notification interrupt to the guest only in case
206 * of hotplugged CPUs.
208 spapr_hotplug_req_add_by_index(drc);
209 } else {
211 * Set the right DRC states for cold plugged CPU.
213 drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
214 drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
218 void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
219 Error **errp)
221 MachineState *machine = MACHINE(OBJECT(hotplug_dev));
222 MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev);
223 sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
224 int spapr_max_cores = max_cpus / smp_threads;
225 int index;
226 Error *local_err = NULL;
227 CPUCore *cc = CPU_CORE(dev);
228 char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
229 const char *type = object_get_typename(OBJECT(dev));
231 if (!mc->query_hotpluggable_cpus) {
232 error_setg(&local_err, "CPU hotplug not supported for this machine");
233 goto out;
236 if (strcmp(base_core_type, type)) {
237 error_setg(&local_err, "CPU core type should be %s", base_core_type);
238 goto out;
241 if (cc->nr_threads != smp_threads) {
242 error_setg(&local_err, "threads must be %d", smp_threads);
243 goto out;
246 if (cc->core_id % smp_threads) {
247 error_setg(&local_err, "invalid core id %d", cc->core_id);
248 goto out;
251 index = cc->core_id / smp_threads;
252 if (index < 0 || index >= spapr_max_cores) {
253 error_setg(&local_err, "core id %d out of range", cc->core_id);
254 goto out;
257 if (spapr->cores[index]) {
258 error_setg(&local_err, "core %d already populated", cc->core_id);
259 goto out;
262 out:
263 g_free(base_core_type);
264 error_propagate(errp, local_err);
267 static void spapr_cpu_core_realize_child(Object *child, Error **errp)
269 Error *local_err = NULL;
270 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
271 CPUState *cs = CPU(child);
272 PowerPCCPU *cpu = POWERPC_CPU(cs);
274 object_property_set_bool(child, true, "realized", &local_err);
275 if (local_err) {
276 error_propagate(errp, local_err);
277 return;
280 spapr_cpu_init(spapr, cpu, &local_err);
281 if (local_err) {
282 error_propagate(errp, local_err);
283 return;
287 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
289 sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
290 CPUCore *cc = CPU_CORE(OBJECT(dev));
291 const char *typename = object_class_get_name(sc->cpu_class);
292 size_t size = object_type_get_instance_size(typename);
293 Error *local_err = NULL;
294 void *obj;
295 int i, j;
297 sc->threads = g_malloc0(size * cc->nr_threads);
298 for (i = 0; i < cc->nr_threads; i++) {
299 char id[32];
300 CPUState *cs;
302 obj = sc->threads + i * size;
304 object_initialize(obj, size, typename);
305 cs = CPU(obj);
306 cs->cpu_index = cc->core_id + i;
307 snprintf(id, sizeof(id), "thread[%d]", i);
308 object_property_add_child(OBJECT(sc), id, obj, &local_err);
309 if (local_err) {
310 goto err;
312 object_unref(obj);
315 for (j = 0; j < cc->nr_threads; j++) {
316 obj = sc->threads + j * size;
318 spapr_cpu_core_realize_child(obj, &local_err);
319 if (local_err) {
320 goto err;
323 return;
325 err:
326 while (--i >= 0) {
327 obj = sc->threads + i * size;
328 object_unparent(obj);
330 g_free(sc->threads);
331 error_propagate(errp, local_err);
334 static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
336 DeviceClass *dc = DEVICE_CLASS(oc);
337 dc->realize = spapr_cpu_core_realize;
341 * instance_init routines from different flavours of sPAPR CPU cores.
343 #define SPAPR_CPU_CORE_INITFN(_type, _fname) \
344 static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \
346 sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); \
347 char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, stringify(_type)); \
348 ObjectClass *oc = object_class_by_name(name); \
349 g_assert(oc); \
350 g_free((void *)name); \
351 core->cpu_class = oc; \
354 SPAPR_CPU_CORE_INITFN(970mp_v1.0, 970MP_v10);
355 SPAPR_CPU_CORE_INITFN(970mp_v1.1, 970MP_v11);
356 SPAPR_CPU_CORE_INITFN(970_v2.2, 970);
357 SPAPR_CPU_CORE_INITFN(POWER5+_v2.1, POWER5plus);
358 SPAPR_CPU_CORE_INITFN(POWER7_v2.3, POWER7);
359 SPAPR_CPU_CORE_INITFN(POWER7+_v2.1, POWER7plus);
360 SPAPR_CPU_CORE_INITFN(POWER8_v2.0, POWER8);
361 SPAPR_CPU_CORE_INITFN(POWER8E_v2.1, POWER8E);
362 SPAPR_CPU_CORE_INITFN(POWER8NVL_v1.0, POWER8NVL);
364 typedef struct SPAPRCoreInfo {
365 const char *name;
366 void (*initfn)(Object *obj);
367 } SPAPRCoreInfo;
369 static const SPAPRCoreInfo spapr_cores[] = {
370 /* 970 */
371 { .name = "970_v2.2", .initfn = spapr_cpu_core_970_initfn },
373 /* 970MP variants */
374 { .name = "970MP_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn },
375 { .name = "970mp_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn },
376 { .name = "970MP_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn },
377 { .name = "970mp_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn },
379 /* POWER5+ */
380 { .name = "POWER5+_v2.1", .initfn = spapr_cpu_core_POWER5plus_initfn },
382 /* POWER7 */
383 { .name = "POWER7_v2.3", .initfn = spapr_cpu_core_POWER7_initfn },
385 /* POWER7+ */
386 { .name = "POWER7+_v2.1", .initfn = spapr_cpu_core_POWER7plus_initfn },
388 /* POWER8 */
389 { .name = "POWER8_v2.0", .initfn = spapr_cpu_core_POWER8_initfn },
391 /* POWER8E */
392 { .name = "POWER8E_v2.1", .initfn = spapr_cpu_core_POWER8E_initfn },
394 /* POWER8NVL */
395 { .name = "POWER8NVL_v1.0", .initfn = spapr_cpu_core_POWER8NVL_initfn },
397 { .name = NULL }
400 static void spapr_cpu_core_register(const SPAPRCoreInfo *info)
402 TypeInfo type_info = {
403 .parent = TYPE_SPAPR_CPU_CORE,
404 .instance_size = sizeof(sPAPRCPUCore),
405 .instance_init = info->initfn,
408 type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, info->name);
409 type_register(&type_info);
410 g_free((void *)type_info.name);
413 static const TypeInfo spapr_cpu_core_type_info = {
414 .name = TYPE_SPAPR_CPU_CORE,
415 .parent = TYPE_CPU_CORE,
416 .abstract = true,
417 .instance_size = sizeof(sPAPRCPUCore),
418 .class_init = spapr_cpu_core_class_init,
421 static void spapr_cpu_core_register_types(void)
423 const SPAPRCoreInfo *info = spapr_cores;
425 type_register_static(&spapr_cpu_core_type_info);
426 while (info->name) {
427 spapr_cpu_core_register(info);
428 info++;
432 type_init(spapr_cpu_core_register_types)