target-i386/kvm.c

   1 /*
   2  * QEMU KVM support
   3  *
   4  * Copyright (C) 2006-2008 Qumranet Technologies
   5  * Copyright IBM, Corp. 2008
   6  *
   7  * Authors:
   8  *  Anthony Liguori   <aliguori@us.ibm.com>
   9  *
  10  * This work is licensed under the terms of the GNU GPL, version 2 or later.
  11  * See the COPYING file in the top-level directory.
  12  *
  13  */
  14
  15 #include <sys/types.h>
  16 #include <sys/ioctl.h>
  17 #include <sys/mman.h>
  18
  19 #include <linux/kvm.h>
  20
  21 #include "qemu-common.h"
  22 #include "sysemu.h"
  23 #include "kvm.h"
  24 #include "cpu.h"
  25 #include "gdbstub.h"
  26 #include "host-utils.h"
  27 #include "hw/pc.h"
  28 #include "ioport.h"
  29
  30 #ifdef CONFIG_KVM_PARA
  31 #include <linux/kvm_para.h>
  32 #endif
  33 //
  34 //#define DEBUG_KVM
  35
  36 #ifdef DEBUG_KVM
  37 #define dprintf(fmt, ...) \
  38     do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
  39 #else
  40 #define dprintf(fmt, ...) \
  41     do { } while (0)
  42 #endif
  43
  44 #define MSR_KVM_WALL_CLOCK  0x11
  45 #define MSR_KVM_SYSTEM_TIME 0x12
  46
  47 #ifdef KVM_CAP_EXT_CPUID
  48
  49 static struct kvm_cpuid2 *try_get_cpuid(KVMState *s, int max)
  50 {
  51     struct kvm_cpuid2 *cpuid;
  52     int r, size;
  53
  54     size = sizeof(*cpuid) + max * sizeof(*cpuid->entries);
  55     cpuid = (struct kvm_cpuid2 *)qemu_mallocz(size);
  56     cpuid->nent = max;
  57     r = kvm_ioctl(s, KVM_GET_SUPPORTED_CPUID, cpuid);
  58     if (r == 0 && cpuid->nent >= max) {
  59         r = -E2BIG;
  60     }
  61     if (r < 0) {
  62         if (r == -E2BIG) {
  63             qemu_free(cpuid);
  64             return NULL;
  65         } else {
  66             fprintf(stderr, "KVM_GET_SUPPORTED_CPUID failed: %s\n",
  67                     strerror(-r));
  68             exit(1);
  69         }
  70     }
  71     return cpuid;
  72 }
  73
  74 uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function, int reg)
  75 {
  76     struct kvm_cpuid2 *cpuid;
  77     int i, max;
  78     uint32_t ret = 0;
  79     uint32_t cpuid_1_edx;
  80
  81     if (!kvm_check_extension(env->kvm_state, KVM_CAP_EXT_CPUID)) {
  82         return -1U;
  83     }
  84
  85     max = 1;
  86     while ((cpuid = try_get_cpuid(env->kvm_state, max)) == NULL) {
  87         max *= 2;
  88     }
  89
  90     for (i = 0; i < cpuid->nent; ++i) {
  91         if (cpuid->entries[i].function == function) {
  92             switch (reg) {
  93             case R_EAX:
  94                 ret = cpuid->entries[i].eax;
  95                 break;
  96             case R_EBX:
  97                 ret = cpuid->entries[i].ebx;
  98                 break;
  99             case R_ECX:
 100                 ret = cpuid->entries[i].ecx;
 101                 break;
 102             case R_EDX:
 103                 ret = cpuid->entries[i].edx;
 104                 switch (function) {
 105                 case 1:
 106                     /* KVM before 2.6.30 misreports the following features */
 107                     ret |= CPUID_MTRR | CPUID_PAT | CPUID_MCE | CPUID_MCA;
 108                     break;
 109                 case 0x80000001:
 110                     /* On Intel, kvm returns cpuid according to the Intel spec,
 111                      * so add missing bits according to the AMD spec:
 112                      */
 113                     cpuid_1_edx = kvm_arch_get_supported_cpuid(env, 1, R_EDX);
 114                     ret |= cpuid_1_edx & 0xdfeff7ff;
 115                     break;
 116                 }
 117                 break;
 118             }
 119         }
 120     }
 121
 122     qemu_free(cpuid);
 123
 124     return ret;
 125 }
 126
 127 #else
 128
 129 uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function, int reg)
 130 {
 131     return -1U;
 132 }
 133
 134 #endif
 135
 136 #ifdef CONFIG_KVM_PARA
 137 struct kvm_para_features {
 138         int cap;
 139         int feature;
 140 } para_features[] = {
 141 #ifdef KVM_CAP_CLOCKSOURCE
 142         { KVM_CAP_CLOCKSOURCE, KVM_FEATURE_CLOCKSOURCE },
 143 #endif
 144 #ifdef KVM_CAP_NOP_IO_DELAY
 145         { KVM_CAP_NOP_IO_DELAY, KVM_FEATURE_NOP_IO_DELAY },
 146 #endif
 147 #ifdef KVM_CAP_PV_MMU
 148         { KVM_CAP_PV_MMU, KVM_FEATURE_MMU_OP },
 149 #endif
 150         { -1, -1 }
 151 };
 152
 153 static int get_para_features(CPUState *env)
 154 {
 155         int i, features = 0;
 156
 157         for (i = 0; i < ARRAY_SIZE(para_features) - 1; i++) {
 158                 if (kvm_check_extension(env->kvm_state, para_features[i].cap))
 159                         features |= (1 << para_features[i].feature);
 160         }
 161
 162         return features;
 163 }
 164 #endif
 165
 166 int kvm_arch_init_vcpu(CPUState *env)
 167 {
 168     struct {
 169         struct kvm_cpuid2 cpuid;
 170         struct kvm_cpuid_entry2 entries[100];
 171     } __attribute__((packed)) cpuid_data;
 172     uint32_t limit, i, j, cpuid_i;
 173     uint32_t unused;
 174     struct kvm_cpuid_entry2 *c;
 175 #ifdef KVM_CPUID_SIGNATURE
 176     uint32_t signature[3];
 177 #endif
 178
 179     env->mp_state = KVM_MP_STATE_RUNNABLE;
 180
 181     env->cpuid_features &= kvm_arch_get_supported_cpuid(env, 1, R_EDX);
 182
 183     i = env->cpuid_ext_features & CPUID_EXT_HYPERVISOR;
 184     env->cpuid_ext_features &= kvm_arch_get_supported_cpuid(env, 1, R_ECX);
 185     env->cpuid_ext_features |= i;
 186
 187     env->cpuid_ext2_features &= kvm_arch_get_supported_cpuid(env, 0x80000001,
 188                                                              R_EDX);
 189     env->cpuid_ext3_features &= kvm_arch_get_supported_cpuid(env, 0x80000001,
 190                                                              R_ECX);
 191
 192     cpuid_i = 0;
 193
 194 #ifdef CONFIG_KVM_PARA
 195     /* Paravirtualization CPUIDs */
 196     memcpy(signature, "KVMKVMKVM\0\0\0", 12);
 197     c = &cpuid_data.entries[cpuid_i++];
 198     memset(c, 0, sizeof(*c));
 199     c->function = KVM_CPUID_SIGNATURE;
 200     c->eax = 0;
 201     c->ebx = signature[0];
 202     c->ecx = signature[1];
 203     c->edx = signature[2];
 204
 205     c = &cpuid_data.entries[cpuid_i++];
 206     memset(c, 0, sizeof(*c));
 207     c->function = KVM_CPUID_FEATURES;
 208     c->eax = env->cpuid_kvm_features & get_para_features(env);
 209 #endif
 210
 211     cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
 212
 213     for (i = 0; i <= limit; i++) {
 214         c = &cpuid_data.entries[cpuid_i++];
 215
 216         switch (i) {
 217         case 2: {
 218             /* Keep reading function 2 till all the input is received */
 219             int times;
 220
 221             c->function = i;
 222             c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC |
 223                        KVM_CPUID_FLAG_STATE_READ_NEXT;
 224             cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
 225             times = c->eax & 0xff;
 226
 227             for (j = 1; j < times; ++j) {
 228                 c = &cpuid_data.entries[cpuid_i++];
 229                 c->function = i;
 230                 c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC;
 231                 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
 232             }
 233             break;
 234         }
 235         case 4:
 236         case 0xb:
 237         case 0xd:
 238             for (j = 0; ; j++) {
 239                 c->function = i;
 240                 c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
 241                 c->index = j;
 242                 cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
 243
 244                 if (i == 4 && c->eax == 0)
 245                     break;
 246                 if (i == 0xb && !(c->ecx & 0xff00))
 247                     break;
 248                 if (i == 0xd && c->eax == 0)
 249                     break;
 250
 251                 c = &cpuid_data.entries[cpuid_i++];
 252             }
 253             break;
 254         default:
 255             c->function = i;
 256             c->flags = 0;
 257             cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
 258             break;
 259         }
 260     }
 261     cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused);
 262
 263     for (i = 0x80000000; i <= limit; i++) {
 264         c = &cpuid_data.entries[cpuid_i++];
 265
 266         c->function = i;
 267         c->flags = 0;
 268         cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
 269     }
 270
 271     cpuid_data.cpuid.nent = cpuid_i;
 272
 273     return kvm_vcpu_ioctl(env, KVM_SET_CPUID2, &cpuid_data);
 274 }
 275
 276 void kvm_arch_reset_vcpu(CPUState *env)
 277 {
 278     env->exception_injected = -1;
 279     env->interrupt_injected = -1;
 280     env->nmi_injected = 0;
 281     env->nmi_pending = 0;
 282 }
 283
 284 static int kvm_has_msr_star(CPUState *env)
 285 {
 286     static int has_msr_star;
 287     int ret;
 288
 289     /* first time */
 290     if (has_msr_star == 0) {
 291         struct kvm_msr_list msr_list, *kvm_msr_list;
 292
 293         has_msr_star = -1;
 294
 295         /* Obtain MSR list from KVM.  These are the MSRs that we must
 296          * save/restore */
 297         msr_list.nmsrs = 0;
 298         ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, &msr_list);
 299         if (ret < 0 && ret != -E2BIG) {
 300             return 0;
 301         }
 302         /* Old kernel modules had a bug and could write beyond the provided
 303            memory. Allocate at least a safe amount of 1K. */
 304         kvm_msr_list = qemu_mallocz(MAX(1024, sizeof(msr_list) +
 305                                               msr_list.nmsrs *
 306                                               sizeof(msr_list.indices[0])));
 307
 308         kvm_msr_list->nmsrs = msr_list.nmsrs;
 309         ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, kvm_msr_list);
 310         if (ret >= 0) {
 311             int i;
 312
 313             for (i = 0; i < kvm_msr_list->nmsrs; i++) {
 314                 if (kvm_msr_list->indices[i] == MSR_STAR) {
 315                     has_msr_star = 1;
 316                     break;
 317                 }
 318             }
 319         }
 320
 321         free(kvm_msr_list);
 322     }
 323
 324     if (has_msr_star == 1)
 325         return 1;
 326     return 0;
 327 }
 328
 329 int kvm_arch_init(KVMState *s, int smp_cpus)
 330 {
 331     int ret;
 332
 333     /* create vm86 tss.  KVM uses vm86 mode to emulate 16-bit code
 334      * directly.  In order to use vm86 mode, a TSS is needed.  Since this
 335      * must be part of guest physical memory, we need to allocate it.  Older
 336      * versions of KVM just assumed that it would be at the end of physical
 337      * memory but that doesn't work with more than 4GB of memory.  We simply
 338      * refuse to work with those older versions of KVM. */
 339     ret = kvm_ioctl(s, KVM_CHECK_EXTENSION, KVM_CAP_SET_TSS_ADDR);
 340     if (ret <= 0) {
 341         fprintf(stderr, "kvm does not support KVM_CAP_SET_TSS_ADDR\n");
 342         return ret;
 343     }
 344
 345     /* this address is 3 pages before the bios, and the bios should present
 346      * as unavaible memory.  FIXME, need to ensure the e820 map deals with
 347      * this?
 348      */
 349     /*
 350      * Tell fw_cfg to notify the BIOS to reserve the range.
 351      */
 352     if (e820_add_entry(0xfffbc000, 0x4000, E820_RESERVED) < 0) {
 353         perror("e820_add_entry() table is full");
 354         exit(1);
 355     }
 356     return kvm_vm_ioctl(s, KVM_SET_TSS_ADDR, 0xfffbd000);
 357 }
 358
 359 static void set_v8086_seg(struct kvm_segment *lhs, const SegmentCache *rhs)
 360 {
 361     lhs->selector = rhs->selector;
 362     lhs->base = rhs->base;
 363     lhs->limit = rhs->limit;
 364     lhs->type = 3;
 365     lhs->present = 1;
 366     lhs->dpl = 3;
 367     lhs->db = 0;
 368     lhs->s = 1;
 369     lhs->l = 0;
 370     lhs->g = 0;
 371     lhs->avl = 0;
 372     lhs->unusable = 0;
 373 }
 374
 375 static void set_seg(struct kvm_segment *lhs, const SegmentCache *rhs)
 376 {
 377     unsigned flags = rhs->flags;
 378     lhs->selector = rhs->selector;
 379     lhs->base = rhs->base;
 380     lhs->limit = rhs->limit;
 381     lhs->type = (flags >> DESC_TYPE_SHIFT) & 15;
 382     lhs->present = (flags & DESC_P_MASK) != 0;
 383     lhs->dpl = rhs->selector & 3;
 384     lhs->db = (flags >> DESC_B_SHIFT) & 1;
 385     lhs->s = (flags & DESC_S_MASK) != 0;
 386     lhs->l = (flags >> DESC_L_SHIFT) & 1;
 387     lhs->g = (flags & DESC_G_MASK) != 0;
 388     lhs->avl = (flags & DESC_AVL_MASK) != 0;
 389     lhs->unusable = 0;
 390 }
 391
 392 static void get_seg(SegmentCache *lhs, const struct kvm_segment *rhs)
 393 {
 394     lhs->selector = rhs->selector;
 395     lhs->base = rhs->base;
 396     lhs->limit = rhs->limit;
 397     lhs->flags =
 398         (rhs->type << DESC_TYPE_SHIFT)
 399         | (rhs->present * DESC_P_MASK)
 400         | (rhs->dpl << DESC_DPL_SHIFT)
 401         | (rhs->db << DESC_B_SHIFT)
 402         | (rhs->s * DESC_S_MASK)
 403         | (rhs->l << DESC_L_SHIFT)
 404         | (rhs->g * DESC_G_MASK)
 405         | (rhs->avl * DESC_AVL_MASK);
 406 }
 407
 408 static void kvm_getput_reg(__u64 *kvm_reg, target_ulong *qemu_reg, int set)
 409 {
 410     if (set)
 411         *kvm_reg = *qemu_reg;
 412     else
 413         *qemu_reg = *kvm_reg;
 414 }
 415
 416 static int kvm_getput_regs(CPUState *env, int set)
 417 {
 418     struct kvm_regs regs;
 419     int ret = 0;
 420
 421     if (!set) {
 422         ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
 423         if (ret < 0)
 424             return ret;
 425     }
 426
 427     kvm_getput_reg(&regs.rax, &env->regs[R_EAX], set);
 428     kvm_getput_reg(&regs.rbx, &env->regs[R_EBX], set);
 429     kvm_getput_reg(&regs.rcx, &env->regs[R_ECX], set);
 430     kvm_getput_reg(&regs.rdx, &env->regs[R_EDX], set);
 431     kvm_getput_reg(&regs.rsi, &env->regs[R_ESI], set);
 432     kvm_getput_reg(&regs.rdi, &env->regs[R_EDI], set);
 433     kvm_getput_reg(&regs.rsp, &env->regs[R_ESP], set);
 434     kvm_getput_reg(&regs.rbp, &env->regs[R_EBP], set);
 435 #ifdef TARGET_X86_64
 436     kvm_getput_reg(&regs.r8, &env->regs[8], set);
 437     kvm_getput_reg(&regs.r9, &env->regs[9], set);
 438     kvm_getput_reg(&regs.r10, &env->regs[10], set);
 439     kvm_getput_reg(&regs.r11, &env->regs[11], set);
 440     kvm_getput_reg(&regs.r12, &env->regs[12], set);
 441     kvm_getput_reg(&regs.r13, &env->regs[13], set);
 442     kvm_getput_reg(&regs.r14, &env->regs[14], set);
 443     kvm_getput_reg(&regs.r15, &env->regs[15], set);
 444 #endif
 445
 446     kvm_getput_reg(&regs.rflags, &env->eflags, set);
 447     kvm_getput_reg(&regs.rip, &env->eip, set);
 448
 449     if (set)
 450         ret = kvm_vcpu_ioctl(env, KVM_SET_REGS, &regs);
 451
 452     return ret;
 453 }
 454
 455 static int kvm_put_fpu(CPUState *env)
 456 {
 457     struct kvm_fpu fpu;
 458     int i;
 459
 460     memset(&fpu, 0, sizeof fpu);
 461     fpu.fsw = env->fpus & ~(7 << 11);
 462     fpu.fsw |= (env->fpstt & 7) << 11;
 463     fpu.fcw = env->fpuc;
 464     for (i = 0; i < 8; ++i)
 465         fpu.ftwx |= (!env->fptags[i]) << i;
 466     memcpy(fpu.fpr, env->fpregs, sizeof env->fpregs);
 467     memcpy(fpu.xmm, env->xmm_regs, sizeof env->xmm_regs);
 468     fpu.mxcsr = env->mxcsr;
 469
 470     return kvm_vcpu_ioctl(env, KVM_SET_FPU, &fpu);
 471 }
 472
 473 static int kvm_put_sregs(CPUState *env)
 474 {
 475     struct kvm_sregs sregs;
 476
 477     memset(sregs.interrupt_bitmap, 0, sizeof(sregs.interrupt_bitmap));
 478     if (env->interrupt_injected >= 0) {
 479         sregs.interrupt_bitmap[env->interrupt_injected / 64] |=
 480                 (uint64_t)1 << (env->interrupt_injected % 64);
 481     }
 482
 483     if ((env->eflags & VM_MASK)) {
 484             set_v8086_seg(&sregs.cs, &env->segs[R_CS]);
 485             set_v8086_seg(&sregs.ds, &env->segs[R_DS]);
 486             set_v8086_seg(&sregs.es, &env->segs[R_ES]);
 487             set_v8086_seg(&sregs.fs, &env->segs[R_FS]);
 488             set_v8086_seg(&sregs.gs, &env->segs[R_GS]);
 489             set_v8086_seg(&sregs.ss, &env->segs[R_SS]);
 490     } else {
 491             set_seg(&sregs.cs, &env->segs[R_CS]);
 492             set_seg(&sregs.ds, &env->segs[R_DS]);
 493             set_seg(&sregs.es, &env->segs[R_ES]);
 494             set_seg(&sregs.fs, &env->segs[R_FS]);
 495             set_seg(&sregs.gs, &env->segs[R_GS]);
 496             set_seg(&sregs.ss, &env->segs[R_SS]);
 497
 498             if (env->cr[0] & CR0_PE_MASK) {
 499                 /* force ss cpl to cs cpl */
 500                 sregs.ss.selector = (sregs.ss.selector & ~3) |
 501                         (sregs.cs.selector & 3);
 502                 sregs.ss.dpl = sregs.ss.selector & 3;
 503             }
 504     }
 505
 506     set_seg(&sregs.tr, &env->tr);
 507     set_seg(&sregs.ldt, &env->ldt);
 508
 509     sregs.idt.limit = env->idt.limit;
 510     sregs.idt.base = env->idt.base;
 511     sregs.gdt.limit = env->gdt.limit;
 512     sregs.gdt.base = env->gdt.base;
 513
 514     sregs.cr0 = env->cr[0];
 515     sregs.cr2 = env->cr[2];
 516     sregs.cr3 = env->cr[3];
 517     sregs.cr4 = env->cr[4];
 518
 519     sregs.cr8 = cpu_get_apic_tpr(env);
 520     sregs.apic_base = cpu_get_apic_base(env);
 521
 522     sregs.efer = env->efer;
 523
 524     return kvm_vcpu_ioctl(env, KVM_SET_SREGS, &sregs);
 525 }
 526
 527 static void kvm_msr_entry_set(struct kvm_msr_entry *entry,
 528                               uint32_t index, uint64_t value)
 529 {
 530     entry->index = index;
 531     entry->data = value;
 532 }
 533
 534 static int kvm_put_msrs(CPUState *env, int level)
 535 {
 536     struct {
 537         struct kvm_msrs info;
 538         struct kvm_msr_entry entries[100];
 539     } msr_data;
 540     struct kvm_msr_entry *msrs = msr_data.entries;
 541     int n = 0;
 542
 543     kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs);
 544     kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp);
 545     kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_EIP, env->sysenter_eip);
 546     if (kvm_has_msr_star(env))
 547         kvm_msr_entry_set(&msrs[n++], MSR_STAR, env->star);
 548 #ifdef TARGET_X86_64
 549     /* FIXME if lm capable */
 550     kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar);
 551     kvm_msr_entry_set(&msrs[n++], MSR_KERNELGSBASE, env->kernelgsbase);
 552     kvm_msr_entry_set(&msrs[n++], MSR_FMASK, env->fmask);
 553     kvm_msr_entry_set(&msrs[n++], MSR_LSTAR, env->lstar);
 554 #endif
 555     if (level == KVM_PUT_FULL_STATE) {
 556         kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc);
 557         kvm_msr_entry_set(&msrs[n++], MSR_KVM_SYSTEM_TIME,
 558                           env->system_time_msr);
 559         kvm_msr_entry_set(&msrs[n++], MSR_KVM_WALL_CLOCK, env->wall_clock_msr);
 560     }
 561
 562     msr_data.info.nmsrs = n;
 563
 564     return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
 565
 566 }
 567
 568
 569 static int kvm_get_fpu(CPUState *env)
 570 {
 571     struct kvm_fpu fpu;
 572     int i, ret;
 573
 574     ret = kvm_vcpu_ioctl(env, KVM_GET_FPU, &fpu);
 575     if (ret < 0)
 576         return ret;
 577
 578     env->fpstt = (fpu.fsw >> 11) & 7;
 579     env->fpus = fpu.fsw;
 580     env->fpuc = fpu.fcw;
 581     for (i = 0; i < 8; ++i)
 582         env->fptags[i] = !((fpu.ftwx >> i) & 1);
 583     memcpy(env->fpregs, fpu.fpr, sizeof env->fpregs);
 584     memcpy(env->xmm_regs, fpu.xmm, sizeof env->xmm_regs);
 585     env->mxcsr = fpu.mxcsr;
 586
 587     return 0;
 588 }
 589
 590 static int kvm_get_sregs(CPUState *env)
 591 {
 592     struct kvm_sregs sregs;
 593     uint32_t hflags;
 594     int bit, i, ret;
 595
 596     ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
 597     if (ret < 0)
 598         return ret;
 599
 600     /* There can only be one pending IRQ set in the bitmap at a time, so try
 601        to find it and save its number instead (-1 for none). */
 602     env->interrupt_injected = -1;
 603     for (i = 0; i < ARRAY_SIZE(sregs.interrupt_bitmap); i++) {
 604         if (sregs.interrupt_bitmap[i]) {
 605             bit = ctz64(sregs.interrupt_bitmap[i]);
 606             env->interrupt_injected = i * 64 + bit;
 607             break;
 608         }
 609     }
 610
 611     get_seg(&env->segs[R_CS], &sregs.cs);
 612     get_seg(&env->segs[R_DS], &sregs.ds);
 613     get_seg(&env->segs[R_ES], &sregs.es);
 614     get_seg(&env->segs[R_FS], &sregs.fs);
 615     get_seg(&env->segs[R_GS], &sregs.gs);
 616     get_seg(&env->segs[R_SS], &sregs.ss);
 617
 618     get_seg(&env->tr, &sregs.tr);
 619     get_seg(&env->ldt, &sregs.ldt);
 620
 621     env->idt.limit = sregs.idt.limit;
 622     env->idt.base = sregs.idt.base;
 623     env->gdt.limit = sregs.gdt.limit;
 624     env->gdt.base = sregs.gdt.base;
 625
 626     env->cr[0] = sregs.cr0;
 627     env->cr[2] = sregs.cr2;
 628     env->cr[3] = sregs.cr3;
 629     env->cr[4] = sregs.cr4;
 630
 631     cpu_set_apic_base(env, sregs.apic_base);
 632
 633     env->efer = sregs.efer;
 634     //cpu_set_apic_tpr(env, sregs.cr8);
 635
 636 #define HFLAG_COPY_MASK ~( \
 637                         HF_CPL_MASK | HF_PE_MASK | HF_MP_MASK | HF_EM_MASK | \
 638                         HF_TS_MASK | HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK | \
 639                         HF_OSFXSR_MASK | HF_LMA_MASK | HF_CS32_MASK | \
 640                         HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK)
 641
 642
 643
 644     hflags = (env->segs[R_CS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK;
 645     hflags |= (env->cr[0] & CR0_PE_MASK) << (HF_PE_SHIFT - CR0_PE_SHIFT);
 646     hflags |= (env->cr[0] << (HF_MP_SHIFT - CR0_MP_SHIFT)) &
 647             (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK);
 648     hflags |= (env->eflags & (HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK));
 649     hflags |= (env->cr[4] & CR4_OSFXSR_MASK) <<
 650             (HF_OSFXSR_SHIFT - CR4_OSFXSR_SHIFT);
 651
 652     if (env->efer & MSR_EFER_LMA) {
 653         hflags |= HF_LMA_MASK;
 654     }
 655
 656     if ((hflags & HF_LMA_MASK) && (env->segs[R_CS].flags & DESC_L_MASK)) {
 657         hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK;
 658     } else {
 659         hflags |= (env->segs[R_CS].flags & DESC_B_MASK) >>
 660                 (DESC_B_SHIFT - HF_CS32_SHIFT);
 661         hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >>
 662                 (DESC_B_SHIFT - HF_SS32_SHIFT);
 663         if (!(env->cr[0] & CR0_PE_MASK) ||
 664                    (env->eflags & VM_MASK) ||
 665                    !(hflags & HF_CS32_MASK)) {
 666                 hflags |= HF_ADDSEG_MASK;
 667             } else {
 668                 hflags |= ((env->segs[R_DS].base |
 669                                 env->segs[R_ES].base |
 670                                 env->segs[R_SS].base) != 0) <<
 671                     HF_ADDSEG_SHIFT;
 672             }
 673     }
 674     env->hflags = (env->hflags & HFLAG_COPY_MASK) | hflags;
 675
 676     return 0;
 677 }
 678
 679 static int kvm_get_msrs(CPUState *env)
 680 {
 681     struct {
 682         struct kvm_msrs info;
 683         struct kvm_msr_entry entries[100];
 684     } msr_data;
 685     struct kvm_msr_entry *msrs = msr_data.entries;
 686     int ret, i, n;
 687
 688     n = 0;
 689     msrs[n++].index = MSR_IA32_SYSENTER_CS;
 690     msrs[n++].index = MSR_IA32_SYSENTER_ESP;
 691     msrs[n++].index = MSR_IA32_SYSENTER_EIP;
 692     if (kvm_has_msr_star(env))
 693         msrs[n++].index = MSR_STAR;
 694     msrs[n++].index = MSR_IA32_TSC;
 695 #ifdef TARGET_X86_64
 696     /* FIXME lm_capable_kernel */
 697     msrs[n++].index = MSR_CSTAR;
 698     msrs[n++].index = MSR_KERNELGSBASE;
 699     msrs[n++].index = MSR_FMASK;
 700     msrs[n++].index = MSR_LSTAR;
 701 #endif
 702     msrs[n++].index = MSR_KVM_SYSTEM_TIME;
 703     msrs[n++].index = MSR_KVM_WALL_CLOCK;
 704
 705     msr_data.info.nmsrs = n;
 706     ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data);
 707     if (ret < 0)
 708         return ret;
 709
 710     for (i = 0; i < ret; i++) {
 711         switch (msrs[i].index) {
 712         case MSR_IA32_SYSENTER_CS:
 713             env->sysenter_cs = msrs[i].data;
 714             break;
 715         case MSR_IA32_SYSENTER_ESP:
 716             env->sysenter_esp = msrs[i].data;
 717             break;
 718         case MSR_IA32_SYSENTER_EIP:
 719             env->sysenter_eip = msrs[i].data;
 720             break;
 721         case MSR_STAR:
 722             env->star = msrs[i].data;
 723             break;
 724 #ifdef TARGET_X86_64
 725         case MSR_CSTAR:
 726             env->cstar = msrs[i].data;
 727             break;
 728         case MSR_KERNELGSBASE:
 729             env->kernelgsbase = msrs[i].data;
 730             break;
 731         case MSR_FMASK:
 732             env->fmask = msrs[i].data;
 733             break;
 734         case MSR_LSTAR:
 735             env->lstar = msrs[i].data;
 736             break;
 737 #endif
 738         case MSR_IA32_TSC:
 739             env->tsc = msrs[i].data;
 740             break;
 741         case MSR_KVM_SYSTEM_TIME:
 742             env->system_time_msr = msrs[i].data;
 743             break;
 744         case MSR_KVM_WALL_CLOCK:
 745             env->wall_clock_msr = msrs[i].data;
 746             break;
 747         }
 748     }
 749
 750     return 0;
 751 }
 752
 753 static int kvm_put_mp_state(CPUState *env)
 754 {
 755     struct kvm_mp_state mp_state = { .mp_state = env->mp_state };
 756
 757     return kvm_vcpu_ioctl(env, KVM_SET_MP_STATE, &mp_state);
 758 }
 759
 760 static int kvm_get_mp_state(CPUState *env)
 761 {
 762     struct kvm_mp_state mp_state;
 763     int ret;
 764
 765     ret = kvm_vcpu_ioctl(env, KVM_GET_MP_STATE, &mp_state);
 766     if (ret < 0) {
 767         return ret;
 768     }
 769     env->mp_state = mp_state.mp_state;
 770     return 0;
 771 }
 772
 773 static int kvm_put_vcpu_events(CPUState *env, int level)
 774 {
 775 #ifdef KVM_CAP_VCPU_EVENTS
 776     struct kvm_vcpu_events events;
 777
 778     if (!kvm_has_vcpu_events()) {
 779         return 0;
 780     }
 781
 782     events.exception.injected = (env->exception_injected >= 0);
 783     events.exception.nr = env->exception_injected;
 784     events.exception.has_error_code = env->has_error_code;
 785     events.exception.error_code = env->error_code;
 786
 787     events.interrupt.injected = (env->interrupt_injected >= 0);
 788     events.interrupt.nr = env->interrupt_injected;
 789     events.interrupt.soft = env->soft_interrupt;
 790
 791     events.nmi.injected = env->nmi_injected;
 792     events.nmi.pending = env->nmi_pending;
 793     events.nmi.masked = !!(env->hflags2 & HF2_NMI_MASK);
 794
 795     events.sipi_vector = env->sipi_vector;
 796
 797     events.flags = 0;
 798     if (level >= KVM_PUT_RESET_STATE) {
 799         events.flags |=
 800             KVM_VCPUEVENT_VALID_NMI_PENDING | KVM_VCPUEVENT_VALID_SIPI_VECTOR;
 801     }
 802
 803     return kvm_vcpu_ioctl(env, KVM_SET_VCPU_EVENTS, &events);
 804 #else
 805     return 0;
 806 #endif
 807 }
 808
 809 static int kvm_get_vcpu_events(CPUState *env)
 810 {
 811 #ifdef KVM_CAP_VCPU_EVENTS
 812     struct kvm_vcpu_events events;
 813     int ret;
 814
 815     if (!kvm_has_vcpu_events()) {
 816         return 0;
 817     }
 818
 819     ret = kvm_vcpu_ioctl(env, KVM_GET_VCPU_EVENTS, &events);
 820     if (ret < 0) {
 821        return ret;
 822     }
 823     env->exception_injected =
 824        events.exception.injected ? events.exception.nr : -1;
 825     env->has_error_code = events.exception.has_error_code;
 826     env->error_code = events.exception.error_code;
 827
 828     env->interrupt_injected =
 829         events.interrupt.injected ? events.interrupt.nr : -1;
 830     env->soft_interrupt = events.interrupt.soft;
 831
 832     env->nmi_injected = events.nmi.injected;
 833     env->nmi_pending = events.nmi.pending;
 834     if (events.nmi.masked) {
 835         env->hflags2 |= HF2_NMI_MASK;
 836     } else {
 837         env->hflags2 &= ~HF2_NMI_MASK;
 838     }
 839
 840     env->sipi_vector = events.sipi_vector;
 841 #endif
 842
 843     return 0;
 844 }
 845
 846 static int kvm_guest_debug_workarounds(CPUState *env)
 847 {
 848     int ret = 0;
 849 #ifdef KVM_CAP_SET_GUEST_DEBUG
 850     unsigned long reinject_trap = 0;
 851
 852     if (!kvm_has_vcpu_events()) {
 853         if (env->exception_injected == 1) {
 854             reinject_trap = KVM_GUESTDBG_INJECT_DB;
 855         } else if (env->exception_injected == 3) {
 856             reinject_trap = KVM_GUESTDBG_INJECT_BP;
 857         }
 858         env->exception_injected = -1;
 859     }
 860
 861     /*
 862      * Kernels before KVM_CAP_X86_ROBUST_SINGLESTEP overwrote flags.TF
 863      * injected via SET_GUEST_DEBUG while updating GP regs. Work around this
 864      * by updating the debug state once again if single-stepping is on.
 865      * Another reason to call kvm_update_guest_debug here is a pending debug
 866      * trap raise by the guest. On kernels without SET_VCPU_EVENTS we have to
 867      * reinject them via SET_GUEST_DEBUG.
 868      */
 869     if (reinject_trap ||
 870         (!kvm_has_robust_singlestep() && env->singlestep_enabled)) {
 871         ret = kvm_update_guest_debug(env, reinject_trap);
 872     }
 873 #endif /* KVM_CAP_SET_GUEST_DEBUG */
 874     return ret;
 875 }
 876
 877 int kvm_arch_put_registers(CPUState *env, int level)
 878 {
 879     int ret;
 880
 881     ret = kvm_getput_regs(env, 1);
 882     if (ret < 0)
 883         return ret;
 884
 885     ret = kvm_put_fpu(env);
 886     if (ret < 0)
 887         return ret;
 888
 889     ret = kvm_put_sregs(env);
 890     if (ret < 0)
 891         return ret;
 892
 893     ret = kvm_put_msrs(env, level);
 894     if (ret < 0)
 895         return ret;
 896
 897     if (level >= KVM_PUT_RESET_STATE) {
 898         ret = kvm_put_mp_state(env);
 899         if (ret < 0)
 900             return ret;
 901     }
 902
 903     ret = kvm_put_vcpu_events(env, level);
 904     if (ret < 0)
 905         return ret;
 906
 907     /* must be last */
 908     ret = kvm_guest_debug_workarounds(env);
 909     if (ret < 0)
 910         return ret;
 911
 912     return 0;
 913 }
 914
 915 int kvm_arch_get_registers(CPUState *env)
 916 {
 917     int ret;
 918
 919     ret = kvm_getput_regs(env, 0);
 920     if (ret < 0)
 921         return ret;
 922
 923     ret = kvm_get_fpu(env);
 924     if (ret < 0)
 925         return ret;
 926
 927     ret = kvm_get_sregs(env);
 928     if (ret < 0)
 929         return ret;
 930
 931     ret = kvm_get_msrs(env);
 932     if (ret < 0)
 933         return ret;
 934
 935     ret = kvm_get_mp_state(env);
 936     if (ret < 0)
 937         return ret;
 938
 939     ret = kvm_get_vcpu_events(env);
 940     if (ret < 0)
 941         return ret;
 942
 943     return 0;
 944 }
 945
 946 int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
 947 {
 948     /* Try to inject an interrupt if the guest can accept it */
 949     if (run->ready_for_interrupt_injection &&
 950         (env->interrupt_request & CPU_INTERRUPT_HARD) &&
 951         (env->eflags & IF_MASK)) {
 952         int irq;
 953
 954         env->interrupt_request &= ~CPU_INTERRUPT_HARD;
 955         irq = cpu_get_pic_interrupt(env);
 956         if (irq >= 0) {
 957             struct kvm_interrupt intr;
 958             intr.irq = irq;
 959             /* FIXME: errors */
 960             dprintf("injected interrupt %d\n", irq);
 961             kvm_vcpu_ioctl(env, KVM_INTERRUPT, &intr);
 962         }
 963     }
 964
 965     /* If we have an interrupt but the guest is not ready to receive an
 966      * interrupt, request an interrupt window exit.  This will
 967      * cause a return to userspace as soon as the guest is ready to
 968      * receive interrupts. */
 969     if ((env->interrupt_request & CPU_INTERRUPT_HARD))
 970         run->request_interrupt_window = 1;
 971     else
 972         run->request_interrupt_window = 0;
 973
 974     dprintf("setting tpr\n");
 975     run->cr8 = cpu_get_apic_tpr(env);
 976
 977     return 0;
 978 }
 979
 980 int kvm_arch_post_run(CPUState *env, struct kvm_run *run)
 981 {
 982     if (run->if_flag)
 983         env->eflags |= IF_MASK;
 984     else
 985         env->eflags &= ~IF_MASK;
 986
 987     cpu_set_apic_tpr(env, run->cr8);
 988     cpu_set_apic_base(env, run->apic_base);
 989
 990     return 0;
 991 }
 992
 993 static int kvm_handle_halt(CPUState *env)
 994 {
 995     if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
 996           (env->eflags & IF_MASK)) &&
 997         !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
 998         env->halted = 1;
 999         env->exception_index = EXCP_HLT;
1000         return 0;
1001     }
1002
1003     return 1;
1004 }
1005
1006 int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run)
1007 {
1008     int ret = 0;
1009
1010     switch (run->exit_reason) {
1011     case KVM_EXIT_HLT:
1012         dprintf("handle_hlt\n");
1013         ret = kvm_handle_halt(env);
1014         break;
1015     }
1016
1017     return ret;
1018 }
1019
1020 #ifdef KVM_CAP_SET_GUEST_DEBUG
1021 int kvm_arch_insert_sw_breakpoint(CPUState *env, struct kvm_sw_breakpoint *bp)
1022 {
1023     static const uint8_t int3 = 0xcc;
1024
1025     if (cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&bp->saved_insn, 1, 0) ||
1026         cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&int3, 1, 1))
1027         return -EINVAL;
1028     return 0;
1029 }
1030
1031 int kvm_arch_remove_sw_breakpoint(CPUState *env, struct kvm_sw_breakpoint *bp)
1032 {
1033     uint8_t int3;
1034
1035     if (cpu_memory_rw_debug(env, bp->pc, &int3, 1, 0) || int3 != 0xcc ||
1036         cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&bp->saved_insn, 1, 1))
1037         return -EINVAL;
1038     return 0;
1039 }
1040
1041 static struct {
1042     target_ulong addr;
1043     int len;
1044     int type;
1045 } hw_breakpoint[4];
1046
1047 static int nb_hw_breakpoint;
1048
1049 static int find_hw_breakpoint(target_ulong addr, int len, int type)
1050 {
1051     int n;
1052
1053     for (n = 0; n < nb_hw_breakpoint; n++)
1054         if (hw_breakpoint[n].addr == addr && hw_breakpoint[n].type == type &&
1055             (hw_breakpoint[n].len == len || len == -1))
1056             return n;
1057     return -1;
1058 }
1059
1060 int kvm_arch_insert_hw_breakpoint(target_ulong addr,
1061                                   target_ulong len, int type)
1062 {
1063     switch (type) {
1064     case GDB_BREAKPOINT_HW:
1065         len = 1;
1066         break;
1067     case GDB_WATCHPOINT_WRITE:
1068     case GDB_WATCHPOINT_ACCESS:
1069         switch (len) {
1070         case 1:
1071             break;
1072         case 2:
1073         case 4:
1074         case 8:
1075             if (addr & (len - 1))
1076                 return -EINVAL;
1077             break;
1078         default:
1079             return -EINVAL;
1080         }
1081         break;
1082     default:
1083         return -ENOSYS;
1084     }
1085
1086     if (nb_hw_breakpoint == 4)
1087         return -ENOBUFS;
1088
1089     if (find_hw_breakpoint(addr, len, type) >= 0)
1090         return -EEXIST;
1091
1092     hw_breakpoint[nb_hw_breakpoint].addr = addr;
1093     hw_breakpoint[nb_hw_breakpoint].len = len;
1094     hw_breakpoint[nb_hw_breakpoint].type = type;
1095     nb_hw_breakpoint++;
1096
1097     return 0;
1098 }
1099
1100 int kvm_arch_remove_hw_breakpoint(target_ulong addr,
1101                                   target_ulong len, int type)
1102 {
1103     int n;
1104
1105     n = find_hw_breakpoint(addr, (type == GDB_BREAKPOINT_HW) ? 1 : len, type);
1106     if (n < 0)
1107         return -ENOENT;
1108
1109     nb_hw_breakpoint--;
1110     hw_breakpoint[n] = hw_breakpoint[nb_hw_breakpoint];
1111
1112     return 0;
1113 }
1114
1115 void kvm_arch_remove_all_hw_breakpoints(void)
1116 {
1117     nb_hw_breakpoint = 0;
1118 }
1119
1120 static CPUWatchpoint hw_watchpoint;
1121
1122 int kvm_arch_debug(struct kvm_debug_exit_arch *arch_info)
1123 {
1124     int handle = 0;
1125     int n;
1126
1127     if (arch_info->exception == 1) {
1128         if (arch_info->dr6 & (1 << 14)) {
1129             if (cpu_single_env->singlestep_enabled)
1130                 handle = 1;
1131         } else {
1132             for (n = 0; n < 4; n++)
1133                 if (arch_info->dr6 & (1 << n))
1134                     switch ((arch_info->dr7 >> (16 + n*4)) & 0x3) {
1135                     case 0x0:
1136                         handle = 1;
1137                         break;
1138                     case 0x1:
1139                         handle = 1;
1140                         cpu_single_env->watchpoint_hit = &hw_watchpoint;
1141                         hw_watchpoint.vaddr = hw_breakpoint[n].addr;
1142                         hw_watchpoint.flags = BP_MEM_WRITE;
1143                         break;
1144                     case 0x3:
1145                         handle = 1;
1146                         cpu_single_env->watchpoint_hit = &hw_watchpoint;
1147                         hw_watchpoint.vaddr = hw_breakpoint[n].addr;
1148                         hw_watchpoint.flags = BP_MEM_ACCESS;
1149                         break;
1150                     }
1151         }
1152     } else if (kvm_find_sw_breakpoint(cpu_single_env, arch_info->pc))
1153         handle = 1;
1154
1155     if (!handle) {
1156         cpu_synchronize_state(cpu_single_env);
1157         assert(cpu_single_env->exception_injected == -1);
1158
1159         cpu_single_env->exception_injected = arch_info->exception;
1160         cpu_single_env->has_error_code = 0;
1161     }
1162
1163     return handle;
1164 }
1165
1166 void kvm_arch_update_guest_debug(CPUState *env, struct kvm_guest_debug *dbg)
1167 {
1168     const uint8_t type_code[] = {
1169         [GDB_BREAKPOINT_HW] = 0x0,
1170         [GDB_WATCHPOINT_WRITE] = 0x1,
1171         [GDB_WATCHPOINT_ACCESS] = 0x3
1172     };
1173     const uint8_t len_code[] = {
1174         [1] = 0x0, [2] = 0x1, [4] = 0x3, [8] = 0x2
1175     };
1176     int n;
1177
1178     if (kvm_sw_breakpoints_active(env))
1179         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
1180
1181     if (nb_hw_breakpoint > 0) {
1182         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP;
1183         dbg->arch.debugreg[7] = 0x0600;
1184         for (n = 0; n < nb_hw_breakpoint; n++) {
1185             dbg->arch.debugreg[n] = hw_breakpoint[n].addr;
1186             dbg->arch.debugreg[7] |= (2 << (n * 2)) |
1187                 (type_code[hw_breakpoint[n].type] << (16 + n*4)) |
1188                 (len_code[hw_breakpoint[n].len] << (18 + n*4));
1189         }
1190     }
1191 }
1192 #endif /* KVM_CAP_SET_GUEST_DEBUG */