1 #include "sysemu/sysemu.h"
3 #include "helper_regs.h"
4 #include "hw/ppc/spapr.h"
5 #include "mmu-hash64.h"
7 static target_ulong
compute_tlbie_rb(target_ulong v
, target_ulong r
,
8 target_ulong pte_index
)
10 target_ulong rb
, va_low
;
12 rb
= (v
& ~0x7fULL
) << 16; /* AVA field */
13 va_low
= pte_index
>> 3;
14 if (v
& HPTE64_V_SECONDARY
) {
17 /* xor vsid from AVA */
18 if (!(v
& HPTE64_V_1TB_SEG
)) {
24 if (v
& HPTE64_V_LARGE
) {
25 rb
|= 1; /* L field */
26 #if 0 /* Disable that P7 specific bit for now */
28 /* non-16MB large page, must be 64k */
29 /* (masks depend on page size) */
30 rb
|= 0x1000; /* page encoding in LP field */
31 rb
|= (va_low
& 0x7f) << 16; /* 7b of VA in AVA/LP field */
32 rb
|= (va_low
& 0xfe); /* AVAL field */
37 rb
|= (va_low
& 0x7ff) << 12; /* remaining 11b of AVA */
39 rb
|= (v
>> 54) & 0x300; /* B field */
43 static target_ulong
h_enter(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
44 target_ulong opcode
, target_ulong
*args
)
46 CPUPPCState
*env
= &cpu
->env
;
47 target_ulong flags
= args
[0];
48 target_ulong pte_index
= args
[1];
49 target_ulong pteh
= args
[2];
50 target_ulong ptel
= args
[3];
51 target_ulong page_shift
= 12;
56 /* only handle 4k and 16M pages for now */
57 if (pteh
& HPTE64_V_LARGE
) {
58 #if 0 /* We don't support 64k pages yet */
59 if ((ptel
& 0xf000) == 0x1000) {
63 if ((ptel
& 0xff000) == 0) {
66 /* lowest AVA bit must be 0 for 16M pages */
75 raddr
= (ptel
& HPTE64_R_RPN
) & ~((1ULL << page_shift
) - 1);
77 if (raddr
< spapr
->ram_limit
) {
78 /* Regular RAM - should have WIMG=0010 */
79 if ((ptel
& HPTE64_R_WIMG
) != HPTE64_R_M
) {
83 /* Looks like an IO address */
84 /* FIXME: What WIMG combinations could be sensible for IO?
85 * For now we allow WIMG=010x, but are there others? */
86 /* FIXME: Should we check against registered IO addresses? */
87 if ((ptel
& (HPTE64_R_W
| HPTE64_R_I
| HPTE64_R_M
)) != HPTE64_R_I
) {
94 if ((pte_index
* HASH_PTE_SIZE_64
) & ~env
->htab_mask
) {
97 if (likely((flags
& H_EXACT
) == 0)) {
99 hpte
= pte_index
* HASH_PTE_SIZE_64
;
104 if ((ppc_hash64_load_hpte0(env
, hpte
) & HPTE64_V_VALID
) == 0) {
107 hpte
+= HASH_PTE_SIZE_64
;
111 hpte
= pte_index
* HASH_PTE_SIZE_64
;
112 if (ppc_hash64_load_hpte0(env
, hpte
) & HPTE64_V_VALID
) {
116 ppc_hash64_store_hpte1(env
, hpte
, ptel
);
117 /* eieio(); FIXME: need some sort of barrier for smp? */
118 ppc_hash64_store_hpte0(env
, hpte
, pteh
| HPTE64_V_HPTE_DIRTY
);
120 args
[0] = pte_index
+ i
;
126 REMOVE_NOT_FOUND
= 1,
131 static RemoveResult
remove_hpte(CPUPPCState
*env
, target_ulong ptex
,
134 target_ulong
*vp
, target_ulong
*rp
)
137 target_ulong v
, r
, rb
;
139 if ((ptex
* HASH_PTE_SIZE_64
) & ~env
->htab_mask
) {
143 hpte
= ptex
* HASH_PTE_SIZE_64
;
145 v
= ppc_hash64_load_hpte0(env
, hpte
);
146 r
= ppc_hash64_load_hpte1(env
, hpte
);
148 if ((v
& HPTE64_V_VALID
) == 0 ||
149 ((flags
& H_AVPN
) && (v
& ~0x7fULL
) != avpn
) ||
150 ((flags
& H_ANDCOND
) && (v
& avpn
) != 0)) {
151 return REMOVE_NOT_FOUND
;
155 ppc_hash64_store_hpte0(env
, hpte
, HPTE64_V_HPTE_DIRTY
);
156 rb
= compute_tlbie_rb(v
, r
, ptex
);
157 ppc_tlb_invalidate_one(env
, rb
);
158 return REMOVE_SUCCESS
;
161 static target_ulong
h_remove(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
162 target_ulong opcode
, target_ulong
*args
)
164 CPUPPCState
*env
= &cpu
->env
;
165 target_ulong flags
= args
[0];
166 target_ulong pte_index
= args
[1];
167 target_ulong avpn
= args
[2];
170 ret
= remove_hpte(env
, pte_index
, avpn
, flags
,
177 case REMOVE_NOT_FOUND
:
187 g_assert_not_reached();
190 #define H_BULK_REMOVE_TYPE 0xc000000000000000ULL
191 #define H_BULK_REMOVE_REQUEST 0x4000000000000000ULL
192 #define H_BULK_REMOVE_RESPONSE 0x8000000000000000ULL
193 #define H_BULK_REMOVE_END 0xc000000000000000ULL
194 #define H_BULK_REMOVE_CODE 0x3000000000000000ULL
195 #define H_BULK_REMOVE_SUCCESS 0x0000000000000000ULL
196 #define H_BULK_REMOVE_NOT_FOUND 0x1000000000000000ULL
197 #define H_BULK_REMOVE_PARM 0x2000000000000000ULL
198 #define H_BULK_REMOVE_HW 0x3000000000000000ULL
199 #define H_BULK_REMOVE_RC 0x0c00000000000000ULL
200 #define H_BULK_REMOVE_FLAGS 0x0300000000000000ULL
201 #define H_BULK_REMOVE_ABSOLUTE 0x0000000000000000ULL
202 #define H_BULK_REMOVE_ANDCOND 0x0100000000000000ULL
203 #define H_BULK_REMOVE_AVPN 0x0200000000000000ULL
204 #define H_BULK_REMOVE_PTEX 0x00ffffffffffffffULL
206 #define H_BULK_REMOVE_MAX_BATCH 4
208 static target_ulong
h_bulk_remove(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
209 target_ulong opcode
, target_ulong
*args
)
211 CPUPPCState
*env
= &cpu
->env
;
214 for (i
= 0; i
< H_BULK_REMOVE_MAX_BATCH
; i
++) {
215 target_ulong
*tsh
= &args
[i
*2];
216 target_ulong tsl
= args
[i
*2 + 1];
217 target_ulong v
, r
, ret
;
219 if ((*tsh
& H_BULK_REMOVE_TYPE
) == H_BULK_REMOVE_END
) {
221 } else if ((*tsh
& H_BULK_REMOVE_TYPE
) != H_BULK_REMOVE_REQUEST
) {
225 *tsh
&= H_BULK_REMOVE_PTEX
| H_BULK_REMOVE_FLAGS
;
226 *tsh
|= H_BULK_REMOVE_RESPONSE
;
228 if ((*tsh
& H_BULK_REMOVE_ANDCOND
) && (*tsh
& H_BULK_REMOVE_AVPN
)) {
229 *tsh
|= H_BULK_REMOVE_PARM
;
233 ret
= remove_hpte(env
, *tsh
& H_BULK_REMOVE_PTEX
, tsl
,
234 (*tsh
& H_BULK_REMOVE_FLAGS
) >> 26,
241 *tsh
|= (r
& (HPTE64_R_C
| HPTE64_R_R
)) << 43;
255 static target_ulong
h_protect(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
256 target_ulong opcode
, target_ulong
*args
)
258 CPUPPCState
*env
= &cpu
->env
;
259 target_ulong flags
= args
[0];
260 target_ulong pte_index
= args
[1];
261 target_ulong avpn
= args
[2];
263 target_ulong v
, r
, rb
;
265 if ((pte_index
* HASH_PTE_SIZE_64
) & ~env
->htab_mask
) {
269 hpte
= pte_index
* HASH_PTE_SIZE_64
;
271 v
= ppc_hash64_load_hpte0(env
, hpte
);
272 r
= ppc_hash64_load_hpte1(env
, hpte
);
274 if ((v
& HPTE64_V_VALID
) == 0 ||
275 ((flags
& H_AVPN
) && (v
& ~0x7fULL
) != avpn
)) {
279 r
&= ~(HPTE64_R_PP0
| HPTE64_R_PP
| HPTE64_R_N
|
280 HPTE64_R_KEY_HI
| HPTE64_R_KEY_LO
);
281 r
|= (flags
<< 55) & HPTE64_R_PP0
;
282 r
|= (flags
<< 48) & HPTE64_R_KEY_HI
;
283 r
|= flags
& (HPTE64_R_PP
| HPTE64_R_N
| HPTE64_R_KEY_LO
);
284 rb
= compute_tlbie_rb(v
, r
, pte_index
);
285 ppc_hash64_store_hpte0(env
, hpte
, (v
& ~HPTE64_V_VALID
) | HPTE64_V_HPTE_DIRTY
);
286 ppc_tlb_invalidate_one(env
, rb
);
287 ppc_hash64_store_hpte1(env
, hpte
, r
);
288 /* Don't need a memory barrier, due to qemu's global lock */
289 ppc_hash64_store_hpte0(env
, hpte
, v
| HPTE64_V_HPTE_DIRTY
);
293 static target_ulong
h_read(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
294 target_ulong opcode
, target_ulong
*args
)
296 CPUPPCState
*env
= &cpu
->env
;
297 target_ulong flags
= args
[0];
298 target_ulong pte_index
= args
[1];
300 int i
, ridx
, n_entries
= 1;
302 if ((pte_index
* HASH_PTE_SIZE_64
) & ~env
->htab_mask
) {
306 if (flags
& H_READ_4
) {
307 /* Clear the two low order bits */
308 pte_index
&= ~(3ULL);
312 hpte
= env
->external_htab
+ (pte_index
* HASH_PTE_SIZE_64
);
314 for (i
= 0, ridx
= 0; i
< n_entries
; i
++) {
315 args
[ridx
++] = ldq_p(hpte
);
316 args
[ridx
++] = ldq_p(hpte
+ (HASH_PTE_SIZE_64
/2));
317 hpte
+= HASH_PTE_SIZE_64
;
323 static target_ulong
h_set_dabr(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
324 target_ulong opcode
, target_ulong
*args
)
326 /* FIXME: actually implement this */
330 #define FLAGS_REGISTER_VPA 0x0000200000000000ULL
331 #define FLAGS_REGISTER_DTL 0x0000400000000000ULL
332 #define FLAGS_REGISTER_SLBSHADOW 0x0000600000000000ULL
333 #define FLAGS_DEREGISTER_VPA 0x0000a00000000000ULL
334 #define FLAGS_DEREGISTER_DTL 0x0000c00000000000ULL
335 #define FLAGS_DEREGISTER_SLBSHADOW 0x0000e00000000000ULL
337 #define VPA_MIN_SIZE 640
338 #define VPA_SIZE_OFFSET 0x4
339 #define VPA_SHARED_PROC_OFFSET 0x9
340 #define VPA_SHARED_PROC_VAL 0x2
342 static target_ulong
register_vpa(CPUPPCState
*env
, target_ulong vpa
)
348 hcall_dprintf("Can't cope with registering a VPA at logical 0\n");
352 if (vpa
% env
->dcache_line_size
) {
355 /* FIXME: bounds check the address */
357 size
= lduw_be_phys(vpa
+ 0x4);
359 if (size
< VPA_MIN_SIZE
) {
363 /* VPA is not allowed to cross a page boundary */
364 if ((vpa
/ 4096) != ((vpa
+ size
- 1) / 4096)) {
370 tmp
= ldub_phys(env
->vpa_addr
+ VPA_SHARED_PROC_OFFSET
);
371 tmp
|= VPA_SHARED_PROC_VAL
;
372 stb_phys(env
->vpa_addr
+ VPA_SHARED_PROC_OFFSET
, tmp
);
377 static target_ulong
deregister_vpa(CPUPPCState
*env
, target_ulong vpa
)
379 if (env
->slb_shadow_addr
) {
391 static target_ulong
register_slb_shadow(CPUPPCState
*env
, target_ulong addr
)
396 hcall_dprintf("Can't cope with SLB shadow at logical 0\n");
400 size
= ldl_be_phys(addr
+ 0x4);
405 if ((addr
/ 4096) != ((addr
+ size
- 1) / 4096)) {
409 if (!env
->vpa_addr
) {
413 env
->slb_shadow_addr
= addr
;
414 env
->slb_shadow_size
= size
;
419 static target_ulong
deregister_slb_shadow(CPUPPCState
*env
, target_ulong addr
)
421 env
->slb_shadow_addr
= 0;
422 env
->slb_shadow_size
= 0;
426 static target_ulong
register_dtl(CPUPPCState
*env
, target_ulong addr
)
431 hcall_dprintf("Can't cope with DTL at logical 0\n");
435 size
= ldl_be_phys(addr
+ 0x4);
441 if (!env
->vpa_addr
) {
445 env
->dtl_addr
= addr
;
446 env
->dtl_size
= size
;
451 static target_ulong
deregister_dtl(CPUPPCState
*env
, target_ulong addr
)
459 static target_ulong
h_register_vpa(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
460 target_ulong opcode
, target_ulong
*args
)
462 target_ulong flags
= args
[0];
463 target_ulong procno
= args
[1];
464 target_ulong vpa
= args
[2];
465 target_ulong ret
= H_PARAMETER
;
469 tcpu
= qemu_get_cpu(procno
);
473 tenv
= tcpu
->env_ptr
;
476 case FLAGS_REGISTER_VPA
:
477 ret
= register_vpa(tenv
, vpa
);
480 case FLAGS_DEREGISTER_VPA
:
481 ret
= deregister_vpa(tenv
, vpa
);
484 case FLAGS_REGISTER_SLBSHADOW
:
485 ret
= register_slb_shadow(tenv
, vpa
);
488 case FLAGS_DEREGISTER_SLBSHADOW
:
489 ret
= deregister_slb_shadow(tenv
, vpa
);
492 case FLAGS_REGISTER_DTL
:
493 ret
= register_dtl(tenv
, vpa
);
496 case FLAGS_DEREGISTER_DTL
:
497 ret
= deregister_dtl(tenv
, vpa
);
504 static target_ulong
h_cede(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
505 target_ulong opcode
, target_ulong
*args
)
507 CPUPPCState
*env
= &cpu
->env
;
508 CPUState
*cs
= CPU(cpu
);
510 env
->msr
|= (1ULL << MSR_EE
);
511 hreg_compute_hflags(env
);
512 if (!cpu_has_work(cs
)) {
514 env
->exception_index
= EXCP_HLT
;
515 cs
->exit_request
= 1;
520 static target_ulong
h_rtas(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
521 target_ulong opcode
, target_ulong
*args
)
523 target_ulong rtas_r3
= args
[0];
524 uint32_t token
= ldl_be_phys(rtas_r3
);
525 uint32_t nargs
= ldl_be_phys(rtas_r3
+ 4);
526 uint32_t nret
= ldl_be_phys(rtas_r3
+ 8);
528 return spapr_rtas_call(cpu
, spapr
, token
, nargs
, rtas_r3
+ 12,
529 nret
, rtas_r3
+ 12 + 4*nargs
);
532 static target_ulong
h_logical_load(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
533 target_ulong opcode
, target_ulong
*args
)
535 target_ulong size
= args
[0];
536 target_ulong addr
= args
[1];
540 args
[0] = ldub_phys(addr
);
543 args
[0] = lduw_phys(addr
);
546 args
[0] = ldl_phys(addr
);
549 args
[0] = ldq_phys(addr
);
555 static target_ulong
h_logical_store(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
556 target_ulong opcode
, target_ulong
*args
)
558 target_ulong size
= args
[0];
559 target_ulong addr
= args
[1];
560 target_ulong val
= args
[2];
579 static target_ulong
h_logical_memop(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
580 target_ulong opcode
, target_ulong
*args
)
582 target_ulong dst
= args
[0]; /* Destination address */
583 target_ulong src
= args
[1]; /* Source address */
584 target_ulong esize
= args
[2]; /* Element size (0=1,1=2,2=4,3=8) */
585 target_ulong count
= args
[3]; /* Element count */
586 target_ulong op
= args
[4]; /* 0 = copy, 1 = invert */
588 unsigned int mask
= (1 << esize
) - 1;
589 int step
= 1 << esize
;
591 if (count
> 0x80000000) {
595 if ((dst
& mask
) || (src
& mask
) || (op
> 1)) {
599 if (dst
>= src
&& dst
< (src
+ (count
<< esize
))) {
600 dst
= dst
+ ((count
- 1) << esize
);
601 src
= src
+ ((count
- 1) << esize
);
608 tmp
= ldub_phys(src
);
611 tmp
= lduw_phys(src
);
646 static target_ulong
h_logical_icbi(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
647 target_ulong opcode
, target_ulong
*args
)
649 /* Nothing to do on emulation, KVM will trap this in the kernel */
653 static target_ulong
h_logical_dcbf(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
654 target_ulong opcode
, target_ulong
*args
)
656 /* Nothing to do on emulation, KVM will trap this in the kernel */
660 static target_ulong
h_set_mode(PowerPCCPU
*cpu
, sPAPREnvironment
*spapr
,
661 target_ulong opcode
, target_ulong
*args
)
664 target_ulong mflags
= args
[0];
665 target_ulong resource
= args
[1];
666 target_ulong value1
= args
[2];
667 target_ulong value2
= args
[3];
668 target_ulong ret
= H_P2
;
670 if (resource
== H_SET_MODE_ENDIAN
) {
681 case H_SET_MODE_ENDIAN_BIG
:
683 PowerPCCPU
*cp
= POWERPC_CPU(cs
);
684 CPUPPCState
*env
= &cp
->env
;
685 env
->spr
[SPR_LPCR
] &= ~LPCR_ILE
;
690 case H_SET_MODE_ENDIAN_LITTLE
:
692 PowerPCCPU
*cp
= POWERPC_CPU(cs
);
693 CPUPPCState
*env
= &cp
->env
;
694 env
->spr
[SPR_LPCR
] |= LPCR_ILE
;
700 ret
= H_UNSUPPORTED_FLAG
;
708 static spapr_hcall_fn papr_hypercall_table
[(MAX_HCALL_OPCODE
/ 4) + 1];
709 static spapr_hcall_fn kvmppc_hypercall_table
[KVMPPC_HCALL_MAX
- KVMPPC_HCALL_BASE
+ 1];
711 void spapr_register_hypercall(target_ulong opcode
, spapr_hcall_fn fn
)
713 spapr_hcall_fn
*slot
;
715 if (opcode
<= MAX_HCALL_OPCODE
) {
716 assert((opcode
& 0x3) == 0);
718 slot
= &papr_hypercall_table
[opcode
/ 4];
720 assert((opcode
>= KVMPPC_HCALL_BASE
) && (opcode
<= KVMPPC_HCALL_MAX
));
722 slot
= &kvmppc_hypercall_table
[opcode
- KVMPPC_HCALL_BASE
];
729 target_ulong
spapr_hypercall(PowerPCCPU
*cpu
, target_ulong opcode
,
732 if ((opcode
<= MAX_HCALL_OPCODE
)
733 && ((opcode
& 0x3) == 0)) {
734 spapr_hcall_fn fn
= papr_hypercall_table
[opcode
/ 4];
737 return fn(cpu
, spapr
, opcode
, args
);
739 } else if ((opcode
>= KVMPPC_HCALL_BASE
) &&
740 (opcode
<= KVMPPC_HCALL_MAX
)) {
741 spapr_hcall_fn fn
= kvmppc_hypercall_table
[opcode
- KVMPPC_HCALL_BASE
];
744 return fn(cpu
, spapr
, opcode
, args
);
748 hcall_dprintf("Unimplemented hcall 0x" TARGET_FMT_lx
"\n", opcode
);
752 static void hypercall_register_types(void)
755 spapr_register_hypercall(H_ENTER
, h_enter
);
756 spapr_register_hypercall(H_REMOVE
, h_remove
);
757 spapr_register_hypercall(H_PROTECT
, h_protect
);
758 spapr_register_hypercall(H_READ
, h_read
);
761 spapr_register_hypercall(H_BULK_REMOVE
, h_bulk_remove
);
764 spapr_register_hypercall(H_SET_DABR
, h_set_dabr
);
767 spapr_register_hypercall(H_REGISTER_VPA
, h_register_vpa
);
768 spapr_register_hypercall(H_CEDE
, h_cede
);
770 /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenciate
771 * here between the "CI" and the "CACHE" variants, they will use whatever
772 * mapping attributes qemu is using. When using KVM, the kernel will
773 * enforce the attributes more strongly
775 spapr_register_hypercall(H_LOGICAL_CI_LOAD
, h_logical_load
);
776 spapr_register_hypercall(H_LOGICAL_CI_STORE
, h_logical_store
);
777 spapr_register_hypercall(H_LOGICAL_CACHE_LOAD
, h_logical_load
);
778 spapr_register_hypercall(H_LOGICAL_CACHE_STORE
, h_logical_store
);
779 spapr_register_hypercall(H_LOGICAL_ICBI
, h_logical_icbi
);
780 spapr_register_hypercall(H_LOGICAL_DCBF
, h_logical_dcbf
);
781 spapr_register_hypercall(KVMPPC_H_LOGICAL_MEMOP
, h_logical_memop
);
783 /* qemu/KVM-PPC specific hcalls */
784 spapr_register_hypercall(KVMPPC_H_RTAS
, h_rtas
);
786 spapr_register_hypercall(H_SET_MODE
, h_set_mode
);
789 type_init(hypercall_register_types
)