hw/misc/macio/cuda.c

   1 /*
   2  * QEMU PowerMac CUDA device support
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "qemu/osdep.h"
  27 #include "hw/irq.h"
  28 #include "hw/qdev-properties.h"
  29 #include "migration/vmstate.h"
  30 #include "hw/input/adb.h"
  31 #include "hw/misc/mos6522.h"
  32 #include "hw/misc/macio/cuda.h"
  33 #include "qapi/error.h"
  34 #include "qemu/timer.h"
  35 #include "sysemu/runstate.h"
  36 #include "sysemu/rtc.h"
  37 #include "qapi/error.h"
  38 #include "qemu/cutils.h"
  39 #include "qemu/log.h"
  40 #include "qemu/module.h"
  41 #include "trace.h"
  42
  43 /* Bits in B data register: all active low */
  44 #define TREQ            0x08    /* Transfer request (input) */
  45 #define TACK            0x10    /* Transfer acknowledge (output) */
  46 #define TIP             0x20    /* Transfer in progress (output) */
  47
  48 /* commands (1st byte) */
  49 #define ADB_PACKET      0
  50 #define CUDA_PACKET     1
  51 #define ERROR_PACKET    2
  52 #define TIMER_PACKET    3
  53 #define POWER_PACKET    4
  54 #define MACIIC_PACKET   5
  55 #define PMU_PACKET      6
  56
  57 #define CUDA_TIMER_FREQ (4700000 / 6)
  58
  59 /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */
  60 #define RTC_OFFSET                      2082844800
  61
  62 static void cuda_receive_packet_from_host(CUDAState *s,
  63                                           const uint8_t *data, int len);
  64
  65 /* MacOS uses timer 1 for calibration on startup, so we use
  66  * the timebase frequency and cuda_get_counter_value() with
  67  * cuda_get_load_time() to steer MacOS to calculate calibrate its timers
  68  * correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda
  69  * timer to expose tbfreq to guest" for more information) */
  70
  71 static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti)
  72 {
  73     MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
  74     CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
  75
  76     /* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */
  77     uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
  78                                 cs->tb_frequency, NANOSECONDS_PER_SECOND) -
  79                            ti->load_time;
  80
  81     return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24);
  82 }
  83
  84 static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti)
  85 {
  86     MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
  87     CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
  88
  89     uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
  90                                   cs->tb_frequency, NANOSECONDS_PER_SECOND);
  91     return load_time;
  92 }
  93
  94 static void cuda_set_sr_int(void *opaque)
  95 {
  96     CUDAState *s = opaque;
  97     MOS6522CUDAState *mcs = &s->mos6522_cuda;
  98     MOS6522State *ms = MOS6522(mcs);
  99     qemu_irq irq = qdev_get_gpio_in(DEVICE(ms), SR_INT_BIT);
 100
 101     qemu_set_irq(irq, 1);
 102 }
 103
 104 static void cuda_delay_set_sr_int(CUDAState *s)
 105 {
 106     int64_t expire;
 107
 108     trace_cuda_delay_set_sr_int();
 109
 110     expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns;
 111     timer_mod(s->sr_delay_timer, expire);
 112 }
 113
 114 /* NOTE: TIP and TREQ are negated */
 115 static void cuda_update(CUDAState *s)
 116 {
 117     MOS6522CUDAState *mcs = &s->mos6522_cuda;
 118     MOS6522State *ms = MOS6522(mcs);
 119     ADBBusState *adb_bus = &s->adb_bus;
 120     int packet_received, len;
 121
 122     packet_received = 0;
 123     if (!(ms->b & TIP)) {
 124         /* transfer requested from host */
 125
 126         if (ms->acr & SR_OUT) {
 127             /* data output */
 128             if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
 129                 if (s->data_out_index < sizeof(s->data_out)) {
 130                     if (s->data_out_index == 0) {
 131                         adb_autopoll_block(adb_bus);
 132                     }
 133                     trace_cuda_data_send(ms->sr);
 134                     s->data_out[s->data_out_index++] = ms->sr;
 135                     cuda_delay_set_sr_int(s);
 136                 }
 137             }
 138         } else {
 139             if (s->data_in_index < s->data_in_size) {
 140                 /* data input */
 141                 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
 142                     ms->sr = s->data_in[s->data_in_index++];
 143                     trace_cuda_data_recv(ms->sr);
 144                     /* indicate end of transfer */
 145                     if (s->data_in_index >= s->data_in_size) {
 146                         ms->b = (ms->b | TREQ);
 147                         adb_autopoll_unblock(adb_bus);
 148                     }
 149                     cuda_delay_set_sr_int(s);
 150                 }
 151             }
 152         }
 153     } else {
 154         /* no transfer requested: handle sync case */
 155         if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) {
 156             /* update TREQ state each time TACK change state */
 157             if (ms->b & TACK) {
 158                 ms->b = (ms->b | TREQ);
 159             } else {
 160                 ms->b = (ms->b & ~TREQ);
 161             }
 162             cuda_delay_set_sr_int(s);
 163         } else {
 164             if (!(s->last_b & TIP)) {
 165                 /* handle end of host to cuda transfer */
 166                 packet_received = (s->data_out_index > 0);
 167                 /* always an IRQ at the end of transfer */
 168                 cuda_delay_set_sr_int(s);
 169             }
 170             /* signal if there is data to read */
 171             if (s->data_in_index < s->data_in_size) {
 172                 ms->b = (ms->b & ~TREQ);
 173             }
 174         }
 175     }
 176
 177     s->last_acr = ms->acr;
 178     s->last_b = ms->b;
 179
 180     /* NOTE: cuda_receive_packet_from_host() can call cuda_update()
 181        recursively */
 182     if (packet_received) {
 183         len = s->data_out_index;
 184         s->data_out_index = 0;
 185         cuda_receive_packet_from_host(s, s->data_out, len);
 186     }
 187 }
 188
 189 static void cuda_send_packet_to_host(CUDAState *s,
 190                                      const uint8_t *data, int len)
 191 {
 192     int i;
 193
 194     trace_cuda_packet_send(len);
 195     for (i = 0; i < len; i++) {
 196         trace_cuda_packet_send_data(i, data[i]);
 197     }
 198
 199     memcpy(s->data_in, data, len);
 200     s->data_in_size = len;
 201     s->data_in_index = 0;
 202     cuda_update(s);
 203     cuda_delay_set_sr_int(s);
 204 }
 205
 206 static void cuda_adb_poll(void *opaque)
 207 {
 208     CUDAState *s = opaque;
 209     ADBBusState *adb_bus = &s->adb_bus;
 210     uint8_t obuf[ADB_MAX_OUT_LEN + 2];
 211     int olen;
 212
 213     olen = adb_poll(adb_bus, obuf + 2, adb_bus->autopoll_mask);
 214     if (olen > 0) {
 215         obuf[0] = ADB_PACKET;
 216         obuf[1] = 0x40; /* polled data */
 217         cuda_send_packet_to_host(s, obuf, olen + 2);
 218     }
 219 }
 220
 221 /* description of commands */
 222 typedef struct CudaCommand {
 223     uint8_t command;
 224     const char *name;
 225     bool (*handler)(CUDAState *s,
 226                     const uint8_t *in_args, int in_len,
 227                     uint8_t *out_args, int *out_len);
 228 } CudaCommand;
 229
 230 static bool cuda_cmd_autopoll(CUDAState *s,
 231                               const uint8_t *in_data, int in_len,
 232                               uint8_t *out_data, int *out_len)
 233 {
 234     ADBBusState *adb_bus = &s->adb_bus;
 235     bool autopoll;
 236
 237     if (in_len != 1) {
 238         return false;
 239     }
 240
 241     autopoll = (in_data[0] != 0) ? true : false;
 242
 243     adb_set_autopoll_enabled(adb_bus, autopoll);
 244     return true;
 245 }
 246
 247 static bool cuda_cmd_set_autorate(CUDAState *s,
 248                                   const uint8_t *in_data, int in_len,
 249                                   uint8_t *out_data, int *out_len)
 250 {
 251     ADBBusState *adb_bus = &s->adb_bus;
 252
 253     if (in_len != 1) {
 254         return false;
 255     }
 256
 257     /* we don't want a period of 0 ms */
 258     /* FIXME: check what real hardware does */
 259     if (in_data[0] == 0) {
 260         return false;
 261     }
 262
 263     adb_set_autopoll_rate_ms(adb_bus, in_data[0]);
 264     return true;
 265 }
 266
 267 static bool cuda_cmd_set_device_list(CUDAState *s,
 268                                      const uint8_t *in_data, int in_len,
 269                                      uint8_t *out_data, int *out_len)
 270 {
 271     ADBBusState *adb_bus = &s->adb_bus;
 272     uint16_t mask;
 273
 274     if (in_len != 2) {
 275         return false;
 276     }
 277
 278     mask = (((uint16_t)in_data[0]) << 8) | in_data[1];
 279
 280     adb_set_autopoll_mask(adb_bus, mask);
 281     return true;
 282 }
 283
 284 static bool cuda_cmd_powerdown(CUDAState *s,
 285                                const uint8_t *in_data, int in_len,
 286                                uint8_t *out_data, int *out_len)
 287 {
 288     if (in_len != 0) {
 289         return false;
 290     }
 291
 292     qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
 293     return true;
 294 }
 295
 296 static bool cuda_cmd_reset_system(CUDAState *s,
 297                                   const uint8_t *in_data, int in_len,
 298                                   uint8_t *out_data, int *out_len)
 299 {
 300     if (in_len != 0) {
 301         return false;
 302     }
 303
 304     qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 305     return true;
 306 }
 307
 308 static bool cuda_cmd_set_file_server_flag(CUDAState *s,
 309                                           const uint8_t *in_data, int in_len,
 310                                           uint8_t *out_data, int *out_len)
 311 {
 312     if (in_len != 1) {
 313         return false;
 314     }
 315
 316     qemu_log_mask(LOG_UNIMP,
 317                   "CUDA: unimplemented command FILE_SERVER_FLAG %d\n",
 318                   in_data[0]);
 319     return true;
 320 }
 321
 322 static bool cuda_cmd_set_power_message(CUDAState *s,
 323                                        const uint8_t *in_data, int in_len,
 324                                        uint8_t *out_data, int *out_len)
 325 {
 326     if (in_len != 1) {
 327         return false;
 328     }
 329
 330     qemu_log_mask(LOG_UNIMP,
 331                   "CUDA: unimplemented command SET_POWER_MESSAGE %d\n",
 332                   in_data[0]);
 333     return true;
 334 }
 335
 336 static bool cuda_cmd_get_time(CUDAState *s,
 337                               const uint8_t *in_data, int in_len,
 338                               uint8_t *out_data, int *out_len)
 339 {
 340     uint32_t ti;
 341
 342     if (in_len != 0) {
 343         return false;
 344     }
 345
 346     ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
 347                            / NANOSECONDS_PER_SECOND);
 348     out_data[0] = ti >> 24;
 349     out_data[1] = ti >> 16;
 350     out_data[2] = ti >> 8;
 351     out_data[3] = ti;
 352     *out_len = 4;
 353     return true;
 354 }
 355
 356 static bool cuda_cmd_set_time(CUDAState *s,
 357                               const uint8_t *in_data, int in_len,
 358                               uint8_t *out_data, int *out_len)
 359 {
 360     uint32_t ti;
 361
 362     if (in_len != 4) {
 363         return false;
 364     }
 365
 366     ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16)
 367          + (((uint32_t)in_data[2]) << 8) + in_data[3];
 368     s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
 369                            / NANOSECONDS_PER_SECOND);
 370     return true;
 371 }
 372
 373 static const CudaCommand handlers[] = {
 374     { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
 375     { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
 376     { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
 377     { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
 378     { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
 379     { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG",
 380       cuda_cmd_set_file_server_flag },
 381     { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
 382       cuda_cmd_set_power_message },
 383     { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time },
 384     { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time },
 385 };
 386
 387 static void cuda_receive_packet(CUDAState *s,
 388                                 const uint8_t *data, int len)
 389 {
 390     uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
 391     int i, out_len = 0;
 392
 393     for (i = 0; i < ARRAY_SIZE(handlers); i++) {
 394         const CudaCommand *desc = &handlers[i];
 395         if (desc->command == data[0]) {
 396             trace_cuda_receive_packet_cmd(desc->name);
 397             out_len = 0;
 398             if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) {
 399                 cuda_send_packet_to_host(s, obuf, 3 + out_len);
 400             } else {
 401                 qemu_log_mask(LOG_GUEST_ERROR,
 402                               "CUDA: %s: wrong parameters %d\n",
 403                               desc->name, len);
 404                 obuf[0] = ERROR_PACKET;
 405                 obuf[1] = 0x5; /* bad parameters */
 406                 obuf[2] = CUDA_PACKET;
 407                 obuf[3] = data[0];
 408                 cuda_send_packet_to_host(s, obuf, 4);
 409             }
 410             return;
 411         }
 412     }
 413
 414     qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]);
 415     obuf[0] = ERROR_PACKET;
 416     obuf[1] = 0x2; /* unknown command */
 417     obuf[2] = CUDA_PACKET;
 418     obuf[3] = data[0];
 419     cuda_send_packet_to_host(s, obuf, 4);
 420 }
 421
 422 static void cuda_receive_packet_from_host(CUDAState *s,
 423                                           const uint8_t *data, int len)
 424 {
 425     int i;
 426
 427     trace_cuda_packet_receive(len);
 428     for (i = 0; i < len; i++) {
 429         trace_cuda_packet_receive_data(i, data[i]);
 430     }
 431
 432     switch(data[0]) {
 433     case ADB_PACKET:
 434         {
 435             uint8_t obuf[ADB_MAX_OUT_LEN + 3];
 436             int olen;
 437             olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1);
 438             if (olen > 0) {
 439                 obuf[0] = ADB_PACKET;
 440                 obuf[1] = 0x00;
 441                 cuda_send_packet_to_host(s, obuf, olen + 2);
 442             } else {
 443                 /* error */
 444                 obuf[0] = ADB_PACKET;
 445                 obuf[1] = -olen;
 446                 obuf[2] = data[1];
 447                 olen = 0;
 448                 cuda_send_packet_to_host(s, obuf, olen + 3);
 449             }
 450         }
 451         break;
 452     case CUDA_PACKET:
 453         cuda_receive_packet(s, data + 1, len - 1);
 454         break;
 455     }
 456 }
 457
 458 static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size)
 459 {
 460     CUDAState *s = opaque;
 461     MOS6522CUDAState *mcs = &s->mos6522_cuda;
 462     MOS6522State *ms = MOS6522(mcs);
 463
 464     addr = (addr >> 9) & 0xf;
 465     return mos6522_read(ms, addr, size);
 466 }
 467
 468 static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val,
 469                                unsigned size)
 470 {
 471     CUDAState *s = opaque;
 472     MOS6522CUDAState *mcs = &s->mos6522_cuda;
 473     MOS6522State *ms = MOS6522(mcs);
 474
 475     addr = (addr >> 9) & 0xf;
 476     mos6522_write(ms, addr, val, size);
 477 }
 478
 479 static const MemoryRegionOps mos6522_cuda_ops = {
 480     .read = mos6522_cuda_read,
 481     .write = mos6522_cuda_write,
 482     .endianness = DEVICE_BIG_ENDIAN,
 483     .valid = {
 484         .min_access_size = 1,
 485         .max_access_size = 1,
 486     },
 487 };
 488
 489 static const VMStateDescription vmstate_cuda = {
 490     .name = "cuda",
 491     .version_id = 6,
 492     .minimum_version_id = 6,
 493     .fields = (VMStateField[]) {
 494         VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522,
 495                        MOS6522State),
 496         VMSTATE_UINT8(last_b, CUDAState),
 497         VMSTATE_UINT8(last_acr, CUDAState),
 498         VMSTATE_INT32(data_in_size, CUDAState),
 499         VMSTATE_INT32(data_in_index, CUDAState),
 500         VMSTATE_INT32(data_out_index, CUDAState),
 501         VMSTATE_BUFFER(data_in, CUDAState),
 502         VMSTATE_BUFFER(data_out, CUDAState),
 503         VMSTATE_UINT32(tick_offset, CUDAState),
 504         VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState),
 505         VMSTATE_END_OF_LIST()
 506     }
 507 };
 508
 509 static void cuda_reset(DeviceState *dev)
 510 {
 511     CUDAState *s = CUDA(dev);
 512     ADBBusState *adb_bus = &s->adb_bus;
 513
 514     s->data_in_size = 0;
 515     s->data_in_index = 0;
 516     s->data_out_index = 0;
 517
 518     adb_set_autopoll_enabled(adb_bus, false);
 519 }
 520
 521 static void cuda_realize(DeviceState *dev, Error **errp)
 522 {
 523     CUDAState *s = CUDA(dev);
 524     SysBusDevice *sbd;
 525     ADBBusState *adb_bus = &s->adb_bus;
 526     struct tm tm;
 527
 528     if (!sysbus_realize(SYS_BUS_DEVICE(&s->mos6522_cuda), errp)) {
 529         return;
 530     }
 531
 532     /* Pass IRQ from 6522 */
 533     sbd = SYS_BUS_DEVICE(s);
 534     sysbus_pass_irq(sbd, SYS_BUS_DEVICE(&s->mos6522_cuda));
 535
 536     qemu_get_timedate(&tm, 0);
 537     s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
 538
 539     s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s);
 540     s->sr_delay_ns = 20 * SCALE_US;
 541
 542     adb_register_autopoll_callback(adb_bus, cuda_adb_poll, s);
 543 }
 544
 545 static void cuda_init(Object *obj)
 546 {
 547     CUDAState *s = CUDA(obj);
 548     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 549
 550     object_initialize_child(obj, "mos6522-cuda", &s->mos6522_cuda,
 551                             TYPE_MOS6522_CUDA);
 552
 553     memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000);
 554     sysbus_init_mmio(sbd, &s->mem);
 555
 556     qbus_init(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS,
 557               DEVICE(obj), "adb.0");
 558 }
 559
 560 static Property cuda_properties[] = {
 561     DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0),
 562     DEFINE_PROP_END_OF_LIST()
 563 };
 564
 565 static void cuda_class_init(ObjectClass *oc, void *data)
 566 {
 567     DeviceClass *dc = DEVICE_CLASS(oc);
 568
 569     dc->realize = cuda_realize;
 570     dc->reset = cuda_reset;
 571     dc->vmsd = &vmstate_cuda;
 572     device_class_set_props(dc, cuda_properties);
 573     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
 574 }
 575
 576 static const TypeInfo cuda_type_info = {
 577     .name = TYPE_CUDA,
 578     .parent = TYPE_SYS_BUS_DEVICE,
 579     .instance_size = sizeof(CUDAState),
 580     .instance_init = cuda_init,
 581     .class_init = cuda_class_init,
 582 };
 583
 584 static void mos6522_cuda_portB_write(MOS6522State *s)
 585 {
 586     MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
 587     CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
 588
 589     cuda_update(cs);
 590 }
 591
 592 static void mos6522_cuda_reset(DeviceState *dev)
 593 {
 594     MOS6522State *ms = MOS6522(dev);
 595     MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(ms);
 596
 597     mdc->parent_reset(dev);
 598
 599     ms->timers[0].frequency = CUDA_TIMER_FREQ;
 600     ms->timers[1].frequency = (SCALE_US * 6000) / 4700;
 601 }
 602
 603 static void mos6522_cuda_class_init(ObjectClass *oc, void *data)
 604 {
 605     DeviceClass *dc = DEVICE_CLASS(oc);
 606     MOS6522DeviceClass *mdc = MOS6522_CLASS(oc);
 607
 608     device_class_set_parent_reset(dc, mos6522_cuda_reset,
 609                                   &mdc->parent_reset);
 610     mdc->portB_write = mos6522_cuda_portB_write;
 611     mdc->get_timer1_counter_value = cuda_get_counter_value;
 612     mdc->get_timer2_counter_value = cuda_get_counter_value;
 613     mdc->get_timer1_load_time = cuda_get_load_time;
 614     mdc->get_timer2_load_time = cuda_get_load_time;
 615 }
 616
 617 static const TypeInfo mos6522_cuda_type_info = {
 618     .name = TYPE_MOS6522_CUDA,
 619     .parent = TYPE_MOS6522,
 620     .instance_size = sizeof(MOS6522CUDAState),
 621     .class_init = mos6522_cuda_class_init,
 622 };
 623
 624 static void cuda_register_types(void)
 625 {
 626     type_register_static(&mos6522_cuda_type_info);
 627     type_register_static(&cuda_type_info);
 628 }
 629
 630 type_init(cuda_register_types)