pc: Convert GSIState::i8259_irq into array
[qemu.git] / hw / pc.h
blob72f8c7c978be1b129e82c7bd668209953d89998c
1 #ifndef HW_PC_H
2 #define HW_PC_H
4 #include "qemu-common.h"
5 #include "memory.h"
6 #include "ioport.h"
7 #include "isa.h"
8 #include "fdc.h"
9 #include "net.h"
10 #include "memory.h"
11 #include "ioapic.h"
13 /* PC-style peripherals (also used by other machines). */
15 /* serial.c */
17 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
18 CharDriverState *chr);
19 SerialState *serial_mm_init(MemoryRegion *address_space,
20 target_phys_addr_t base, int it_shift,
21 qemu_irq irq, int baudbase,
22 CharDriverState *chr, enum device_endian);
23 static inline bool serial_isa_init(int index, CharDriverState *chr)
25 ISADevice *dev;
27 dev = isa_try_create("isa-serial");
28 if (!dev) {
29 return false;
31 qdev_prop_set_uint32(&dev->qdev, "index", index);
32 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
33 if (qdev_init(&dev->qdev) < 0) {
34 return false;
36 return true;
39 void serial_set_frequency(SerialState *s, uint32_t frequency);
41 /* parallel.c */
42 static inline bool parallel_init(int index, CharDriverState *chr)
44 ISADevice *dev;
46 dev = isa_try_create("isa-parallel");
47 if (!dev) {
48 return false;
50 qdev_prop_set_uint32(&dev->qdev, "index", index);
51 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
52 if (qdev_init(&dev->qdev) < 0) {
53 return false;
55 return true;
58 bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
59 CharDriverState *chr);
61 /* i8259.c */
63 typedef struct PicState2 PicState2;
64 extern PicState2 *isa_pic;
65 void pic_set_irq(int irq, int level);
66 void pic_set_irq_new(void *opaque, int irq, int level);
67 qemu_irq *i8259_init(qemu_irq parent_irq);
68 int pic_read_irq(PicState2 *s);
69 void pic_update_irq(PicState2 *s);
70 uint32_t pic_intack_read(PicState2 *s);
71 void pic_info(Monitor *mon);
72 void irq_info(Monitor *mon);
74 /* Global System Interrupts */
76 #define GSI_NUM_PINS IOAPIC_NUM_PINS
78 typedef struct GSIState {
79 qemu_irq i8259_irq[ISA_NUM_IRQS];
80 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
81 } GSIState;
83 void gsi_handler(void *opaque, int n, int level);
85 /* i8254.c */
87 #define PIT_FREQ 1193182
89 static inline ISADevice *pit_init(int base, int irq)
91 ISADevice *dev;
93 dev = isa_create("isa-pit");
94 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
95 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
96 qdev_init_nofail(&dev->qdev);
98 return dev;
101 void pit_set_gate(ISADevice *dev, int channel, int val);
102 int pit_get_gate(ISADevice *dev, int channel);
103 int pit_get_initial_count(ISADevice *dev, int channel);
104 int pit_get_mode(ISADevice *dev, int channel);
105 int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
107 void hpet_pit_disable(void);
108 void hpet_pit_enable(void);
110 /* vmport.c */
111 static inline void vmport_init(void)
113 isa_create_simple("vmport");
115 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
116 void vmmouse_get_data(uint32_t *data);
117 void vmmouse_set_data(const uint32_t *data);
119 /* pckbd.c */
121 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
122 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
123 MemoryRegion *region, ram_addr_t size,
124 target_phys_addr_t mask);
125 void i8042_isa_mouse_fake_event(void *opaque);
126 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
128 /* pc.c */
129 extern int fd_bootchk;
131 void pc_register_ferr_irq(qemu_irq irq);
132 void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
133 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
135 void pc_cpus_init(const char *cpu_model);
136 void pc_memory_init(MemoryRegion *system_memory,
137 const char *kernel_filename,
138 const char *kernel_cmdline,
139 const char *initrd_filename,
140 ram_addr_t below_4g_mem_size,
141 ram_addr_t above_4g_mem_size,
142 MemoryRegion *rom_memory,
143 MemoryRegion **ram_memory);
144 qemu_irq *pc_allocate_cpu_irq(void);
145 void pc_vga_init(PCIBus *pci_bus);
146 void pc_basic_device_init(qemu_irq *gsi,
147 ISADevice **rtc_state,
148 bool no_vmport);
149 void pc_init_ne2k_isa(NICInfo *nd);
150 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
151 const char *boot_device,
152 BusState *ide0, BusState *ide1,
153 ISADevice *s);
154 void pc_pci_device_init(PCIBus *pci_bus);
156 typedef void (*cpu_set_smm_t)(int smm, void *arg);
157 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
159 /* acpi.c */
160 extern int acpi_enabled;
161 extern char *acpi_tables;
162 extern size_t acpi_tables_len;
164 void acpi_bios_init(void);
165 int acpi_table_add(const char *table_desc);
167 /* acpi_piix.c */
169 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
170 qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
171 int kvm_enabled);
172 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
174 /* hpet.c */
175 extern int no_hpet;
177 /* pcspk.c */
178 void pcspk_init(ISADevice *pit);
179 int pcspk_audio_init(qemu_irq *pic);
181 /* piix_pci.c */
182 struct PCII440FXState;
183 typedef struct PCII440FXState PCII440FXState;
185 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
186 qemu_irq *pic,
187 MemoryRegion *address_space_mem,
188 MemoryRegion *address_space_io,
189 ram_addr_t ram_size,
190 target_phys_addr_t pci_hole_start,
191 target_phys_addr_t pci_hole_size,
192 target_phys_addr_t pci_hole64_start,
193 target_phys_addr_t pci_hole64_size,
194 MemoryRegion *pci_memory,
195 MemoryRegion *ram_memory);
197 /* piix4.c */
198 extern PCIDevice *piix4_dev;
199 int piix4_init(PCIBus *bus, int devfn);
201 /* vga.c */
202 enum vga_retrace_method {
203 VGA_RETRACE_DUMB,
204 VGA_RETRACE_PRECISE
207 extern enum vga_retrace_method vga_retrace_method;
209 static inline int isa_vga_init(void)
211 ISADevice *dev;
213 dev = isa_try_create("isa-vga");
214 if (!dev) {
215 fprintf(stderr, "Warning: isa-vga not available\n");
216 return 0;
218 qdev_init_nofail(&dev->qdev);
219 return 1;
222 int pci_vga_init(PCIBus *bus);
223 int isa_vga_mm_init(target_phys_addr_t vram_base,
224 target_phys_addr_t ctrl_base, int it_shift,
225 MemoryRegion *address_space);
227 /* cirrus_vga.c */
228 void pci_cirrus_vga_init(PCIBus *bus);
229 void isa_cirrus_vga_init(MemoryRegion *address_space);
231 /* ne2000.c */
232 static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
234 ISADevice *dev;
236 qemu_check_nic_model(nd, "ne2k_isa");
238 dev = isa_try_create("ne2k_isa");
239 if (!dev) {
240 return false;
242 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
243 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
244 qdev_set_nic_properties(&dev->qdev, nd);
245 qdev_init_nofail(&dev->qdev);
246 return true;
249 /* e820 types */
250 #define E820_RAM 1
251 #define E820_RESERVED 2
252 #define E820_ACPI 3
253 #define E820_NVS 4
254 #define E820_UNUSABLE 5
256 int e820_add_entry(uint64_t, uint64_t, uint32_t);
258 #endif