2 * QEMU 16550A UART emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2008 Citrix Systems, Inc.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 /* see docs/specs/pci-serial.txt */
28 #include "hw/char/serial.h"
29 #include "hw/pci/pci.h"
31 #define PCI_SERIAL_MAX_PORTS 4
33 typedef struct PCISerialState
{
39 typedef struct PCIMultiSerialState
{
43 char *name
[PCI_SERIAL_MAX_PORTS
];
44 SerialState state
[PCI_SERIAL_MAX_PORTS
];
45 uint32_t level
[PCI_SERIAL_MAX_PORTS
];
48 } PCIMultiSerialState
;
50 static void multi_serial_pci_exit(PCIDevice
*dev
);
52 static void serial_pci_realize(PCIDevice
*dev
, Error
**errp
)
54 PCISerialState
*pci
= DO_UPCAST(PCISerialState
, dev
, dev
);
55 SerialState
*s
= &pci
->state
;
59 serial_realize_core(s
, &err
);
61 error_propagate(errp
, err
);
65 pci
->dev
.config
[PCI_CLASS_PROG
] = pci
->prog_if
;
66 pci
->dev
.config
[PCI_INTERRUPT_PIN
] = 0x01;
67 s
->irq
= pci_allocate_irq(&pci
->dev
);
69 memory_region_init_io(&s
->io
, OBJECT(pci
), &serial_io_ops
, s
, "serial", 8);
70 pci_register_bar(&pci
->dev
, 0, PCI_BASE_ADDRESS_SPACE_IO
, &s
->io
);
73 static void multi_serial_irq_mux(void *opaque
, int n
, int level
)
75 PCIMultiSerialState
*pci
= opaque
;
78 pci
->level
[n
] = level
;
79 for (i
= 0; i
< pci
->ports
; i
++) {
84 pci_set_irq(&pci
->dev
, pending
);
87 static void multi_serial_pci_realize(PCIDevice
*dev
, Error
**errp
)
89 PCIDeviceClass
*pc
= PCI_DEVICE_GET_CLASS(dev
);
90 PCIMultiSerialState
*pci
= DO_UPCAST(PCIMultiSerialState
, dev
, dev
);
95 switch (pc
->device_id
) {
103 assert(nr_ports
> 0);
104 assert(nr_ports
<= PCI_SERIAL_MAX_PORTS
);
106 pci
->dev
.config
[PCI_CLASS_PROG
] = pci
->prog_if
;
107 pci
->dev
.config
[PCI_INTERRUPT_PIN
] = 0x01;
108 memory_region_init(&pci
->iobar
, OBJECT(pci
), "multiserial", 8 * nr_ports
);
109 pci_register_bar(&pci
->dev
, 0, PCI_BASE_ADDRESS_SPACE_IO
, &pci
->iobar
);
110 pci
->irqs
= qemu_allocate_irqs(multi_serial_irq_mux
, pci
,
113 for (i
= 0; i
< nr_ports
; i
++) {
115 s
->baudbase
= 115200;
116 serial_realize_core(s
, &err
);
118 error_propagate(errp
, err
);
119 multi_serial_pci_exit(dev
);
122 s
->irq
= pci
->irqs
[i
];
123 pci
->name
[i
] = g_strdup_printf("uart #%d", i
+1);
124 memory_region_init_io(&s
->io
, OBJECT(pci
), &serial_io_ops
, s
,
126 memory_region_add_subregion(&pci
->iobar
, 8 * i
, &s
->io
);
131 static void serial_pci_exit(PCIDevice
*dev
)
133 PCISerialState
*pci
= DO_UPCAST(PCISerialState
, dev
, dev
);
134 SerialState
*s
= &pci
->state
;
137 qemu_free_irq(s
->irq
);
140 static void multi_serial_pci_exit(PCIDevice
*dev
)
142 PCIMultiSerialState
*pci
= DO_UPCAST(PCIMultiSerialState
, dev
, dev
);
146 for (i
= 0; i
< pci
->ports
; i
++) {
149 memory_region_del_subregion(&pci
->iobar
, &s
->io
);
150 g_free(pci
->name
[i
]);
152 qemu_free_irqs(pci
->irqs
, pci
->ports
);
155 static const VMStateDescription vmstate_pci_serial
= {
156 .name
= "pci-serial",
158 .minimum_version_id
= 1,
159 .fields
= (VMStateField
[]) {
160 VMSTATE_PCI_DEVICE(dev
, PCISerialState
),
161 VMSTATE_STRUCT(state
, PCISerialState
, 0, vmstate_serial
, SerialState
),
162 VMSTATE_END_OF_LIST()
166 static const VMStateDescription vmstate_pci_multi_serial
= {
167 .name
= "pci-serial-multi",
169 .minimum_version_id
= 1,
170 .fields
= (VMStateField
[]) {
171 VMSTATE_PCI_DEVICE(dev
, PCIMultiSerialState
),
172 VMSTATE_STRUCT_ARRAY(state
, PCIMultiSerialState
, PCI_SERIAL_MAX_PORTS
,
173 0, vmstate_serial
, SerialState
),
174 VMSTATE_UINT32_ARRAY(level
, PCIMultiSerialState
, PCI_SERIAL_MAX_PORTS
),
175 VMSTATE_END_OF_LIST()
179 static Property serial_pci_properties
[] = {
180 DEFINE_PROP_CHR("chardev", PCISerialState
, state
.chr
),
181 DEFINE_PROP_UINT8("prog_if", PCISerialState
, prog_if
, 0x02),
182 DEFINE_PROP_END_OF_LIST(),
185 static Property multi_2x_serial_pci_properties
[] = {
186 DEFINE_PROP_CHR("chardev1", PCIMultiSerialState
, state
[0].chr
),
187 DEFINE_PROP_CHR("chardev2", PCIMultiSerialState
, state
[1].chr
),
188 DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState
, prog_if
, 0x02),
189 DEFINE_PROP_END_OF_LIST(),
192 static Property multi_4x_serial_pci_properties
[] = {
193 DEFINE_PROP_CHR("chardev1", PCIMultiSerialState
, state
[0].chr
),
194 DEFINE_PROP_CHR("chardev2", PCIMultiSerialState
, state
[1].chr
),
195 DEFINE_PROP_CHR("chardev3", PCIMultiSerialState
, state
[2].chr
),
196 DEFINE_PROP_CHR("chardev4", PCIMultiSerialState
, state
[3].chr
),
197 DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState
, prog_if
, 0x02),
198 DEFINE_PROP_END_OF_LIST(),
201 static void serial_pci_class_initfn(ObjectClass
*klass
, void *data
)
203 DeviceClass
*dc
= DEVICE_CLASS(klass
);
204 PCIDeviceClass
*pc
= PCI_DEVICE_CLASS(klass
);
205 pc
->realize
= serial_pci_realize
;
206 pc
->exit
= serial_pci_exit
;
207 pc
->vendor_id
= PCI_VENDOR_ID_REDHAT
;
208 pc
->device_id
= PCI_DEVICE_ID_REDHAT_SERIAL
;
210 pc
->class_id
= PCI_CLASS_COMMUNICATION_SERIAL
;
211 dc
->vmsd
= &vmstate_pci_serial
;
212 dc
->props
= serial_pci_properties
;
213 set_bit(DEVICE_CATEGORY_INPUT
, dc
->categories
);
216 static void multi_2x_serial_pci_class_initfn(ObjectClass
*klass
, void *data
)
218 DeviceClass
*dc
= DEVICE_CLASS(klass
);
219 PCIDeviceClass
*pc
= PCI_DEVICE_CLASS(klass
);
220 pc
->realize
= multi_serial_pci_realize
;
221 pc
->exit
= multi_serial_pci_exit
;
222 pc
->vendor_id
= PCI_VENDOR_ID_REDHAT
;
223 pc
->device_id
= PCI_DEVICE_ID_REDHAT_SERIAL2
;
225 pc
->class_id
= PCI_CLASS_COMMUNICATION_SERIAL
;
226 dc
->vmsd
= &vmstate_pci_multi_serial
;
227 dc
->props
= multi_2x_serial_pci_properties
;
228 set_bit(DEVICE_CATEGORY_INPUT
, dc
->categories
);
231 static void multi_4x_serial_pci_class_initfn(ObjectClass
*klass
, void *data
)
233 DeviceClass
*dc
= DEVICE_CLASS(klass
);
234 PCIDeviceClass
*pc
= PCI_DEVICE_CLASS(klass
);
235 pc
->realize
= multi_serial_pci_realize
;
236 pc
->exit
= multi_serial_pci_exit
;
237 pc
->vendor_id
= PCI_VENDOR_ID_REDHAT
;
238 pc
->device_id
= PCI_DEVICE_ID_REDHAT_SERIAL4
;
240 pc
->class_id
= PCI_CLASS_COMMUNICATION_SERIAL
;
241 dc
->vmsd
= &vmstate_pci_multi_serial
;
242 dc
->props
= multi_4x_serial_pci_properties
;
243 set_bit(DEVICE_CATEGORY_INPUT
, dc
->categories
);
246 static const TypeInfo serial_pci_info
= {
247 .name
= "pci-serial",
248 .parent
= TYPE_PCI_DEVICE
,
249 .instance_size
= sizeof(PCISerialState
),
250 .class_init
= serial_pci_class_initfn
,
253 static const TypeInfo multi_2x_serial_pci_info
= {
254 .name
= "pci-serial-2x",
255 .parent
= TYPE_PCI_DEVICE
,
256 .instance_size
= sizeof(PCIMultiSerialState
),
257 .class_init
= multi_2x_serial_pci_class_initfn
,
260 static const TypeInfo multi_4x_serial_pci_info
= {
261 .name
= "pci-serial-4x",
262 .parent
= TYPE_PCI_DEVICE
,
263 .instance_size
= sizeof(PCIMultiSerialState
),
264 .class_init
= multi_4x_serial_pci_class_initfn
,
267 static void serial_pci_register_types(void)
269 type_register_static(&serial_pci_info
);
270 type_register_static(&multi_2x_serial_pci_info
);
271 type_register_static(&multi_4x_serial_pci_info
);
274 type_init(serial_pci_register_types
)