graph-lock: TSA annotations for lock/unlock functions
[qemu.git] / hw / hppa / machine.c
blobde1cc7ab7102a7bfff53c7dd56fc0402f3b5ca5b
1 /*
2 * QEMU HPPA hardware system emulator.
3 * Copyright 2018 Helge Deller <deller@gmx.de>
4 */
6 #include "qemu/osdep.h"
7 #include "qemu/datadir.h"
8 #include "cpu.h"
9 #include "elf.h"
10 #include "hw/loader.h"
11 #include "qemu/error-report.h"
12 #include "sysemu/reset.h"
13 #include "sysemu/sysemu.h"
14 #include "sysemu/runstate.h"
15 #include "hw/rtc/mc146818rtc.h"
16 #include "hw/timer/i8254.h"
17 #include "hw/char/serial.h"
18 #include "hw/char/parallel.h"
19 #include "hw/intc/i8259.h"
20 #include "hw/input/lasips2.h"
21 #include "hw/net/lasi_82596.h"
22 #include "hw/nmi.h"
23 #include "hw/pci/pci.h"
24 #include "hw/pci-host/dino.h"
25 #include "hw/misc/lasi.h"
26 #include "hppa_hardware.h"
27 #include "qemu/units.h"
28 #include "qapi/error.h"
29 #include "net/net.h"
30 #include "qemu/log.h"
31 #include "net/net.h"
33 #define MIN_SEABIOS_HPPA_VERSION 6 /* require at least this fw version */
35 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)
37 #define enable_lasi_lan() 0
40 static void hppa_powerdown_req(Notifier *n, void *opaque)
42 hwaddr soft_power_reg = HPA_POWER_BUTTON;
43 uint32_t val;
45 val = ldl_be_phys(&address_space_memory, soft_power_reg);
46 if ((val >> 8) == 0) {
47 /* immediately shut down when under hardware control */
48 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
49 return;
52 /* clear bit 31 to indicate that the power switch was pressed. */
53 val &= ~1;
54 stl_be_phys(&address_space_memory, soft_power_reg, val);
57 static Notifier hppa_system_powerdown_notifier = {
58 .notify = hppa_powerdown_req
61 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */
62 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)
64 return 0;
67 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)
71 static const MemoryRegionOps hppa_pci_ignore_ops = {
72 .read = ignore_read,
73 .write = ignore_write,
74 .endianness = DEVICE_BIG_ENDIAN,
75 .valid = {
76 .min_access_size = 1,
77 .max_access_size = 8,
79 .impl = {
80 .min_access_size = 1,
81 .max_access_size = 8,
85 static ISABus *hppa_isa_bus(void)
87 ISABus *isa_bus;
88 qemu_irq *isa_irqs;
89 MemoryRegion *isa_region;
91 isa_region = g_new(MemoryRegion, 1);
92 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
93 NULL, "isa-io", 0x800);
94 memory_region_add_subregion(get_system_memory(), IDE_HPA,
95 isa_region);
97 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
98 &error_abort);
99 isa_irqs = i8259_init(isa_bus,
100 /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
101 NULL);
102 isa_bus_irqs(isa_bus, isa_irqs);
104 return isa_bus;
107 static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
109 addr &= (0x10000000 - 1);
110 return addr;
113 static HPPACPU *cpu[HPPA_MAX_CPUS];
114 static uint64_t firmware_entry;
116 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
117 Error **errp)
119 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
122 static FWCfgState *create_fw_cfg(MachineState *ms)
124 FWCfgState *fw_cfg;
125 uint64_t val;
127 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
128 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
129 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
130 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size);
132 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION);
133 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
134 g_memdup(&val, sizeof(val)), sizeof(val));
136 val = cpu_to_le64(HPPA_TLB_ENTRIES);
137 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
138 g_memdup(&val, sizeof(val)), sizeof(val));
140 val = cpu_to_le64(HPPA_BTLB_ENTRIES);
141 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
142 g_memdup(&val, sizeof(val)), sizeof(val));
144 val = cpu_to_le64(HPA_POWER_BUTTON);
145 fw_cfg_add_file(fw_cfg, "/etc/power-button-addr",
146 g_memdup(&val, sizeof(val)), sizeof(val));
148 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]);
149 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
151 return fw_cfg;
154 static LasiState *lasi_init(void)
156 DeviceState *dev;
158 dev = qdev_new(TYPE_LASI_CHIP);
159 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
161 return LASI_CHIP(dev);
164 static DinoState *dino_init(MemoryRegion *addr_space)
166 DeviceState *dev;
168 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE);
169 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space),
170 &error_fatal);
171 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
173 return DINO_PCI_HOST_BRIDGE(dev);
176 static void machine_hppa_init(MachineState *machine)
178 const char *kernel_filename = machine->kernel_filename;
179 const char *kernel_cmdline = machine->kernel_cmdline;
180 const char *initrd_filename = machine->initrd_filename;
181 DeviceState *dev, *dino_dev, *lasi_dev;
182 PCIBus *pci_bus;
183 ISABus *isa_bus;
184 char *firmware_filename;
185 uint64_t firmware_low, firmware_high;
186 long size;
187 uint64_t kernel_entry = 0, kernel_low, kernel_high;
188 MemoryRegion *addr_space = get_system_memory();
189 MemoryRegion *rom_region;
190 MemoryRegion *cpu_region;
191 long i;
192 unsigned int smp_cpus = machine->smp.cpus;
193 SysBusDevice *s;
195 /* Create CPUs. */
196 for (i = 0; i < smp_cpus; i++) {
197 char *name = g_strdup_printf("cpu%ld-io-eir", i);
198 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
200 cpu_region = g_new(MemoryRegion, 1);
201 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
202 cpu[i], name, 4);
203 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
204 cpu_region);
205 g_free(name);
208 /* Main memory region. */
209 if (machine->ram_size > 3 * GiB) {
210 error_report("RAM size is currently restricted to 3GB");
211 exit(EXIT_FAILURE);
213 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1);
216 /* Init Lasi chip */
217 lasi_dev = DEVICE(lasi_init());
218 memory_region_add_subregion(addr_space, LASI_HPA,
219 sysbus_mmio_get_region(
220 SYS_BUS_DEVICE(lasi_dev), 0));
222 /* Init Dino (PCI host bus chip). */
223 dino_dev = DEVICE(dino_init(addr_space));
224 memory_region_add_subregion(addr_space, DINO_HPA,
225 sysbus_mmio_get_region(
226 SYS_BUS_DEVICE(dino_dev), 0));
227 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci"));
228 assert(pci_bus);
230 /* Create ISA bus. */
231 isa_bus = hppa_isa_bus();
232 assert(isa_bus);
234 /* Realtime clock, used by firmware for PDC_TOD call. */
235 mc146818_rtc_init(isa_bus, 2000, NULL);
237 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */
238 serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0,
239 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16,
240 serial_hd(0), DEVICE_BIG_ENDIAN);
242 serial_mm_init(addr_space, DINO_UART_HPA + 0x800, 0,
243 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16,
244 serial_hd(1), DEVICE_BIG_ENDIAN);
246 /* Parallel port */
247 parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0,
248 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA),
249 parallel_hds[0]);
251 /* fw_cfg configuration interface */
252 create_fw_cfg(machine);
254 /* SCSI disk setup. */
255 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
256 lsi53c8xx_handle_legacy_cmdline(dev);
258 /* Graphics setup. */
259 if (machine->enable_graphics && vga_interface_type != VGA_NONE) {
260 vga_interface_created = true;
261 dev = qdev_new("artist");
262 s = SYS_BUS_DEVICE(dev);
263 sysbus_realize_and_unref(s, &error_fatal);
264 sysbus_mmio_map(s, 0, LASI_GFX_HPA);
265 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR);
268 /* Network setup. */
269 if (enable_lasi_lan()) {
270 lasi_82596_init(addr_space, LASI_LAN_HPA,
271 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA));
274 for (i = 0; i < nb_nics; i++) {
275 if (!enable_lasi_lan()) {
276 pci_nic_init_nofail(&nd_table[i], pci_bus, "tulip", NULL);
280 /* PS/2 Keyboard/Mouse */
281 dev = qdev_new(TYPE_LASIPS2);
282 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
283 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
284 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA));
285 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA,
286 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
287 0));
288 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA + 0x100,
289 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
290 1));
292 /* register power switch emulation */
293 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier);
295 /* Load firmware. Given that this is not "real" firmware,
296 but one explicitly written for the emulation, we might as
297 well load it directly from an ELF image. */
298 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
299 machine->firmware ?: "hppa-firmware.img");
300 if (firmware_filename == NULL) {
301 error_report("no firmware provided");
302 exit(1);
305 size = load_elf(firmware_filename, NULL, NULL, NULL,
306 &firmware_entry, &firmware_low, &firmware_high, NULL,
307 true, EM_PARISC, 0, 0);
309 /* Unfortunately, load_elf sign-extends reading elf32. */
310 firmware_entry = (target_ureg)firmware_entry;
311 firmware_low = (target_ureg)firmware_low;
312 firmware_high = (target_ureg)firmware_high;
314 if (size < 0) {
315 error_report("could not load firmware '%s'", firmware_filename);
316 exit(1);
318 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
319 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
320 firmware_low, firmware_high, firmware_entry);
321 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) {
322 error_report("Firmware overlaps with memory or IO space");
323 exit(1);
325 g_free(firmware_filename);
327 rom_region = g_new(MemoryRegion, 1);
328 memory_region_init_ram(rom_region, NULL, "firmware",
329 (FIRMWARE_END - FIRMWARE_START), &error_fatal);
330 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
332 /* Load kernel */
333 if (kernel_filename) {
334 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys,
335 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL,
336 true, EM_PARISC, 0, 0);
338 /* Unfortunately, load_elf sign-extends reading elf32. */
339 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
340 kernel_low = (target_ureg)kernel_low;
341 kernel_high = (target_ureg)kernel_high;
343 if (size < 0) {
344 error_report("could not load kernel '%s'", kernel_filename);
345 exit(1);
347 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
348 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64
349 ", size %" PRIu64 " kB\n",
350 kernel_low, kernel_high, kernel_entry, size / KiB);
352 if (kernel_cmdline) {
353 cpu[0]->env.gr[24] = 0x4000;
354 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
355 TARGET_PAGE_SIZE, kernel_cmdline);
358 if (initrd_filename) {
359 ram_addr_t initrd_base;
360 int64_t initrd_size;
362 initrd_size = get_image_size(initrd_filename);
363 if (initrd_size < 0) {
364 error_report("could not load initial ram disk '%s'",
365 initrd_filename);
366 exit(1);
369 /* Load the initrd image high in memory.
370 Mirror the algorithm used by palo:
371 (1) Due to sign-extension problems and PDC,
372 put the initrd no higher than 1G.
373 (2) Reserve 64k for stack. */
374 initrd_base = MIN(machine->ram_size, 1 * GiB);
375 initrd_base = initrd_base - 64 * KiB;
376 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
378 if (initrd_base < kernel_high) {
379 error_report("kernel and initial ram disk too large!");
380 exit(1);
383 load_image_targphys(initrd_filename, initrd_base, initrd_size);
384 cpu[0]->env.gr[23] = initrd_base;
385 cpu[0]->env.gr[22] = initrd_base + initrd_size;
389 if (!kernel_entry) {
390 /* When booting via firmware, tell firmware if we want interactive
391 * mode (kernel_entry=1), and to boot from CD (gr[24]='d')
392 * or hard disc * (gr[24]='c').
394 kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0;
395 cpu[0]->env.gr[24] = machine->boot_config.order[0];
398 /* We jump to the firmware entry routine and pass the
399 * various parameters in registers. After firmware initialization,
400 * firmware will start the Linux kernel with ramdisk and cmdline.
402 cpu[0]->env.gr[26] = machine->ram_size;
403 cpu[0]->env.gr[25] = kernel_entry;
405 /* tell firmware how many SMP CPUs to present in inventory table */
406 cpu[0]->env.gr[21] = smp_cpus;
408 /* tell firmware fw_cfg port */
409 cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
412 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason)
414 unsigned int smp_cpus = ms->smp.cpus;
415 int i;
417 qemu_devices_reset(reason);
419 /* Start all CPUs at the firmware entry point.
420 * Monarch CPU will initialize firmware, secondary CPUs
421 * will enter a small idle look and wait for rendevouz. */
422 for (i = 0; i < smp_cpus; i++) {
423 cpu_set_pc(CPU(cpu[i]), firmware_entry);
424 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
427 /* already initialized by machine_hppa_init()? */
428 if (cpu[0]->env.gr[26] == ms->ram_size) {
429 return;
432 cpu[0]->env.gr[26] = ms->ram_size;
433 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
434 cpu[0]->env.gr[24] = 'c';
435 /* gr22/gr23 unused, no initrd while reboot. */
436 cpu[0]->env.gr[21] = smp_cpus;
437 /* tell firmware fw_cfg port */
438 cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
441 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp)
443 CPUState *cs;
445 CPU_FOREACH(cs) {
446 cpu_interrupt(cs, CPU_INTERRUPT_NMI);
450 static void hppa_machine_init_class_init(ObjectClass *oc, void *data)
452 MachineClass *mc = MACHINE_CLASS(oc);
453 NMIClass *nc = NMI_CLASS(oc);
455 mc->desc = "HPPA B160L machine";
456 mc->default_cpu_type = TYPE_HPPA_CPU;
457 mc->init = machine_hppa_init;
458 mc->reset = hppa_machine_reset;
459 mc->block_default_type = IF_SCSI;
460 mc->max_cpus = HPPA_MAX_CPUS;
461 mc->default_cpus = 1;
462 mc->is_default = true;
463 mc->default_ram_size = 512 * MiB;
464 mc->default_boot_order = "cd";
465 mc->default_ram_id = "ram";
467 nc->nmi_monitor_handler = hppa_nmi;
470 static const TypeInfo hppa_machine_init_typeinfo = {
471 .name = MACHINE_TYPE_NAME("hppa"),
472 .parent = TYPE_MACHINE,
473 .class_init = hppa_machine_init_class_init,
474 .interfaces = (InterfaceInfo[]) {
475 { TYPE_NMI },
480 static void hppa_machine_init_register_types(void)
482 type_register_static(&hppa_machine_init_typeinfo);
485 type_init(hppa_machine_init_register_types)