2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "qapi/error.h"
29 #include "qapi/visitor.h"
30 #include "sysemu/sysemu.h"
31 #include "sysemu/numa.h"
34 #include "hw/fw-path-provider.h"
37 #include "sysemu/device_tree.h"
38 #include "sysemu/block-backend.h"
39 #include "sysemu/cpus.h"
40 #include "sysemu/hw_accel.h"
42 #include "migration/misc.h"
43 #include "migration/global_state.h"
44 #include "migration/register.h"
45 #include "mmu-hash64.h"
46 #include "mmu-book3s-v3.h"
47 #include "cpu-models.h"
50 #include "hw/boards.h"
51 #include "hw/ppc/ppc.h"
52 #include "hw/loader.h"
54 #include "hw/ppc/fdt.h"
55 #include "hw/ppc/spapr.h"
56 #include "hw/ppc/spapr_vio.h"
57 #include "hw/pci-host/spapr.h"
58 #include "hw/ppc/xics.h"
59 #include "hw/pci/msi.h"
61 #include "hw/pci/pci.h"
62 #include "hw/scsi/scsi.h"
63 #include "hw/virtio/virtio-scsi.h"
64 #include "hw/virtio/vhost-scsi-common.h"
66 #include "exec/address-spaces.h"
68 #include "qemu/config-file.h"
69 #include "qemu/error-report.h"
72 #include "hw/intc/intc.h"
74 #include "hw/compat.h"
75 #include "qemu/cutils.h"
76 #include "hw/ppc/spapr_cpu_core.h"
80 /* SLOF memory layout:
82 * SLOF raw image loaded at 0, copies its romfs right below the flat
83 * device-tree, then position SLOF itself 31M below that
85 * So we set FW_OVERHEAD to 40MB which should account for all of that
88 * We load our kernel at 4M, leaving space for SLOF initial image
90 #define FDT_MAX_SIZE 0x100000
91 #define RTAS_MAX_SIZE 0x10000
92 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
93 #define FW_MAX_SIZE 0x400000
94 #define FW_FILE_NAME "slof.bin"
95 #define FW_OVERHEAD 0x2800000
96 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
98 #define MIN_RMA_SLOF 128UL
100 #define PHANDLE_XICP 0x00001111
102 /* These two functions implement the VCPU id numbering: one to compute them
103 * all and one to identify thread 0 of a VCORE. Any change to the first one
104 * is likely to have an impact on the second one, so let's keep them close.
106 static int spapr_vcpu_id(sPAPRMachineState
*spapr
, int cpu_index
)
110 (cpu_index
/ smp_threads
) * spapr
->vsmt
+ cpu_index
% smp_threads
;
112 static bool spapr_is_thread0_in_vcore(sPAPRMachineState
*spapr
,
116 return spapr_get_vcpu_id(cpu
) % spapr
->vsmt
== 0;
119 static ICSState
*spapr_ics_create(sPAPRMachineState
*spapr
,
120 const char *type_ics
,
121 int nr_irqs
, Error
**errp
)
123 Error
*local_err
= NULL
;
126 obj
= object_new(type_ics
);
127 object_property_add_child(OBJECT(spapr
), "ics", obj
, &error_abort
);
128 object_property_add_const_link(obj
, ICS_PROP_XICS
, OBJECT(spapr
),
130 object_property_set_int(obj
, nr_irqs
, "nr-irqs", &local_err
);
134 object_property_set_bool(obj
, true, "realized", &local_err
);
139 return ICS_SIMPLE(obj
);
142 error_propagate(errp
, local_err
);
146 static bool pre_2_10_vmstate_dummy_icp_needed(void *opaque
)
148 /* Dummy entries correspond to unused ICPState objects in older QEMUs,
149 * and newer QEMUs don't even have them. In both cases, we don't want
150 * to send anything on the wire.
155 static const VMStateDescription pre_2_10_vmstate_dummy_icp
= {
156 .name
= "icp/server",
158 .minimum_version_id
= 1,
159 .needed
= pre_2_10_vmstate_dummy_icp_needed
,
160 .fields
= (VMStateField
[]) {
161 VMSTATE_UNUSED(4), /* uint32_t xirr */
162 VMSTATE_UNUSED(1), /* uint8_t pending_priority */
163 VMSTATE_UNUSED(1), /* uint8_t mfrr */
164 VMSTATE_END_OF_LIST()
168 static void pre_2_10_vmstate_register_dummy_icp(int i
)
170 vmstate_register(NULL
, i
, &pre_2_10_vmstate_dummy_icp
,
171 (void *)(uintptr_t) i
);
174 static void pre_2_10_vmstate_unregister_dummy_icp(int i
)
176 vmstate_unregister(NULL
, &pre_2_10_vmstate_dummy_icp
,
177 (void *)(uintptr_t) i
);
180 static int xics_max_server_number(sPAPRMachineState
*spapr
)
183 return DIV_ROUND_UP(max_cpus
* spapr
->vsmt
, smp_threads
);
186 static void xics_system_init(MachineState
*machine
, int nr_irqs
, Error
**errp
)
188 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
191 if (machine_kernel_irqchip_allowed(machine
) &&
192 !xics_kvm_init(spapr
, errp
)) {
193 spapr
->icp_type
= TYPE_KVM_ICP
;
194 spapr
->ics
= spapr_ics_create(spapr
, TYPE_ICS_KVM
, nr_irqs
, errp
);
196 if (machine_kernel_irqchip_required(machine
) && !spapr
->ics
) {
197 error_prepend(errp
, "kernel_irqchip requested but unavailable: ");
203 xics_spapr_init(spapr
);
204 spapr
->icp_type
= TYPE_ICP
;
205 spapr
->ics
= spapr_ics_create(spapr
, TYPE_ICS_SIMPLE
, nr_irqs
, errp
);
212 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
216 uint32_t servers_prop
[smt_threads
];
217 uint32_t gservers_prop
[smt_threads
* 2];
218 int index
= spapr_get_vcpu_id(cpu
);
220 if (cpu
->compat_pvr
) {
221 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->compat_pvr
);
227 /* Build interrupt servers and gservers properties */
228 for (i
= 0; i
< smt_threads
; i
++) {
229 servers_prop
[i
] = cpu_to_be32(index
+ i
);
230 /* Hack, direct the group queues back to cpu 0 */
231 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
232 gservers_prop
[i
*2 + 1] = 0;
234 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
235 servers_prop
, sizeof(servers_prop
));
239 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
240 gservers_prop
, sizeof(gservers_prop
));
245 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
)
247 int index
= spapr_get_vcpu_id(cpu
);
248 uint32_t associativity
[] = {cpu_to_be32(0x5),
252 cpu_to_be32(cpu
->node_id
),
255 /* Advertise NUMA via ibm,associativity */
256 return fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
257 sizeof(associativity
));
260 /* Populate the "ibm,pa-features" property */
261 static void spapr_populate_pa_features(sPAPRMachineState
*spapr
,
263 void *fdt
, int offset
,
266 CPUPPCState
*env
= &cpu
->env
;
267 uint8_t pa_features_206
[] = { 6, 0,
268 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
269 uint8_t pa_features_207
[] = { 24, 0,
270 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
271 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
272 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
273 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
274 uint8_t pa_features_300
[] = { 66, 0,
275 /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */
276 /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */
277 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
279 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
281 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
282 /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */
283 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
284 /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */
285 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
286 /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
287 0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */
288 /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */
289 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */
290 /* 42: PM, 44: PC RA, 46: SC vec'd */
291 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */
292 /* 48: SIMD, 50: QP BFP, 52: String */
293 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */
294 /* 54: DecFP, 56: DecI, 58: SHA */
295 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */
296 /* 60: NM atomic, 62: RNG */
297 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
299 uint8_t *pa_features
= NULL
;
302 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_2_06
, 0, cpu
->compat_pvr
)) {
303 pa_features
= pa_features_206
;
304 pa_size
= sizeof(pa_features_206
);
306 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_2_07
, 0, cpu
->compat_pvr
)) {
307 pa_features
= pa_features_207
;
308 pa_size
= sizeof(pa_features_207
);
310 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_3_00
, 0, cpu
->compat_pvr
)) {
311 pa_features
= pa_features_300
;
312 pa_size
= sizeof(pa_features_300
);
318 if (env
->ci_large_pages
) {
320 * Note: we keep CI large pages off by default because a 64K capable
321 * guest provisioned with large pages might otherwise try to map a qemu
322 * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
323 * even if that qemu runs on a 4k host.
324 * We dd this bit back here if we are confident this is not an issue
326 pa_features
[3] |= 0x20;
328 if ((spapr_get_cap(spapr
, SPAPR_CAP_HTM
) != 0) && pa_size
> 24) {
329 pa_features
[24] |= 0x80; /* Transactional memory support */
331 if (legacy_guest
&& pa_size
> 40) {
332 /* Workaround for broken kernels that attempt (guest) radix
333 * mode when they can't handle it, if they see the radix bit set
334 * in pa-features. So hide it from them. */
335 pa_features
[40 + 2] &= ~0x80; /* Radix MMU */
338 _FDT((fdt_setprop(fdt
, offset
, "ibm,pa-features", pa_features
, pa_size
)));
341 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
343 int ret
= 0, offset
, cpus_offset
;
346 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
349 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
350 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
351 int index
= spapr_get_vcpu_id(cpu
);
352 int compat_smt
= MIN(smp_threads
, ppc_compat_max_vthreads(cpu
));
354 if (!spapr_is_thread0_in_vcore(spapr
, cpu
)) {
358 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
360 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
361 if (cpus_offset
< 0) {
362 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
363 if (cpus_offset
< 0) {
367 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
369 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
375 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
376 pft_size_prop
, sizeof(pft_size_prop
));
381 if (nb_numa_nodes
> 1) {
382 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cpu
);
388 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
, compat_smt
);
393 spapr_populate_pa_features(spapr
, cpu
, fdt
, offset
,
394 spapr
->cas_legacy_guest_workaround
);
399 static hwaddr
spapr_node0_size(MachineState
*machine
)
403 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
404 if (numa_info
[i
].node_mem
) {
405 return MIN(pow2floor(numa_info
[i
].node_mem
),
410 return machine
->ram_size
;
413 static void add_str(GString
*s
, const gchar
*s1
)
415 g_string_append_len(s
, s1
, strlen(s1
) + 1);
418 static int spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
421 uint32_t associativity
[] = {
422 cpu_to_be32(0x4), /* length */
423 cpu_to_be32(0x0), cpu_to_be32(0x0),
424 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
427 uint64_t mem_reg_property
[2];
430 mem_reg_property
[0] = cpu_to_be64(start
);
431 mem_reg_property
[1] = cpu_to_be64(size
);
433 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
434 off
= fdt_add_subnode(fdt
, 0, mem_name
);
436 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
437 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
438 sizeof(mem_reg_property
))));
439 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
440 sizeof(associativity
))));
444 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
446 MachineState
*machine
= MACHINE(spapr
);
447 hwaddr mem_start
, node_size
;
448 int i
, nb_nodes
= nb_numa_nodes
;
449 NodeInfo
*nodes
= numa_info
;
452 /* No NUMA nodes, assume there is just one node with whole RAM */
453 if (!nb_numa_nodes
) {
455 ramnode
.node_mem
= machine
->ram_size
;
459 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
460 if (!nodes
[i
].node_mem
) {
463 if (mem_start
>= machine
->ram_size
) {
466 node_size
= nodes
[i
].node_mem
;
467 if (node_size
> machine
->ram_size
- mem_start
) {
468 node_size
= machine
->ram_size
- mem_start
;
472 /* spapr_machine_init() checks for rma_size <= node0_size
474 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
475 mem_start
+= spapr
->rma_size
;
476 node_size
-= spapr
->rma_size
;
478 for ( ; node_size
; ) {
479 hwaddr sizetmp
= pow2floor(node_size
);
481 /* mem_start != 0 here */
482 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
483 sizetmp
= 1ULL << ctzl(mem_start
);
486 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
487 node_size
-= sizetmp
;
488 mem_start
+= sizetmp
;
495 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
496 sPAPRMachineState
*spapr
)
498 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
499 CPUPPCState
*env
= &cpu
->env
;
500 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
501 int index
= spapr_get_vcpu_id(cpu
);
502 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
503 0xffffffff, 0xffffffff};
504 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq()
505 : SPAPR_TIMEBASE_FREQ
;
506 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
507 uint32_t page_sizes_prop
[64];
508 size_t page_sizes_prop_size
;
509 uint32_t vcpus_per_socket
= smp_threads
* smp_cores
;
510 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
511 int compat_smt
= MIN(smp_threads
, ppc_compat_max_vthreads(cpu
));
512 sPAPRDRConnector
*drc
;
514 uint32_t radix_AP_encodings
[PPC_PAGE_SIZES_MAX_SZ
];
517 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
, index
);
519 drc_index
= spapr_drc_index(drc
);
520 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,my-drc-index", drc_index
)));
523 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
524 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
526 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
527 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
528 env
->dcache_line_size
)));
529 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
530 env
->dcache_line_size
)));
531 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
532 env
->icache_line_size
)));
533 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
534 env
->icache_line_size
)));
536 if (pcc
->l1_dcache_size
) {
537 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
538 pcc
->l1_dcache_size
)));
540 warn_report("Unknown L1 dcache size for cpu");
542 if (pcc
->l1_icache_size
) {
543 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
544 pcc
->l1_icache_size
)));
546 warn_report("Unknown L1 icache size for cpu");
549 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
550 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
551 _FDT((fdt_setprop_cell(fdt
, offset
, "slb-size", env
->slb_nr
)));
552 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", env
->slb_nr
)));
553 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
554 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
556 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
557 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
560 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
561 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
562 segs
, sizeof(segs
))));
565 /* Advertise VSX (vector extensions) if available
566 * 1 == VMX / Altivec available
569 * Only CPUs for which we create core types in spapr_cpu_core.c
570 * are possible, and all of those have VMX */
571 if (spapr_get_cap(spapr
, SPAPR_CAP_VSX
) != 0) {
572 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", 2)));
574 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", 1)));
577 /* Advertise DFP (Decimal Floating Point) if available
578 * 0 / no property == no DFP
579 * 1 == DFP available */
580 if (spapr_get_cap(spapr
, SPAPR_CAP_DFP
) != 0) {
581 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
584 page_sizes_prop_size
= ppc_create_page_sizes_prop(env
, page_sizes_prop
,
585 sizeof(page_sizes_prop
));
586 if (page_sizes_prop_size
) {
587 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
588 page_sizes_prop
, page_sizes_prop_size
)));
591 spapr_populate_pa_features(spapr
, cpu
, fdt
, offset
, false);
593 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
594 cs
->cpu_index
/ vcpus_per_socket
)));
596 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
597 pft_size_prop
, sizeof(pft_size_prop
))));
599 if (nb_numa_nodes
> 1) {
600 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cpu
));
603 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
, compat_smt
));
605 if (pcc
->radix_page_info
) {
606 for (i
= 0; i
< pcc
->radix_page_info
->count
; i
++) {
607 radix_AP_encodings
[i
] =
608 cpu_to_be32(pcc
->radix_page_info
->entries
[i
]);
610 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-radix-AP-encodings",
612 pcc
->radix_page_info
->count
*
613 sizeof(radix_AP_encodings
[0]))));
617 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
623 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
625 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
626 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
629 * We walk the CPUs in reverse order to ensure that CPU DT nodes
630 * created by fdt_add_subnode() end up in the right order in FDT
631 * for the guest kernel the enumerate the CPUs correctly.
633 CPU_FOREACH_REVERSE(cs
) {
634 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
635 int index
= spapr_get_vcpu_id(cpu
);
636 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
639 if (!spapr_is_thread0_in_vcore(spapr
, cpu
)) {
643 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
644 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
647 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
652 static uint32_t spapr_pc_dimm_node(MemoryDeviceInfoList
*list
, ram_addr_t addr
)
654 MemoryDeviceInfoList
*info
;
656 for (info
= list
; info
; info
= info
->next
) {
657 MemoryDeviceInfo
*value
= info
->value
;
659 if (value
&& value
->type
== MEMORY_DEVICE_INFO_KIND_DIMM
) {
660 PCDIMMDeviceInfo
*pcdimm_info
= value
->u
.dimm
.data
;
662 if (pcdimm_info
->addr
>= addr
&&
663 addr
< (pcdimm_info
->addr
+ pcdimm_info
->size
)) {
664 return pcdimm_info
->node
;
673 * Adds ibm,dynamic-reconfiguration-memory node.
674 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
675 * of this device tree node.
677 static int spapr_populate_drconf_memory(sPAPRMachineState
*spapr
, void *fdt
)
679 MachineState
*machine
= MACHINE(spapr
);
681 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
682 uint32_t prop_lmb_size
[] = {0, cpu_to_be32(lmb_size
)};
683 uint32_t hotplug_lmb_start
= spapr
->hotplug_memory
.base
/ lmb_size
;
684 uint32_t nr_lmbs
= (spapr
->hotplug_memory
.base
+
685 memory_region_size(&spapr
->hotplug_memory
.mr
)) /
687 uint32_t *int_buf
, *cur_index
, buf_len
;
688 int nr_nodes
= nb_numa_nodes
? nb_numa_nodes
: 1;
689 MemoryDeviceInfoList
*dimms
= NULL
;
692 * Don't create the node if there is no hotpluggable memory
694 if (machine
->ram_size
== machine
->maxram_size
) {
699 * Allocate enough buffer size to fit in ibm,dynamic-memory
700 * or ibm,associativity-lookup-arrays
702 buf_len
= MAX(nr_lmbs
* SPAPR_DR_LMB_LIST_ENTRY_SIZE
+ 1, nr_nodes
* 4 + 2)
704 cur_index
= int_buf
= g_malloc0(buf_len
);
706 offset
= fdt_add_subnode(fdt
, 0, "ibm,dynamic-reconfiguration-memory");
708 ret
= fdt_setprop(fdt
, offset
, "ibm,lmb-size", prop_lmb_size
,
709 sizeof(prop_lmb_size
));
714 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-flags-mask", 0xff);
719 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-preservation-time", 0x0);
724 if (hotplug_lmb_start
) {
725 MemoryDeviceInfoList
**prev
= &dimms
;
726 qmp_pc_dimm_device_list(qdev_get_machine(), &prev
);
729 /* ibm,dynamic-memory */
730 int_buf
[0] = cpu_to_be32(nr_lmbs
);
732 for (i
= 0; i
< nr_lmbs
; i
++) {
733 uint64_t addr
= i
* lmb_size
;
734 uint32_t *dynamic_memory
= cur_index
;
736 if (i
>= hotplug_lmb_start
) {
737 sPAPRDRConnector
*drc
;
739 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
, i
);
742 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
743 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
744 dynamic_memory
[2] = cpu_to_be32(spapr_drc_index(drc
));
745 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
746 dynamic_memory
[4] = cpu_to_be32(spapr_pc_dimm_node(dimms
, addr
));
747 if (memory_region_present(get_system_memory(), addr
)) {
748 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED
);
750 dynamic_memory
[5] = cpu_to_be32(0);
754 * LMB information for RMA, boot time RAM and gap b/n RAM and
755 * hotplug memory region -- all these are marked as reserved
756 * and as having no valid DRC.
758 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
759 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
760 dynamic_memory
[2] = cpu_to_be32(0);
761 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
762 dynamic_memory
[4] = cpu_to_be32(-1);
763 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED
|
764 SPAPR_LMB_FLAGS_DRC_INVALID
);
767 cur_index
+= SPAPR_DR_LMB_LIST_ENTRY_SIZE
;
769 qapi_free_MemoryDeviceInfoList(dimms
);
770 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory", int_buf
, buf_len
);
775 /* ibm,associativity-lookup-arrays */
777 int_buf
[0] = cpu_to_be32(nr_nodes
);
778 int_buf
[1] = cpu_to_be32(4); /* Number of entries per associativity list */
780 for (i
= 0; i
< nr_nodes
; i
++) {
781 uint32_t associativity
[] = {
787 memcpy(cur_index
, associativity
, sizeof(associativity
));
790 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity-lookup-arrays", int_buf
,
791 (cur_index
- int_buf
) * sizeof(uint32_t));
797 static int spapr_dt_cas_updates(sPAPRMachineState
*spapr
, void *fdt
,
798 sPAPROptionVector
*ov5_updates
)
800 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(spapr
);
803 /* Generate ibm,dynamic-reconfiguration-memory node if required */
804 if (spapr_ovec_test(ov5_updates
, OV5_DRCONF_MEMORY
)) {
805 g_assert(smc
->dr_lmb_enabled
);
806 ret
= spapr_populate_drconf_memory(spapr
, fdt
);
812 offset
= fdt_path_offset(fdt
, "/chosen");
814 offset
= fdt_add_subnode(fdt
, 0, "chosen");
819 ret
= spapr_ovec_populate_dt(fdt
, offset
, spapr
->ov5_cas
,
820 "ibm,architecture-vec-5");
826 static bool spapr_hotplugged_dev_before_cas(void)
828 Object
*drc_container
, *obj
;
829 ObjectProperty
*prop
;
830 ObjectPropertyIterator iter
;
832 drc_container
= container_get(object_get_root(), "/dr-connector");
833 object_property_iter_init(&iter
, drc_container
);
834 while ((prop
= object_property_iter_next(&iter
))) {
835 if (!strstart(prop
->type
, "link<", NULL
)) {
838 obj
= object_property_get_link(drc_container
, prop
->name
, NULL
);
839 if (spapr_drc_needed(obj
)) {
846 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
847 target_ulong addr
, target_ulong size
,
848 sPAPROptionVector
*ov5_updates
)
850 void *fdt
, *fdt_skel
;
851 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
853 if (spapr_hotplugged_dev_before_cas()) {
857 if (size
< sizeof(hdr
) || size
> FW_MAX_SIZE
) {
858 error_report("SLOF provided an unexpected CAS buffer size "
859 TARGET_FMT_lu
" (min: %zu, max: %u)",
860 size
, sizeof(hdr
), FW_MAX_SIZE
);
866 /* Create skeleton */
867 fdt_skel
= g_malloc0(size
);
868 _FDT((fdt_create(fdt_skel
, size
)));
869 _FDT((fdt_begin_node(fdt_skel
, "")));
870 _FDT((fdt_end_node(fdt_skel
)));
871 _FDT((fdt_finish(fdt_skel
)));
872 fdt
= g_malloc0(size
);
873 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
876 /* Fixup cpu nodes */
877 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
879 if (spapr_dt_cas_updates(spapr
, fdt
, ov5_updates
)) {
883 /* Pack resulting tree */
884 _FDT((fdt_pack(fdt
)));
886 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
887 trace_spapr_cas_failed(size
);
891 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
892 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
893 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
899 static void spapr_dt_rtas(sPAPRMachineState
*spapr
, void *fdt
)
902 GString
*hypertas
= g_string_sized_new(256);
903 GString
*qemu_hypertas
= g_string_sized_new(256);
904 uint32_t refpoints
[] = { cpu_to_be32(0x4), cpu_to_be32(0x4) };
905 uint64_t max_hotplug_addr
= spapr
->hotplug_memory
.base
+
906 memory_region_size(&spapr
->hotplug_memory
.mr
);
907 uint32_t lrdr_capacity
[] = {
908 cpu_to_be32(max_hotplug_addr
>> 32),
909 cpu_to_be32(max_hotplug_addr
& 0xffffffff),
910 0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE
),
911 cpu_to_be32(max_cpus
/ smp_threads
),
914 _FDT(rtas
= fdt_add_subnode(fdt
, 0, "rtas"));
917 add_str(hypertas
, "hcall-pft");
918 add_str(hypertas
, "hcall-term");
919 add_str(hypertas
, "hcall-dabr");
920 add_str(hypertas
, "hcall-interrupt");
921 add_str(hypertas
, "hcall-tce");
922 add_str(hypertas
, "hcall-vio");
923 add_str(hypertas
, "hcall-splpar");
924 add_str(hypertas
, "hcall-bulk");
925 add_str(hypertas
, "hcall-set-mode");
926 add_str(hypertas
, "hcall-sprg0");
927 add_str(hypertas
, "hcall-copy");
928 add_str(hypertas
, "hcall-debug");
929 add_str(qemu_hypertas
, "hcall-memop1");
931 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
932 add_str(hypertas
, "hcall-multi-tce");
935 if (spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) {
936 add_str(hypertas
, "hcall-hpt-resize");
939 _FDT(fdt_setprop(fdt
, rtas
, "ibm,hypertas-functions",
940 hypertas
->str
, hypertas
->len
));
941 g_string_free(hypertas
, TRUE
);
942 _FDT(fdt_setprop(fdt
, rtas
, "qemu,hypertas-functions",
943 qemu_hypertas
->str
, qemu_hypertas
->len
));
944 g_string_free(qemu_hypertas
, TRUE
);
946 _FDT(fdt_setprop(fdt
, rtas
, "ibm,associativity-reference-points",
947 refpoints
, sizeof(refpoints
)));
949 _FDT(fdt_setprop_cell(fdt
, rtas
, "rtas-error-log-max",
950 RTAS_ERROR_LOG_MAX
));
951 _FDT(fdt_setprop_cell(fdt
, rtas
, "rtas-event-scan-rate",
952 RTAS_EVENT_SCAN_RATE
));
954 g_assert(msi_nonbroken
);
955 _FDT(fdt_setprop(fdt
, rtas
, "ibm,change-msix-capable", NULL
, 0));
958 * According to PAPR, rtas ibm,os-term does not guarantee a return
959 * back to the guest cpu.
961 * While an additional ibm,extended-os-term property indicates
962 * that rtas call return will always occur. Set this property.
964 _FDT(fdt_setprop(fdt
, rtas
, "ibm,extended-os-term", NULL
, 0));
966 _FDT(fdt_setprop(fdt
, rtas
, "ibm,lrdr-capacity",
967 lrdr_capacity
, sizeof(lrdr_capacity
)));
969 spapr_dt_rtas_tokens(fdt
, rtas
);
972 /* Prepare ibm,arch-vec-5-platform-support, which indicates the MMU features
973 * that the guest may request and thus the valid values for bytes 24..26 of
974 * option vector 5: */
975 static void spapr_dt_ov5_platform_support(void *fdt
, int chosen
)
977 PowerPCCPU
*first_ppc_cpu
= POWERPC_CPU(first_cpu
);
980 23, 0x00, /* Xive mode, filled in below. */
981 24, 0x00, /* Hash/Radix, filled in below. */
982 25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
983 26, 0x40, /* Radix options: GTSE == yes. */
986 if (!ppc_check_compat(first_ppc_cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
987 first_ppc_cpu
->compat_pvr
)) {
988 /* If we're in a pre POWER9 compat mode then the guest should do hash */
989 val
[3] = 0x00; /* Hash */
990 } else if (kvm_enabled()) {
991 if (kvmppc_has_cap_mmu_radix() && kvmppc_has_cap_mmu_hash_v3()) {
992 val
[3] = 0x80; /* OV5_MMU_BOTH */
993 } else if (kvmppc_has_cap_mmu_radix()) {
994 val
[3] = 0x40; /* OV5_MMU_RADIX_300 */
996 val
[3] = 0x00; /* Hash */
999 /* V3 MMU supports both hash and radix in tcg (with dynamic switching) */
1002 _FDT(fdt_setprop(fdt
, chosen
, "ibm,arch-vec-5-platform-support",
1006 static void spapr_dt_chosen(sPAPRMachineState
*spapr
, void *fdt
)
1008 MachineState
*machine
= MACHINE(spapr
);
1010 const char *boot_device
= machine
->boot_order
;
1011 char *stdout_path
= spapr_vio_stdout_path(spapr
->vio_bus
);
1013 char *bootlist
= get_boot_devices_list(&cb
, true);
1015 _FDT(chosen
= fdt_add_subnode(fdt
, 0, "chosen"));
1017 _FDT(fdt_setprop_string(fdt
, chosen
, "bootargs", machine
->kernel_cmdline
));
1018 _FDT(fdt_setprop_cell(fdt
, chosen
, "linux,initrd-start",
1019 spapr
->initrd_base
));
1020 _FDT(fdt_setprop_cell(fdt
, chosen
, "linux,initrd-end",
1021 spapr
->initrd_base
+ spapr
->initrd_size
));
1023 if (spapr
->kernel_size
) {
1024 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
1025 cpu_to_be64(spapr
->kernel_size
) };
1027 _FDT(fdt_setprop(fdt
, chosen
, "qemu,boot-kernel",
1028 &kprop
, sizeof(kprop
)));
1029 if (spapr
->kernel_le
) {
1030 _FDT(fdt_setprop(fdt
, chosen
, "qemu,boot-kernel-le", NULL
, 0));
1034 _FDT((fdt_setprop_cell(fdt
, chosen
, "qemu,boot-menu", boot_menu
)));
1036 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-width", graphic_width
));
1037 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-height", graphic_height
));
1038 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-depth", graphic_depth
));
1040 if (cb
&& bootlist
) {
1043 for (i
= 0; i
< cb
; i
++) {
1044 if (bootlist
[i
] == '\n') {
1048 _FDT(fdt_setprop_string(fdt
, chosen
, "qemu,boot-list", bootlist
));
1051 if (boot_device
&& strlen(boot_device
)) {
1052 _FDT(fdt_setprop_string(fdt
, chosen
, "qemu,boot-device", boot_device
));
1055 if (!spapr
->has_graphics
&& stdout_path
) {
1057 * "linux,stdout-path" and "stdout" properties are deprecated by linux
1058 * kernel. New platforms should only use the "stdout-path" property. Set
1059 * the new property and continue using older property to remain
1060 * compatible with the existing firmware.
1062 _FDT(fdt_setprop_string(fdt
, chosen
, "linux,stdout-path", stdout_path
));
1063 _FDT(fdt_setprop_string(fdt
, chosen
, "stdout-path", stdout_path
));
1066 spapr_dt_ov5_platform_support(fdt
, chosen
);
1068 g_free(stdout_path
);
1072 static void spapr_dt_hypervisor(sPAPRMachineState
*spapr
, void *fdt
)
1074 /* The /hypervisor node isn't in PAPR - this is a hack to allow PR
1075 * KVM to work under pHyp with some guest co-operation */
1077 uint8_t hypercall
[16];
1079 _FDT(hypervisor
= fdt_add_subnode(fdt
, 0, "hypervisor"));
1080 /* indicate KVM hypercall interface */
1081 _FDT(fdt_setprop_string(fdt
, hypervisor
, "compatible", "linux,kvm"));
1082 if (kvmppc_has_cap_fixup_hcalls()) {
1084 * Older KVM versions with older guest kernels were broken
1085 * with the magic page, don't allow the guest to map it.
1087 if (!kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
1088 sizeof(hypercall
))) {
1089 _FDT(fdt_setprop(fdt
, hypervisor
, "hcall-instructions",
1090 hypercall
, sizeof(hypercall
)));
1095 static void *spapr_build_fdt(sPAPRMachineState
*spapr
,
1099 MachineState
*machine
= MACHINE(spapr
);
1100 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1101 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
1107 fdt
= g_malloc0(FDT_MAX_SIZE
);
1108 _FDT((fdt_create_empty_tree(fdt
, FDT_MAX_SIZE
)));
1111 _FDT(fdt_setprop_string(fdt
, 0, "device_type", "chrp"));
1112 _FDT(fdt_setprop_string(fdt
, 0, "model", "IBM pSeries (emulated by qemu)"));
1113 _FDT(fdt_setprop_string(fdt
, 0, "compatible", "qemu,pseries"));
1116 * Add info to guest to indentify which host is it being run on
1117 * and what is the uuid of the guest
1119 if (kvmppc_get_host_model(&buf
)) {
1120 _FDT(fdt_setprop_string(fdt
, 0, "host-model", buf
));
1123 if (kvmppc_get_host_serial(&buf
)) {
1124 _FDT(fdt_setprop_string(fdt
, 0, "host-serial", buf
));
1128 buf
= qemu_uuid_unparse_strdup(&qemu_uuid
);
1130 _FDT(fdt_setprop_string(fdt
, 0, "vm,uuid", buf
));
1131 if (qemu_uuid_set
) {
1132 _FDT(fdt_setprop_string(fdt
, 0, "system-id", buf
));
1136 if (qemu_get_vm_name()) {
1137 _FDT(fdt_setprop_string(fdt
, 0, "ibm,partition-name",
1138 qemu_get_vm_name()));
1141 _FDT(fdt_setprop_cell(fdt
, 0, "#address-cells", 2));
1142 _FDT(fdt_setprop_cell(fdt
, 0, "#size-cells", 2));
1144 /* /interrupt controller */
1145 spapr_dt_xics(xics_max_server_number(spapr
), fdt
, PHANDLE_XICP
);
1147 ret
= spapr_populate_memory(spapr
, fdt
);
1149 error_report("couldn't setup memory nodes in fdt");
1154 spapr_dt_vdevice(spapr
->vio_bus
, fdt
);
1156 if (object_resolve_path_type("", TYPE_SPAPR_RNG
, NULL
)) {
1157 ret
= spapr_rng_populate_dt(fdt
);
1159 error_report("could not set up rng device in the fdt");
1164 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
1165 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
1167 error_report("couldn't setup PCI devices in fdt");
1173 spapr_populate_cpus_dt_node(fdt
, spapr
);
1175 if (smc
->dr_lmb_enabled
) {
1176 _FDT(spapr_drc_populate_dt(fdt
, 0, NULL
, SPAPR_DR_CONNECTOR_TYPE_LMB
));
1179 if (mc
->has_hotpluggable_cpus
) {
1180 int offset
= fdt_path_offset(fdt
, "/cpus");
1181 ret
= spapr_drc_populate_dt(fdt
, offset
, NULL
,
1182 SPAPR_DR_CONNECTOR_TYPE_CPU
);
1184 error_report("Couldn't set up CPU DR device tree properties");
1189 /* /event-sources */
1190 spapr_dt_events(spapr
, fdt
);
1193 spapr_dt_rtas(spapr
, fdt
);
1196 spapr_dt_chosen(spapr
, fdt
);
1199 if (kvm_enabled()) {
1200 spapr_dt_hypervisor(spapr
, fdt
);
1203 /* Build memory reserve map */
1204 if (spapr
->kernel_size
) {
1205 _FDT((fdt_add_mem_rsv(fdt
, KERNEL_LOAD_ADDR
, spapr
->kernel_size
)));
1207 if (spapr
->initrd_size
) {
1208 _FDT((fdt_add_mem_rsv(fdt
, spapr
->initrd_base
, spapr
->initrd_size
)));
1211 /* ibm,client-architecture-support updates */
1212 ret
= spapr_dt_cas_updates(spapr
, fdt
, spapr
->ov5_cas
);
1214 error_report("couldn't setup CAS properties fdt");
1221 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
1223 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
1226 static void emulate_spapr_hypercall(PPCVirtualHypervisor
*vhyp
,
1229 CPUPPCState
*env
= &cpu
->env
;
1231 /* The TCG path should also be holding the BQL at this point */
1232 g_assert(qemu_mutex_iothread_locked());
1235 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
1236 env
->gpr
[3] = H_PRIVILEGE
;
1238 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
1242 static uint64_t spapr_get_patbe(PPCVirtualHypervisor
*vhyp
)
1244 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1246 return spapr
->patb_entry
;
1249 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
1250 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
1251 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
1252 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
1253 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
1256 * Get the fd to access the kernel htab, re-opening it if necessary
1258 static int get_htab_fd(sPAPRMachineState
*spapr
)
1260 Error
*local_err
= NULL
;
1262 if (spapr
->htab_fd
>= 0) {
1263 return spapr
->htab_fd
;
1266 spapr
->htab_fd
= kvmppc_get_htab_fd(false, 0, &local_err
);
1267 if (spapr
->htab_fd
< 0) {
1268 error_report_err(local_err
);
1271 return spapr
->htab_fd
;
1274 void close_htab_fd(sPAPRMachineState
*spapr
)
1276 if (spapr
->htab_fd
>= 0) {
1277 close(spapr
->htab_fd
);
1279 spapr
->htab_fd
= -1;
1282 static hwaddr
spapr_hpt_mask(PPCVirtualHypervisor
*vhyp
)
1284 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1286 return HTAB_SIZE(spapr
) / HASH_PTEG_SIZE_64
- 1;
1289 static target_ulong
spapr_encode_hpt_for_kvm_pr(PPCVirtualHypervisor
*vhyp
)
1291 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1293 assert(kvm_enabled());
1299 return (target_ulong
)(uintptr_t)spapr
->htab
| (spapr
->htab_shift
- 18);
1302 static const ppc_hash_pte64_t
*spapr_map_hptes(PPCVirtualHypervisor
*vhyp
,
1305 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1306 hwaddr pte_offset
= ptex
* HASH_PTE_SIZE_64
;
1310 * HTAB is controlled by KVM. Fetch into temporary buffer
1312 ppc_hash_pte64_t
*hptes
= g_malloc(n
* HASH_PTE_SIZE_64
);
1313 kvmppc_read_hptes(hptes
, ptex
, n
);
1318 * HTAB is controlled by QEMU. Just point to the internally
1321 return (const ppc_hash_pte64_t
*)(spapr
->htab
+ pte_offset
);
1324 static void spapr_unmap_hptes(PPCVirtualHypervisor
*vhyp
,
1325 const ppc_hash_pte64_t
*hptes
,
1328 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1331 g_free((void *)hptes
);
1334 /* Nothing to do for qemu managed HPT */
1337 static void spapr_store_hpte(PPCVirtualHypervisor
*vhyp
, hwaddr ptex
,
1338 uint64_t pte0
, uint64_t pte1
)
1340 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1341 hwaddr offset
= ptex
* HASH_PTE_SIZE_64
;
1344 kvmppc_write_hpte(ptex
, pte0
, pte1
);
1346 stq_p(spapr
->htab
+ offset
, pte0
);
1347 stq_p(spapr
->htab
+ offset
+ HASH_PTE_SIZE_64
/ 2, pte1
);
1351 int spapr_hpt_shift_for_ramsize(uint64_t ramsize
)
1355 /* We aim for a hash table of size 1/128 the size of RAM (rounded
1356 * up). The PAPR recommendation is actually 1/64 of RAM size, but
1357 * that's much more than is needed for Linux guests */
1358 shift
= ctz64(pow2ceil(ramsize
)) - 7;
1359 shift
= MAX(shift
, 18); /* Minimum architected size */
1360 shift
= MIN(shift
, 46); /* Maximum architected size */
1364 void spapr_free_hpt(sPAPRMachineState
*spapr
)
1366 g_free(spapr
->htab
);
1368 spapr
->htab_shift
= 0;
1369 close_htab_fd(spapr
);
1372 void spapr_reallocate_hpt(sPAPRMachineState
*spapr
, int shift
,
1377 /* Clean up any HPT info from a previous boot */
1378 spapr_free_hpt(spapr
);
1380 rc
= kvmppc_reset_htab(shift
);
1382 /* kernel-side HPT needed, but couldn't allocate one */
1383 error_setg_errno(errp
, errno
,
1384 "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
1386 /* This is almost certainly fatal, but if the caller really
1387 * wants to carry on with shift == 0, it's welcome to try */
1388 } else if (rc
> 0) {
1389 /* kernel-side HPT allocated */
1392 "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
1396 spapr
->htab_shift
= shift
;
1399 /* kernel-side HPT not needed, allocate in userspace instead */
1400 size_t size
= 1ULL << shift
;
1403 spapr
->htab
= qemu_memalign(size
, size
);
1405 error_setg_errno(errp
, errno
,
1406 "Could not allocate HPT of order %d", shift
);
1410 memset(spapr
->htab
, 0, size
);
1411 spapr
->htab_shift
= shift
;
1413 for (i
= 0; i
< size
/ HASH_PTE_SIZE_64
; i
++) {
1414 DIRTY_HPTE(HPTE(spapr
->htab
, i
));
1417 /* We're setting up a hash table, so that means we're not radix */
1418 spapr
->patb_entry
= 0;
1421 void spapr_setup_hpt_and_vrma(sPAPRMachineState
*spapr
)
1425 if ((spapr
->resize_hpt
== SPAPR_RESIZE_HPT_DISABLED
)
1426 || (spapr
->cas_reboot
1427 && !spapr_ovec_test(spapr
->ov5_cas
, OV5_HPT_RESIZE
))) {
1428 hpt_shift
= spapr_hpt_shift_for_ramsize(MACHINE(spapr
)->maxram_size
);
1430 uint64_t current_ram_size
;
1432 current_ram_size
= MACHINE(spapr
)->ram_size
+ get_plugged_memory_size();
1433 hpt_shift
= spapr_hpt_shift_for_ramsize(current_ram_size
);
1435 spapr_reallocate_hpt(spapr
, hpt_shift
, &error_fatal
);
1437 if (spapr
->vrma_adjust
) {
1438 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(MACHINE(spapr
)),
1443 static void find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
1445 bool matched
= false;
1447 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
1452 error_report("Device %s is not supported by this machine yet.",
1453 qdev_fw_name(DEVICE(sbdev
)));
1458 static int spapr_reset_drcs(Object
*child
, void *opaque
)
1460 sPAPRDRConnector
*drc
=
1461 (sPAPRDRConnector
*) object_dynamic_cast(child
,
1462 TYPE_SPAPR_DR_CONNECTOR
);
1465 spapr_drc_reset(drc
);
1471 static void spapr_machine_reset(void)
1473 MachineState
*machine
= MACHINE(qdev_get_machine());
1474 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1475 PowerPCCPU
*first_ppc_cpu
;
1476 uint32_t rtas_limit
;
1477 hwaddr rtas_addr
, fdt_addr
;
1481 /* Check for unknown sysbus devices */
1482 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
1484 spapr_caps_reset(spapr
);
1486 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1487 if (kvm_enabled() && kvmppc_has_cap_mmu_radix() &&
1488 ppc_check_compat(first_ppc_cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
1489 spapr
->max_compat_pvr
)) {
1490 /* If using KVM with radix mode available, VCPUs can be started
1491 * without a HPT because KVM will start them in radix mode.
1492 * Set the GR bit in PATB so that we know there is no HPT. */
1493 spapr
->patb_entry
= PATBE1_GR
;
1495 spapr_setup_hpt_and_vrma(spapr
);
1498 /* if this reset wasn't generated by CAS, we should reset our
1499 * negotiated options and start from scratch */
1500 if (!spapr
->cas_reboot
) {
1501 spapr_ovec_cleanup(spapr
->ov5_cas
);
1502 spapr
->ov5_cas
= spapr_ovec_new();
1504 ppc_set_compat(first_ppc_cpu
, spapr
->max_compat_pvr
, &error_fatal
);
1507 qemu_devices_reset();
1509 /* DRC reset may cause a device to be unplugged. This will cause troubles
1510 * if this device is used by another device (eg, a running vhost backend
1511 * will crash QEMU if the DIMM holding the vring goes away). To avoid such
1512 * situations, we reset DRCs after all devices have been reset.
1514 object_child_foreach_recursive(object_get_root(), spapr_reset_drcs
, NULL
);
1516 spapr_clear_pending_events(spapr
);
1519 * We place the device tree and RTAS just below either the top of the RMA,
1520 * or just below 2GB, whichever is lowere, so that it can be
1521 * processed with 32-bit real mode code if necessary
1523 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
1524 rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1525 fdt_addr
= rtas_addr
- FDT_MAX_SIZE
;
1527 fdt
= spapr_build_fdt(spapr
, rtas_addr
, spapr
->rtas_size
);
1529 spapr_load_rtas(spapr
, fdt
, rtas_addr
);
1533 /* Should only fail if we've built a corrupted tree */
1536 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
1537 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
1538 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
1543 qemu_fdt_dumpdtb(fdt
, fdt_totalsize(fdt
));
1544 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
1547 /* Set up the entry state */
1548 first_ppc_cpu
->env
.gpr
[3] = fdt_addr
;
1549 first_ppc_cpu
->env
.gpr
[5] = 0;
1550 first_cpu
->halted
= 0;
1551 first_ppc_cpu
->env
.nip
= SPAPR_ENTRY_POINT
;
1553 spapr
->cas_reboot
= false;
1556 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1558 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1559 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1562 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(dinfo
),
1566 qdev_init_nofail(dev
);
1568 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1571 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1573 object_initialize(&spapr
->rtc
, sizeof(spapr
->rtc
), TYPE_SPAPR_RTC
);
1574 object_property_add_child(OBJECT(spapr
), "rtc", OBJECT(&spapr
->rtc
),
1576 object_property_set_bool(OBJECT(&spapr
->rtc
), true, "realized",
1578 object_property_add_alias(OBJECT(spapr
), "rtc-time", OBJECT(&spapr
->rtc
),
1579 "date", &error_fatal
);
1582 /* Returns whether we want to use VGA or not */
1583 static bool spapr_vga_init(PCIBus
*pci_bus
, Error
**errp
)
1585 switch (vga_interface_type
) {
1592 return pci_vga_init(pci_bus
) != NULL
;
1595 "Unsupported VGA mode, only -vga std or -vga virtio is supported");
1600 static int spapr_pre_load(void *opaque
)
1604 rc
= spapr_caps_pre_load(opaque
);
1612 static int spapr_post_load(void *opaque
, int version_id
)
1614 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1617 err
= spapr_caps_post_migration(spapr
);
1622 if (!object_dynamic_cast(OBJECT(spapr
->ics
), TYPE_ICS_KVM
)) {
1625 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
1626 icp_resend(ICP(cpu
->intc
));
1630 /* In earlier versions, there was no separate qdev for the PAPR
1631 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1632 * So when migrating from those versions, poke the incoming offset
1633 * value into the RTC device */
1634 if (version_id
< 3) {
1635 err
= spapr_rtc_import_offset(&spapr
->rtc
, spapr
->rtc_offset
);
1638 if (kvm_enabled() && spapr
->patb_entry
) {
1639 PowerPCCPU
*cpu
= POWERPC_CPU(first_cpu
);
1640 bool radix
= !!(spapr
->patb_entry
& PATBE1_GR
);
1641 bool gtse
= !!(cpu
->env
.spr
[SPR_LPCR
] & LPCR_GTSE
);
1643 err
= kvmppc_configure_v3_mmu(cpu
, radix
, gtse
, spapr
->patb_entry
);
1645 error_report("Process table config unsupported by the host");
1653 static int spapr_pre_save(void *opaque
)
1657 rc
= spapr_caps_pre_save(opaque
);
1665 static bool version_before_3(void *opaque
, int version_id
)
1667 return version_id
< 3;
1670 static bool spapr_pending_events_needed(void *opaque
)
1672 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1673 return !QTAILQ_EMPTY(&spapr
->pending_events
);
1676 static const VMStateDescription vmstate_spapr_event_entry
= {
1677 .name
= "spapr_event_log_entry",
1679 .minimum_version_id
= 1,
1680 .fields
= (VMStateField
[]) {
1681 VMSTATE_UINT32(summary
, sPAPREventLogEntry
),
1682 VMSTATE_UINT32(extended_length
, sPAPREventLogEntry
),
1683 VMSTATE_VBUFFER_ALLOC_UINT32(extended_log
, sPAPREventLogEntry
, 0,
1684 NULL
, extended_length
),
1685 VMSTATE_END_OF_LIST()
1689 static const VMStateDescription vmstate_spapr_pending_events
= {
1690 .name
= "spapr_pending_events",
1692 .minimum_version_id
= 1,
1693 .needed
= spapr_pending_events_needed
,
1694 .fields
= (VMStateField
[]) {
1695 VMSTATE_QTAILQ_V(pending_events
, sPAPRMachineState
, 1,
1696 vmstate_spapr_event_entry
, sPAPREventLogEntry
, next
),
1697 VMSTATE_END_OF_LIST()
1701 static bool spapr_ov5_cas_needed(void *opaque
)
1703 sPAPRMachineState
*spapr
= opaque
;
1704 sPAPROptionVector
*ov5_mask
= spapr_ovec_new();
1705 sPAPROptionVector
*ov5_legacy
= spapr_ovec_new();
1706 sPAPROptionVector
*ov5_removed
= spapr_ovec_new();
1709 /* Prior to the introduction of sPAPROptionVector, we had two option
1710 * vectors we dealt with: OV5_FORM1_AFFINITY, and OV5_DRCONF_MEMORY.
1711 * Both of these options encode machine topology into the device-tree
1712 * in such a way that the now-booted OS should still be able to interact
1713 * appropriately with QEMU regardless of what options were actually
1714 * negotiatied on the source side.
1716 * As such, we can avoid migrating the CAS-negotiated options if these
1717 * are the only options available on the current machine/platform.
1718 * Since these are the only options available for pseries-2.7 and
1719 * earlier, this allows us to maintain old->new/new->old migration
1722 * For QEMU 2.8+, there are additional CAS-negotiatable options available
1723 * via default pseries-2.8 machines and explicit command-line parameters.
1724 * Some of these options, like OV5_HP_EVT, *do* require QEMU to be aware
1725 * of the actual CAS-negotiated values to continue working properly. For
1726 * example, availability of memory unplug depends on knowing whether
1727 * OV5_HP_EVT was negotiated via CAS.
1729 * Thus, for any cases where the set of available CAS-negotiatable
1730 * options extends beyond OV5_FORM1_AFFINITY and OV5_DRCONF_MEMORY, we
1731 * include the CAS-negotiated options in the migration stream.
1733 spapr_ovec_set(ov5_mask
, OV5_FORM1_AFFINITY
);
1734 spapr_ovec_set(ov5_mask
, OV5_DRCONF_MEMORY
);
1736 /* spapr_ovec_diff returns true if bits were removed. we avoid using
1737 * the mask itself since in the future it's possible "legacy" bits may be
1738 * removed via machine options, which could generate a false positive
1739 * that breaks migration.
1741 spapr_ovec_intersect(ov5_legacy
, spapr
->ov5
, ov5_mask
);
1742 cas_needed
= spapr_ovec_diff(ov5_removed
, spapr
->ov5
, ov5_legacy
);
1744 spapr_ovec_cleanup(ov5_mask
);
1745 spapr_ovec_cleanup(ov5_legacy
);
1746 spapr_ovec_cleanup(ov5_removed
);
1751 static const VMStateDescription vmstate_spapr_ov5_cas
= {
1752 .name
= "spapr_option_vector_ov5_cas",
1754 .minimum_version_id
= 1,
1755 .needed
= spapr_ov5_cas_needed
,
1756 .fields
= (VMStateField
[]) {
1757 VMSTATE_STRUCT_POINTER_V(ov5_cas
, sPAPRMachineState
, 1,
1758 vmstate_spapr_ovec
, sPAPROptionVector
),
1759 VMSTATE_END_OF_LIST()
1763 static bool spapr_patb_entry_needed(void *opaque
)
1765 sPAPRMachineState
*spapr
= opaque
;
1767 return !!spapr
->patb_entry
;
1770 static const VMStateDescription vmstate_spapr_patb_entry
= {
1771 .name
= "spapr_patb_entry",
1773 .minimum_version_id
= 1,
1774 .needed
= spapr_patb_entry_needed
,
1775 .fields
= (VMStateField
[]) {
1776 VMSTATE_UINT64(patb_entry
, sPAPRMachineState
),
1777 VMSTATE_END_OF_LIST()
1781 static const VMStateDescription vmstate_spapr
= {
1784 .minimum_version_id
= 1,
1785 .pre_load
= spapr_pre_load
,
1786 .post_load
= spapr_post_load
,
1787 .pre_save
= spapr_pre_save
,
1788 .fields
= (VMStateField
[]) {
1789 /* used to be @next_irq */
1790 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1793 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1795 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1796 VMSTATE_END_OF_LIST()
1798 .subsections
= (const VMStateDescription
*[]) {
1799 &vmstate_spapr_ov5_cas
,
1800 &vmstate_spapr_patb_entry
,
1801 &vmstate_spapr_pending_events
,
1802 &vmstate_spapr_cap_htm
,
1803 &vmstate_spapr_cap_vsx
,
1804 &vmstate_spapr_cap_dfp
,
1805 &vmstate_spapr_cap_cfpc
,
1806 &vmstate_spapr_cap_sbbc
,
1807 &vmstate_spapr_cap_ibs
,
1812 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1814 sPAPRMachineState
*spapr
= opaque
;
1816 /* "Iteration" header */
1817 if (!spapr
->htab_shift
) {
1818 qemu_put_be32(f
, -1);
1820 qemu_put_be32(f
, spapr
->htab_shift
);
1824 spapr
->htab_save_index
= 0;
1825 spapr
->htab_first_pass
= true;
1827 if (spapr
->htab_shift
) {
1828 assert(kvm_enabled());
1836 static void htab_save_chunk(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1837 int chunkstart
, int n_valid
, int n_invalid
)
1839 qemu_put_be32(f
, chunkstart
);
1840 qemu_put_be16(f
, n_valid
);
1841 qemu_put_be16(f
, n_invalid
);
1842 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1843 HASH_PTE_SIZE_64
* n_valid
);
1846 static void htab_save_end_marker(QEMUFile
*f
)
1848 qemu_put_be32(f
, 0);
1849 qemu_put_be16(f
, 0);
1850 qemu_put_be16(f
, 0);
1853 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1856 bool has_timeout
= max_ns
!= -1;
1857 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1858 int index
= spapr
->htab_save_index
;
1859 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1861 assert(spapr
->htab_first_pass
);
1866 /* Consume invalid HPTEs */
1867 while ((index
< htabslots
)
1868 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1869 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1873 /* Consume valid HPTEs */
1875 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1876 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1877 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1881 if (index
> chunkstart
) {
1882 int n_valid
= index
- chunkstart
;
1884 htab_save_chunk(f
, spapr
, chunkstart
, n_valid
, 0);
1887 (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1891 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1893 if (index
>= htabslots
) {
1894 assert(index
== htabslots
);
1896 spapr
->htab_first_pass
= false;
1898 spapr
->htab_save_index
= index
;
1901 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1904 bool final
= max_ns
< 0;
1905 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1906 int examined
= 0, sent
= 0;
1907 int index
= spapr
->htab_save_index
;
1908 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1910 assert(!spapr
->htab_first_pass
);
1913 int chunkstart
, invalidstart
;
1915 /* Consume non-dirty HPTEs */
1916 while ((index
< htabslots
)
1917 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1923 /* Consume valid dirty HPTEs */
1924 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1925 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1926 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1927 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1932 invalidstart
= index
;
1933 /* Consume invalid dirty HPTEs */
1934 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1935 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1936 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1937 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1942 if (index
> chunkstart
) {
1943 int n_valid
= invalidstart
- chunkstart
;
1944 int n_invalid
= index
- invalidstart
;
1946 htab_save_chunk(f
, spapr
, chunkstart
, n_valid
, n_invalid
);
1947 sent
+= index
- chunkstart
;
1949 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1954 if (examined
>= htabslots
) {
1958 if (index
>= htabslots
) {
1959 assert(index
== htabslots
);
1962 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1964 if (index
>= htabslots
) {
1965 assert(index
== htabslots
);
1969 spapr
->htab_save_index
= index
;
1971 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1974 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1975 #define MAX_KVM_BUF_SIZE 2048
1977 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1979 sPAPRMachineState
*spapr
= opaque
;
1983 /* Iteration header */
1984 if (!spapr
->htab_shift
) {
1985 qemu_put_be32(f
, -1);
1988 qemu_put_be32(f
, 0);
1992 assert(kvm_enabled());
1994 fd
= get_htab_fd(spapr
);
1999 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
2003 } else if (spapr
->htab_first_pass
) {
2004 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
2006 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
2009 htab_save_end_marker(f
);
2014 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
2016 sPAPRMachineState
*spapr
= opaque
;
2019 /* Iteration header */
2020 if (!spapr
->htab_shift
) {
2021 qemu_put_be32(f
, -1);
2024 qemu_put_be32(f
, 0);
2030 assert(kvm_enabled());
2032 fd
= get_htab_fd(spapr
);
2037 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, -1);
2042 if (spapr
->htab_first_pass
) {
2043 htab_save_first_pass(f
, spapr
, -1);
2045 htab_save_later_pass(f
, spapr
, -1);
2049 htab_save_end_marker(f
);
2054 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
2056 sPAPRMachineState
*spapr
= opaque
;
2057 uint32_t section_hdr
;
2059 Error
*local_err
= NULL
;
2061 if (version_id
< 1 || version_id
> 1) {
2062 error_report("htab_load() bad version");
2066 section_hdr
= qemu_get_be32(f
);
2068 if (section_hdr
== -1) {
2069 spapr_free_hpt(spapr
);
2074 /* First section gives the htab size */
2075 spapr_reallocate_hpt(spapr
, section_hdr
, &local_err
);
2077 error_report_err(local_err
);
2084 assert(kvm_enabled());
2086 fd
= kvmppc_get_htab_fd(true, 0, &local_err
);
2088 error_report_err(local_err
);
2095 uint16_t n_valid
, n_invalid
;
2097 index
= qemu_get_be32(f
);
2098 n_valid
= qemu_get_be16(f
);
2099 n_invalid
= qemu_get_be16(f
);
2101 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
2106 if ((index
+ n_valid
+ n_invalid
) >
2107 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
2108 /* Bad index in stream */
2110 "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
2111 index
, n_valid
, n_invalid
, spapr
->htab_shift
);
2117 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
2118 HASH_PTE_SIZE_64
* n_valid
);
2121 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
2122 HASH_PTE_SIZE_64
* n_invalid
);
2129 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
2144 static void htab_save_cleanup(void *opaque
)
2146 sPAPRMachineState
*spapr
= opaque
;
2148 close_htab_fd(spapr
);
2151 static SaveVMHandlers savevm_htab_handlers
= {
2152 .save_setup
= htab_save_setup
,
2153 .save_live_iterate
= htab_save_iterate
,
2154 .save_live_complete_precopy
= htab_save_complete
,
2155 .save_cleanup
= htab_save_cleanup
,
2156 .load_state
= htab_load
,
2159 static void spapr_boot_set(void *opaque
, const char *boot_device
,
2162 MachineState
*machine
= MACHINE(opaque
);
2163 machine
->boot_order
= g_strdup(boot_device
);
2166 static void spapr_create_lmb_dr_connectors(sPAPRMachineState
*spapr
)
2168 MachineState
*machine
= MACHINE(spapr
);
2169 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
2170 uint32_t nr_lmbs
= (machine
->maxram_size
- machine
->ram_size
)/lmb_size
;
2173 for (i
= 0; i
< nr_lmbs
; i
++) {
2176 addr
= i
* lmb_size
+ spapr
->hotplug_memory
.base
;
2177 spapr_dr_connector_new(OBJECT(spapr
), TYPE_SPAPR_DRC_LMB
,
2183 * If RAM size, maxmem size and individual node mem sizes aren't aligned
2184 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
2185 * since we can't support such unaligned sizes with DRCONF_MEMORY.
2187 static void spapr_validate_node_memory(MachineState
*machine
, Error
**errp
)
2191 if (machine
->ram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2192 error_setg(errp
, "Memory size 0x" RAM_ADDR_FMT
2193 " is not aligned to %llu MiB",
2195 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2199 if (machine
->maxram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2200 error_setg(errp
, "Maximum memory size 0x" RAM_ADDR_FMT
2201 " is not aligned to %llu MiB",
2203 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2207 for (i
= 0; i
< nb_numa_nodes
; i
++) {
2208 if (numa_info
[i
].node_mem
% SPAPR_MEMORY_BLOCK_SIZE
) {
2210 "Node %d memory size 0x%" PRIx64
2211 " is not aligned to %llu MiB",
2212 i
, numa_info
[i
].node_mem
,
2213 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2219 /* find cpu slot in machine->possible_cpus by core_id */
2220 static CPUArchId
*spapr_find_cpu_slot(MachineState
*ms
, uint32_t id
, int *idx
)
2222 int index
= id
/ smp_threads
;
2224 if (index
>= ms
->possible_cpus
->len
) {
2230 return &ms
->possible_cpus
->cpus
[index
];
2233 static void spapr_set_vsmt_mode(sPAPRMachineState
*spapr
, Error
**errp
)
2235 Error
*local_err
= NULL
;
2236 bool vsmt_user
= !!spapr
->vsmt
;
2237 int kvm_smt
= kvmppc_smt_threads();
2240 if (!kvm_enabled() && (smp_threads
> 1)) {
2241 error_setg(&local_err
, "TCG cannot support more than 1 thread/core "
2242 "on a pseries machine");
2245 if (!is_power_of_2(smp_threads
)) {
2246 error_setg(&local_err
, "Cannot support %d threads/core on a pseries "
2247 "machine because it must be a power of 2", smp_threads
);
2251 /* Detemine the VSMT mode to use: */
2253 if (spapr
->vsmt
< smp_threads
) {
2254 error_setg(&local_err
, "Cannot support VSMT mode %d"
2255 " because it must be >= threads/core (%d)",
2256 spapr
->vsmt
, smp_threads
);
2259 /* In this case, spapr->vsmt has been set by the command line */
2262 * Default VSMT value is tricky, because we need it to be as
2263 * consistent as possible (for migration), but this requires
2264 * changing it for at least some existing cases. We pick 8 as
2265 * the value that we'd get with KVM on POWER8, the
2266 * overwhelmingly common case in production systems.
2268 spapr
->vsmt
= MAX(8, smp_threads
);
2271 /* KVM: If necessary, set the SMT mode: */
2272 if (kvm_enabled() && (spapr
->vsmt
!= kvm_smt
)) {
2273 ret
= kvmppc_set_smt_threads(spapr
->vsmt
);
2275 /* Looks like KVM isn't able to change VSMT mode */
2276 error_setg(&local_err
,
2277 "Failed to set KVM's VSMT mode to %d (errno %d)",
2279 /* We can live with that if the default one is big enough
2280 * for the number of threads, and a submultiple of the one
2281 * we want. In this case we'll waste some vcpu ids, but
2282 * behaviour will be correct */
2283 if ((kvm_smt
>= smp_threads
) && ((spapr
->vsmt
% kvm_smt
) == 0)) {
2284 warn_report_err(local_err
);
2289 error_append_hint(&local_err
,
2290 "On PPC, a VM with %d threads/core"
2291 " on a host with %d threads/core"
2292 " requires the use of VSMT mode %d.\n",
2293 smp_threads
, kvm_smt
, spapr
->vsmt
);
2295 kvmppc_hint_smt_possible(&local_err
);
2300 /* else TCG: nothing to do currently */
2302 error_propagate(errp
, local_err
);
2305 static void spapr_init_cpus(sPAPRMachineState
*spapr
)
2307 MachineState
*machine
= MACHINE(spapr
);
2308 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
2309 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
2310 const char *type
= spapr_get_cpu_core_type(machine
->cpu_type
);
2311 const CPUArchIdList
*possible_cpus
;
2312 int boot_cores_nr
= smp_cpus
/ smp_threads
;
2315 possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
2316 if (mc
->has_hotpluggable_cpus
) {
2317 if (smp_cpus
% smp_threads
) {
2318 error_report("smp_cpus (%u) must be multiple of threads (%u)",
2319 smp_cpus
, smp_threads
);
2322 if (max_cpus
% smp_threads
) {
2323 error_report("max_cpus (%u) must be multiple of threads (%u)",
2324 max_cpus
, smp_threads
);
2328 if (max_cpus
!= smp_cpus
) {
2329 error_report("This machine version does not support CPU hotplug");
2332 boot_cores_nr
= possible_cpus
->len
;
2335 /* VSMT must be set in order to be able to compute VCPU ids, ie to
2336 * call xics_max_server_number() or spapr_vcpu_id().
2338 spapr_set_vsmt_mode(spapr
, &error_fatal
);
2340 if (smc
->pre_2_10_has_unused_icps
) {
2343 for (i
= 0; i
< xics_max_server_number(spapr
); i
++) {
2344 /* Dummy entries get deregistered when real ICPState objects
2345 * are registered during CPU core hotplug.
2347 pre_2_10_vmstate_register_dummy_icp(i
);
2351 for (i
= 0; i
< possible_cpus
->len
; i
++) {
2352 int core_id
= i
* smp_threads
;
2354 if (mc
->has_hotpluggable_cpus
) {
2355 spapr_dr_connector_new(OBJECT(spapr
), TYPE_SPAPR_DRC_CPU
,
2356 spapr_vcpu_id(spapr
, core_id
));
2359 if (i
< boot_cores_nr
) {
2360 Object
*core
= object_new(type
);
2361 int nr_threads
= smp_threads
;
2363 /* Handle the partially filled core for older machine types */
2364 if ((i
+ 1) * smp_threads
>= smp_cpus
) {
2365 nr_threads
= smp_cpus
- i
* smp_threads
;
2368 object_property_set_int(core
, nr_threads
, "nr-threads",
2370 object_property_set_int(core
, core_id
, CPU_CORE_PROP_CORE_ID
,
2372 object_property_set_bool(core
, true, "realized", &error_fatal
);
2377 /* pSeries LPAR / sPAPR hardware init */
2378 static void spapr_machine_init(MachineState
*machine
)
2380 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
2381 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
2382 const char *kernel_filename
= machine
->kernel_filename
;
2383 const char *initrd_filename
= machine
->initrd_filename
;
2386 MemoryRegion
*sysmem
= get_system_memory();
2387 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
2388 MemoryRegion
*rma_region
;
2390 hwaddr rma_alloc_size
;
2391 hwaddr node0_size
= spapr_node0_size(machine
);
2392 long load_limit
, fw_size
;
2394 Error
*resize_hpt_err
= NULL
;
2396 msi_nonbroken
= true;
2398 QLIST_INIT(&spapr
->phbs
);
2399 QTAILQ_INIT(&spapr
->pending_dimm_unplugs
);
2401 /* Check HPT resizing availability */
2402 kvmppc_check_papr_resize_hpt(&resize_hpt_err
);
2403 if (spapr
->resize_hpt
== SPAPR_RESIZE_HPT_DEFAULT
) {
2405 * If the user explicitly requested a mode we should either
2406 * supply it, or fail completely (which we do below). But if
2407 * it's not set explicitly, we reset our mode to something
2410 if (resize_hpt_err
) {
2411 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DISABLED
;
2412 error_free(resize_hpt_err
);
2413 resize_hpt_err
= NULL
;
2415 spapr
->resize_hpt
= smc
->resize_hpt_default
;
2419 assert(spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DEFAULT
);
2421 if ((spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) && resize_hpt_err
) {
2423 * User requested HPT resize, but this host can't supply it. Bail out
2425 error_report_err(resize_hpt_err
);
2429 /* Allocate RMA if necessary */
2430 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
2432 if (rma_alloc_size
== -1) {
2433 error_report("Unable to create RMA");
2437 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
2438 spapr
->rma_size
= rma_alloc_size
;
2440 spapr
->rma_size
= node0_size
;
2442 /* With KVM, we don't actually know whether KVM supports an
2443 * unbounded RMA (PR KVM) or is limited by the hash table size
2444 * (HV KVM using VRMA), so we always assume the latter
2446 * In that case, we also limit the initial allocations for RTAS
2447 * etc... to 256M since we have no way to know what the VRMA size
2448 * is going to be as it depends on the size of the hash table
2449 * isn't determined yet.
2451 if (kvm_enabled()) {
2452 spapr
->vrma_adjust
= 1;
2453 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
2456 /* Actually we don't support unbounded RMA anymore since we
2457 * added proper emulation of HV mode. The max we can get is
2458 * 16G which also happens to be what we configure for PAPR
2459 * mode so make sure we don't do anything bigger than that
2461 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x400000000ull
);
2464 if (spapr
->rma_size
> node0_size
) {
2465 error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")",
2470 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
2471 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
2473 /* Set up Interrupt Controller before we create the VCPUs */
2474 xics_system_init(machine
, XICS_IRQS_SPAPR
, &error_fatal
);
2476 /* Set up containers for ibm,client-architecture-support negotiated options
2478 spapr
->ov5
= spapr_ovec_new();
2479 spapr
->ov5_cas
= spapr_ovec_new();
2481 if (smc
->dr_lmb_enabled
) {
2482 spapr_ovec_set(spapr
->ov5
, OV5_DRCONF_MEMORY
);
2483 spapr_validate_node_memory(machine
, &error_fatal
);
2486 spapr_ovec_set(spapr
->ov5
, OV5_FORM1_AFFINITY
);
2487 if (!kvm_enabled() || kvmppc_has_cap_mmu_radix()) {
2488 /* KVM and TCG always allow GTSE with radix... */
2489 spapr_ovec_set(spapr
->ov5
, OV5_MMU_RADIX_GTSE
);
2491 /* ... but not with hash (currently). */
2493 /* advertise support for dedicated HP event source to guests */
2494 if (spapr
->use_hotplug_event_source
) {
2495 spapr_ovec_set(spapr
->ov5
, OV5_HP_EVT
);
2498 /* advertise support for HPT resizing */
2499 if (spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) {
2500 spapr_ovec_set(spapr
->ov5
, OV5_HPT_RESIZE
);
2504 spapr_init_cpus(spapr
);
2506 if (kvm_enabled()) {
2507 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
2508 kvmppc_enable_logical_ci_hcalls();
2509 kvmppc_enable_set_mode_hcall();
2511 /* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */
2512 kvmppc_enable_clear_ref_mod_hcalls();
2516 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
2518 memory_region_add_subregion(sysmem
, 0, ram
);
2520 if (rma_alloc_size
&& rma
) {
2521 rma_region
= g_new(MemoryRegion
, 1);
2522 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
2523 rma_alloc_size
, rma
);
2524 vmstate_register_ram_global(rma_region
);
2525 memory_region_add_subregion(sysmem
, 0, rma_region
);
2528 /* initialize hotplug memory address space */
2529 if (machine
->ram_size
< machine
->maxram_size
) {
2530 ram_addr_t hotplug_mem_size
= machine
->maxram_size
- machine
->ram_size
;
2532 * Limit the number of hotpluggable memory slots to half the number
2533 * slots that KVM supports, leaving the other half for PCI and other
2534 * devices. However ensure that number of slots doesn't drop below 32.
2536 int max_memslots
= kvm_enabled() ? kvm_get_max_memslots() / 2 :
2537 SPAPR_MAX_RAM_SLOTS
;
2539 if (max_memslots
< SPAPR_MAX_RAM_SLOTS
) {
2540 max_memslots
= SPAPR_MAX_RAM_SLOTS
;
2542 if (machine
->ram_slots
> max_memslots
) {
2543 error_report("Specified number of memory slots %"
2544 PRIu64
" exceeds max supported %d",
2545 machine
->ram_slots
, max_memslots
);
2549 spapr
->hotplug_memory
.base
= ROUND_UP(machine
->ram_size
,
2550 SPAPR_HOTPLUG_MEM_ALIGN
);
2551 memory_region_init(&spapr
->hotplug_memory
.mr
, OBJECT(spapr
),
2552 "hotplug-memory", hotplug_mem_size
);
2553 memory_region_add_subregion(sysmem
, spapr
->hotplug_memory
.base
,
2554 &spapr
->hotplug_memory
.mr
);
2557 if (smc
->dr_lmb_enabled
) {
2558 spapr_create_lmb_dr_connectors(spapr
);
2561 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
2563 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
2566 spapr
->rtas_size
= get_image_size(filename
);
2567 if (spapr
->rtas_size
< 0) {
2568 error_report("Could not get size of LPAR rtas '%s'", filename
);
2571 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
2572 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
2573 error_report("Could not load LPAR rtas '%s'", filename
);
2576 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
2577 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
2578 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
2583 /* Set up RTAS event infrastructure */
2584 spapr_events_init(spapr
);
2586 /* Set up the RTC RTAS interfaces */
2587 spapr_rtc_create(spapr
);
2589 /* Set up VIO bus */
2590 spapr
->vio_bus
= spapr_vio_bus_init();
2592 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
2593 if (serial_hds
[i
]) {
2594 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
2598 /* We always have at least the nvram device on VIO */
2599 spapr_create_nvram(spapr
);
2602 spapr_pci_rtas_init();
2604 phb
= spapr_create_phb(spapr
, 0);
2606 for (i
= 0; i
< nb_nics
; i
++) {
2607 NICInfo
*nd
= &nd_table
[i
];
2610 nd
->model
= g_strdup("spapr-vlan");
2613 if (g_str_equal(nd
->model
, "spapr-vlan") ||
2614 g_str_equal(nd
->model
, "ibmveth")) {
2615 spapr_vlan_create(spapr
->vio_bus
, nd
);
2617 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
2621 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
2622 spapr_vscsi_create(spapr
->vio_bus
);
2626 if (spapr_vga_init(phb
->bus
, &error_fatal
)) {
2627 spapr
->has_graphics
= true;
2628 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
2632 if (smc
->use_ohci_by_default
) {
2633 pci_create_simple(phb
->bus
, -1, "pci-ohci");
2635 pci_create_simple(phb
->bus
, -1, "nec-usb-xhci");
2638 if (spapr
->has_graphics
) {
2639 USBBus
*usb_bus
= usb_bus_find(-1);
2641 usb_create_simple(usb_bus
, "usb-kbd");
2642 usb_create_simple(usb_bus
, "usb-mouse");
2646 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
2648 "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
2653 if (kernel_filename
) {
2654 uint64_t lowaddr
= 0;
2656 spapr
->kernel_size
= load_elf(kernel_filename
, translate_kernel_address
,
2657 NULL
, NULL
, &lowaddr
, NULL
, 1,
2658 PPC_ELF_MACHINE
, 0, 0);
2659 if (spapr
->kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
2660 spapr
->kernel_size
= load_elf(kernel_filename
,
2661 translate_kernel_address
, NULL
, NULL
,
2662 &lowaddr
, NULL
, 0, PPC_ELF_MACHINE
,
2664 spapr
->kernel_le
= spapr
->kernel_size
> 0;
2666 if (spapr
->kernel_size
< 0) {
2667 error_report("error loading %s: %s", kernel_filename
,
2668 load_elf_strerror(spapr
->kernel_size
));
2673 if (initrd_filename
) {
2674 /* Try to locate the initrd in the gap between the kernel
2675 * and the firmware. Add a bit of space just in case
2677 spapr
->initrd_base
= (KERNEL_LOAD_ADDR
+ spapr
->kernel_size
2678 + 0x1ffff) & ~0xffff;
2679 spapr
->initrd_size
= load_image_targphys(initrd_filename
,
2682 - spapr
->initrd_base
);
2683 if (spapr
->initrd_size
< 0) {
2684 error_report("could not load initial ram disk '%s'",
2691 if (bios_name
== NULL
) {
2692 bios_name
= FW_FILE_NAME
;
2694 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
2696 error_report("Could not find LPAR firmware '%s'", bios_name
);
2699 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
2701 error_report("Could not load LPAR firmware '%s'", filename
);
2706 /* FIXME: Should register things through the MachineState's qdev
2707 * interface, this is a legacy from the sPAPREnvironment structure
2708 * which predated MachineState but had a similar function */
2709 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
2710 register_savevm_live(NULL
, "spapr/htab", -1, 1,
2711 &savevm_htab_handlers
, spapr
);
2713 qemu_register_boot_set(spapr_boot_set
, spapr
);
2715 if (kvm_enabled()) {
2716 /* to stop and start vmclock */
2717 qemu_add_vm_change_state_handler(cpu_ppc_clock_vm_state_change
,
2720 kvmppc_spapr_enable_inkernel_multitce();
2724 static int spapr_kvm_type(const char *vm_type
)
2730 if (!strcmp(vm_type
, "HV")) {
2734 if (!strcmp(vm_type
, "PR")) {
2738 error_report("Unknown kvm-type specified '%s'", vm_type
);
2743 * Implementation of an interface to adjust firmware path
2744 * for the bootindex property handling.
2746 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
2749 #define CAST(type, obj, name) \
2750 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
2751 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
2752 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
2753 VHostSCSICommon
*vsc
= CAST(VHostSCSICommon
, dev
, TYPE_VHOST_SCSI_COMMON
);
2756 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
2757 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
2758 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
2762 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
2763 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
2764 * in the top 16 bits of the 64-bit LUN
2766 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
2767 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2768 (uint64_t)id
<< 48);
2769 } else if (virtio
) {
2771 * We use SRP luns of the form 01000000 | (target << 8) | lun
2772 * in the top 32 bits of the 64-bit LUN
2773 * Note: the quote above is from SLOF and it is wrong,
2774 * the actual binding is:
2775 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
2777 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
2778 if (d
->lun
>= 256) {
2779 /* Use the LUN "flat space addressing method" */
2782 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2783 (uint64_t)id
<< 32);
2786 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
2787 * in the top 32 bits of the 64-bit LUN
2789 unsigned usb_port
= atoi(usb
->port
->path
);
2790 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
2791 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2792 (uint64_t)id
<< 32);
2797 * SLOF probes the USB devices, and if it recognizes that the device is a
2798 * storage device, it changes its name to "storage" instead of "usb-host",
2799 * and additionally adds a child node for the SCSI LUN, so the correct
2800 * boot path in SLOF is something like .../storage@1/disk@xxx" instead.
2802 if (strcmp("usb-host", qdev_fw_name(dev
)) == 0) {
2803 USBDevice
*usbdev
= CAST(USBDevice
, dev
, TYPE_USB_DEVICE
);
2804 if (usb_host_dev_is_scsi_storage(usbdev
)) {
2805 return g_strdup_printf("storage@%s/disk", usbdev
->port
->path
);
2810 /* Replace "pci" with "pci@800000020000000" */
2811 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
2815 /* Same logic as virtio above */
2816 unsigned id
= 0x1000000 | (vsc
->target
<< 16) | vsc
->lun
;
2817 return g_strdup_printf("disk@%"PRIX64
, (uint64_t)id
<< 32);
2820 if (g_str_equal("pci-bridge", qdev_fw_name(dev
))) {
2821 /* SLOF uses "pci" instead of "pci-bridge" for PCI bridges */
2822 PCIDevice
*pcidev
= CAST(PCIDevice
, dev
, TYPE_PCI_DEVICE
);
2823 return g_strdup_printf("pci@%x", PCI_SLOT(pcidev
->devfn
));
2829 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
2831 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2833 return g_strdup(spapr
->kvm_type
);
2836 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
2838 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2840 g_free(spapr
->kvm_type
);
2841 spapr
->kvm_type
= g_strdup(value
);
2844 static bool spapr_get_modern_hotplug_events(Object
*obj
, Error
**errp
)
2846 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2848 return spapr
->use_hotplug_event_source
;
2851 static void spapr_set_modern_hotplug_events(Object
*obj
, bool value
,
2854 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2856 spapr
->use_hotplug_event_source
= value
;
2859 static bool spapr_get_msix_emulation(Object
*obj
, Error
**errp
)
2864 static char *spapr_get_resize_hpt(Object
*obj
, Error
**errp
)
2866 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2868 switch (spapr
->resize_hpt
) {
2869 case SPAPR_RESIZE_HPT_DEFAULT
:
2870 return g_strdup("default");
2871 case SPAPR_RESIZE_HPT_DISABLED
:
2872 return g_strdup("disabled");
2873 case SPAPR_RESIZE_HPT_ENABLED
:
2874 return g_strdup("enabled");
2875 case SPAPR_RESIZE_HPT_REQUIRED
:
2876 return g_strdup("required");
2878 g_assert_not_reached();
2881 static void spapr_set_resize_hpt(Object
*obj
, const char *value
, Error
**errp
)
2883 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2885 if (strcmp(value
, "default") == 0) {
2886 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DEFAULT
;
2887 } else if (strcmp(value
, "disabled") == 0) {
2888 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DISABLED
;
2889 } else if (strcmp(value
, "enabled") == 0) {
2890 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_ENABLED
;
2891 } else if (strcmp(value
, "required") == 0) {
2892 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_REQUIRED
;
2894 error_setg(errp
, "Bad value for \"resize-hpt\" property");
2898 static void spapr_get_vsmt(Object
*obj
, Visitor
*v
, const char *name
,
2899 void *opaque
, Error
**errp
)
2901 visit_type_uint32(v
, name
, (uint32_t *)opaque
, errp
);
2904 static void spapr_set_vsmt(Object
*obj
, Visitor
*v
, const char *name
,
2905 void *opaque
, Error
**errp
)
2907 visit_type_uint32(v
, name
, (uint32_t *)opaque
, errp
);
2910 static void spapr_instance_init(Object
*obj
)
2912 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2914 spapr
->htab_fd
= -1;
2915 spapr
->use_hotplug_event_source
= true;
2916 object_property_add_str(obj
, "kvm-type",
2917 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
2918 object_property_set_description(obj
, "kvm-type",
2919 "Specifies the KVM virtualization mode (HV, PR)",
2921 object_property_add_bool(obj
, "modern-hotplug-events",
2922 spapr_get_modern_hotplug_events
,
2923 spapr_set_modern_hotplug_events
,
2925 object_property_set_description(obj
, "modern-hotplug-events",
2926 "Use dedicated hotplug event mechanism in"
2927 " place of standard EPOW events when possible"
2928 " (required for memory hot-unplug support)",
2931 ppc_compat_add_property(obj
, "max-cpu-compat", &spapr
->max_compat_pvr
,
2932 "Maximum permitted CPU compatibility mode",
2935 object_property_add_str(obj
, "resize-hpt",
2936 spapr_get_resize_hpt
, spapr_set_resize_hpt
, NULL
);
2937 object_property_set_description(obj
, "resize-hpt",
2938 "Resizing of the Hash Page Table (enabled, disabled, required)",
2940 object_property_add(obj
, "vsmt", "uint32", spapr_get_vsmt
,
2941 spapr_set_vsmt
, NULL
, &spapr
->vsmt
, &error_abort
);
2942 object_property_set_description(obj
, "vsmt",
2943 "Virtual SMT: KVM behaves as if this were"
2944 " the host's SMT mode", &error_abort
);
2945 object_property_add_bool(obj
, "vfio-no-msix-emulation",
2946 spapr_get_msix_emulation
, NULL
, NULL
);
2949 static void spapr_machine_finalizefn(Object
*obj
)
2951 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2953 g_free(spapr
->kvm_type
);
2956 void spapr_do_system_reset_on_cpu(CPUState
*cs
, run_on_cpu_data arg
)
2958 cpu_synchronize_state(cs
);
2959 ppc_cpu_do_system_reset(cs
);
2962 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
2967 async_run_on_cpu(cs
, spapr_do_system_reset_on_cpu
, RUN_ON_CPU_NULL
);
2971 static void spapr_add_lmbs(DeviceState
*dev
, uint64_t addr_start
, uint64_t size
,
2972 uint32_t node
, bool dedicated_hp_event_source
,
2975 sPAPRDRConnector
*drc
;
2976 uint32_t nr_lmbs
= size
/SPAPR_MEMORY_BLOCK_SIZE
;
2977 int i
, fdt_offset
, fdt_size
;
2979 uint64_t addr
= addr_start
;
2980 bool hotplugged
= spapr_drc_hotplugged(dev
);
2981 Error
*local_err
= NULL
;
2983 for (i
= 0; i
< nr_lmbs
; i
++) {
2984 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
2985 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
2988 fdt
= create_device_tree(&fdt_size
);
2989 fdt_offset
= spapr_populate_memory_node(fdt
, node
, addr
,
2990 SPAPR_MEMORY_BLOCK_SIZE
);
2992 spapr_drc_attach(drc
, dev
, fdt
, fdt_offset
, &local_err
);
2994 while (addr
> addr_start
) {
2995 addr
-= SPAPR_MEMORY_BLOCK_SIZE
;
2996 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
2997 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
2998 spapr_drc_detach(drc
);
3001 error_propagate(errp
, local_err
);
3005 spapr_drc_reset(drc
);
3007 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3009 /* send hotplug notification to the
3010 * guest only in case of hotplugged memory
3013 if (dedicated_hp_event_source
) {
3014 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3015 addr_start
/ SPAPR_MEMORY_BLOCK_SIZE
);
3016 spapr_hotplug_req_add_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB
,
3018 spapr_drc_index(drc
));
3020 spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB
,
3026 static void spapr_memory_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3027 uint32_t node
, Error
**errp
)
3029 Error
*local_err
= NULL
;
3030 sPAPRMachineState
*ms
= SPAPR_MACHINE(hotplug_dev
);
3031 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3032 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3034 uint64_t align
, size
, addr
;
3036 mr
= ddc
->get_memory_region(dimm
, &local_err
);
3040 align
= memory_region_get_alignment(mr
);
3041 size
= memory_region_size(mr
);
3043 pc_dimm_memory_plug(dev
, &ms
->hotplug_memory
, mr
, align
, &local_err
);
3048 addr
= object_property_get_uint(OBJECT(dimm
),
3049 PC_DIMM_ADDR_PROP
, &local_err
);
3054 spapr_add_lmbs(dev
, addr
, size
, node
,
3055 spapr_ovec_test(ms
->ov5_cas
, OV5_HP_EVT
),
3064 pc_dimm_memory_unplug(dev
, &ms
->hotplug_memory
, mr
);
3066 error_propagate(errp
, local_err
);
3069 static void spapr_memory_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3072 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3073 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3078 mr
= ddc
->get_memory_region(dimm
, errp
);
3082 size
= memory_region_size(mr
);
3084 if (size
% SPAPR_MEMORY_BLOCK_SIZE
) {
3085 error_setg(errp
, "Hotplugged memory size must be a multiple of "
3086 "%lld MB", SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
3090 mem_dev
= object_property_get_str(OBJECT(dimm
), PC_DIMM_MEMDEV_PROP
, NULL
);
3091 if (mem_dev
&& !kvmppc_is_mem_backend_page_size_ok(mem_dev
)) {
3092 error_setg(errp
, "Memory backend has bad page size. "
3093 "Use 'memory-backend-file' with correct mem-path.");
3101 struct sPAPRDIMMState
{
3104 QTAILQ_ENTRY(sPAPRDIMMState
) next
;
3107 static sPAPRDIMMState
*spapr_pending_dimm_unplugs_find(sPAPRMachineState
*s
,
3110 sPAPRDIMMState
*dimm_state
= NULL
;
3112 QTAILQ_FOREACH(dimm_state
, &s
->pending_dimm_unplugs
, next
) {
3113 if (dimm_state
->dimm
== dimm
) {
3120 static sPAPRDIMMState
*spapr_pending_dimm_unplugs_add(sPAPRMachineState
*spapr
,
3124 sPAPRDIMMState
*ds
= NULL
;
3127 * If this request is for a DIMM whose removal had failed earlier
3128 * (due to guest's refusal to remove the LMBs), we would have this
3129 * dimm already in the pending_dimm_unplugs list. In that
3130 * case don't add again.
3132 ds
= spapr_pending_dimm_unplugs_find(spapr
, dimm
);
3134 ds
= g_malloc0(sizeof(sPAPRDIMMState
));
3135 ds
->nr_lmbs
= nr_lmbs
;
3137 QTAILQ_INSERT_HEAD(&spapr
->pending_dimm_unplugs
, ds
, next
);
3142 static void spapr_pending_dimm_unplugs_remove(sPAPRMachineState
*spapr
,
3143 sPAPRDIMMState
*dimm_state
)
3145 QTAILQ_REMOVE(&spapr
->pending_dimm_unplugs
, dimm_state
, next
);
3149 static sPAPRDIMMState
*spapr_recover_pending_dimm_state(sPAPRMachineState
*ms
,
3152 sPAPRDRConnector
*drc
;
3153 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3154 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
, &error_abort
);
3155 uint64_t size
= memory_region_size(mr
);
3156 uint32_t nr_lmbs
= size
/ SPAPR_MEMORY_BLOCK_SIZE
;
3157 uint32_t avail_lmbs
= 0;
3158 uint64_t addr_start
, addr
;
3161 addr_start
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
,
3165 for (i
= 0; i
< nr_lmbs
; i
++) {
3166 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3167 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3172 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3175 return spapr_pending_dimm_unplugs_add(ms
, avail_lmbs
, dimm
);
3178 /* Callback to be called during DRC release. */
3179 void spapr_lmb_release(DeviceState
*dev
)
3181 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_hotplug_handler(dev
));
3182 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3183 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3184 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
, &error_abort
);
3185 sPAPRDIMMState
*ds
= spapr_pending_dimm_unplugs_find(spapr
, PC_DIMM(dev
));
3187 /* This information will get lost if a migration occurs
3188 * during the unplug process. In this case recover it. */
3190 ds
= spapr_recover_pending_dimm_state(spapr
, PC_DIMM(dev
));
3192 /* The DRC being examined by the caller at least must be counted */
3193 g_assert(ds
->nr_lmbs
);
3196 if (--ds
->nr_lmbs
) {
3201 * Now that all the LMBs have been removed by the guest, call the
3202 * pc-dimm unplug handler to cleanup up the pc-dimm device.
3204 pc_dimm_memory_unplug(dev
, &spapr
->hotplug_memory
, mr
);
3205 object_unparent(OBJECT(dev
));
3206 spapr_pending_dimm_unplugs_remove(spapr
, ds
);
3209 static void spapr_memory_unplug_request(HotplugHandler
*hotplug_dev
,
3210 DeviceState
*dev
, Error
**errp
)
3212 sPAPRMachineState
*spapr
= SPAPR_MACHINE(hotplug_dev
);
3213 Error
*local_err
= NULL
;
3214 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3215 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3218 uint64_t size
, addr_start
, addr
;
3220 sPAPRDRConnector
*drc
;
3222 mr
= ddc
->get_memory_region(dimm
, &local_err
);
3226 size
= memory_region_size(mr
);
3227 nr_lmbs
= size
/ SPAPR_MEMORY_BLOCK_SIZE
;
3229 addr_start
= object_property_get_uint(OBJECT(dimm
), PC_DIMM_ADDR_PROP
,
3236 * An existing pending dimm state for this DIMM means that there is an
3237 * unplug operation in progress, waiting for the spapr_lmb_release
3238 * callback to complete the job (BQL can't cover that far). In this case,
3239 * bail out to avoid detaching DRCs that were already released.
3241 if (spapr_pending_dimm_unplugs_find(spapr
, dimm
)) {
3242 error_setg(&local_err
,
3243 "Memory unplug already in progress for device %s",
3248 spapr_pending_dimm_unplugs_add(spapr
, nr_lmbs
, dimm
);
3251 for (i
= 0; i
< nr_lmbs
; i
++) {
3252 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3253 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3256 spapr_drc_detach(drc
);
3257 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3260 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3261 addr_start
/ SPAPR_MEMORY_BLOCK_SIZE
);
3262 spapr_hotplug_req_remove_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB
,
3263 nr_lmbs
, spapr_drc_index(drc
));
3265 error_propagate(errp
, local_err
);
3268 static void *spapr_populate_hotplug_cpu_dt(CPUState
*cs
, int *fdt_offset
,
3269 sPAPRMachineState
*spapr
)
3271 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3272 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
3273 int id
= spapr_get_vcpu_id(cpu
);
3275 int offset
, fdt_size
;
3278 fdt
= create_device_tree(&fdt_size
);
3279 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, id
);
3280 offset
= fdt_add_subnode(fdt
, 0, nodename
);
3282 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
3285 *fdt_offset
= offset
;
3289 /* Callback to be called during DRC release. */
3290 void spapr_core_release(DeviceState
*dev
)
3292 MachineState
*ms
= MACHINE(qdev_get_hotplug_handler(dev
));
3293 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(ms
);
3294 CPUCore
*cc
= CPU_CORE(dev
);
3295 CPUArchId
*core_slot
= spapr_find_cpu_slot(ms
, cc
->core_id
, NULL
);
3297 if (smc
->pre_2_10_has_unused_icps
) {
3298 sPAPRCPUCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
3301 for (i
= 0; i
< cc
->nr_threads
; i
++) {
3302 CPUState
*cs
= CPU(sc
->threads
[i
]);
3304 pre_2_10_vmstate_register_dummy_icp(cs
->cpu_index
);
3309 core_slot
->cpu
= NULL
;
3310 object_unparent(OBJECT(dev
));
3314 void spapr_core_unplug_request(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3317 sPAPRMachineState
*spapr
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3319 sPAPRDRConnector
*drc
;
3320 CPUCore
*cc
= CPU_CORE(dev
);
3322 if (!spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
)) {
3323 error_setg(errp
, "Unable to find CPU core with core-id: %d",
3328 error_setg(errp
, "Boot CPU core may not be unplugged");
3332 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
,
3333 spapr_vcpu_id(spapr
, cc
->core_id
));
3336 spapr_drc_detach(drc
);
3338 spapr_hotplug_req_remove_by_index(drc
);
3341 static void spapr_core_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3344 sPAPRMachineState
*spapr
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3345 MachineClass
*mc
= MACHINE_GET_CLASS(spapr
);
3346 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3347 sPAPRCPUCore
*core
= SPAPR_CPU_CORE(OBJECT(dev
));
3348 CPUCore
*cc
= CPU_CORE(dev
);
3349 CPUState
*cs
= CPU(core
->threads
[0]);
3350 sPAPRDRConnector
*drc
;
3351 Error
*local_err
= NULL
;
3352 CPUArchId
*core_slot
;
3354 bool hotplugged
= spapr_drc_hotplugged(dev
);
3356 core_slot
= spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
);
3358 error_setg(errp
, "Unable to find CPU core with core-id: %d",
3362 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
,
3363 spapr_vcpu_id(spapr
, cc
->core_id
));
3365 g_assert(drc
|| !mc
->has_hotpluggable_cpus
);
3371 fdt
= spapr_populate_hotplug_cpu_dt(cs
, &fdt_offset
, spapr
);
3373 spapr_drc_attach(drc
, dev
, fdt
, fdt_offset
, &local_err
);
3376 error_propagate(errp
, local_err
);
3382 * Send hotplug notification interrupt to the guest only
3383 * in case of hotplugged CPUs.
3385 spapr_hotplug_req_add_by_index(drc
);
3387 spapr_drc_reset(drc
);
3391 core_slot
->cpu
= OBJECT(dev
);
3393 if (smc
->pre_2_10_has_unused_icps
) {
3396 for (i
= 0; i
< cc
->nr_threads
; i
++) {
3397 cs
= CPU(core
->threads
[i
]);
3398 pre_2_10_vmstate_unregister_dummy_icp(cs
->cpu_index
);
3403 static void spapr_core_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3406 MachineState
*machine
= MACHINE(OBJECT(hotplug_dev
));
3407 MachineClass
*mc
= MACHINE_GET_CLASS(hotplug_dev
);
3408 Error
*local_err
= NULL
;
3409 CPUCore
*cc
= CPU_CORE(dev
);
3410 const char *base_core_type
= spapr_get_cpu_core_type(machine
->cpu_type
);
3411 const char *type
= object_get_typename(OBJECT(dev
));
3412 CPUArchId
*core_slot
;
3415 if (dev
->hotplugged
&& !mc
->has_hotpluggable_cpus
) {
3416 error_setg(&local_err
, "CPU hotplug not supported for this machine");
3420 if (strcmp(base_core_type
, type
)) {
3421 error_setg(&local_err
, "CPU core type should be %s", base_core_type
);
3425 if (cc
->core_id
% smp_threads
) {
3426 error_setg(&local_err
, "invalid core id %d", cc
->core_id
);
3431 * In general we should have homogeneous threads-per-core, but old
3432 * (pre hotplug support) machine types allow the last core to have
3433 * reduced threads as a compatibility hack for when we allowed
3434 * total vcpus not a multiple of threads-per-core.
3436 if (mc
->has_hotpluggable_cpus
&& (cc
->nr_threads
!= smp_threads
)) {
3437 error_setg(&local_err
, "invalid nr-threads %d, must be %d",
3438 cc
->nr_threads
, smp_threads
);
3442 core_slot
= spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
);
3444 error_setg(&local_err
, "core id %d out of range", cc
->core_id
);
3448 if (core_slot
->cpu
) {
3449 error_setg(&local_err
, "core %d already populated", cc
->core_id
);
3453 numa_cpu_pre_plug(core_slot
, dev
, &local_err
);
3456 error_propagate(errp
, local_err
);
3459 static void spapr_machine_device_plug(HotplugHandler
*hotplug_dev
,
3460 DeviceState
*dev
, Error
**errp
)
3462 MachineState
*ms
= MACHINE(hotplug_dev
);
3463 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(ms
);
3465 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3468 if (!smc
->dr_lmb_enabled
) {
3469 error_setg(errp
, "Memory hotplug not supported for this machine");
3472 node
= object_property_get_uint(OBJECT(dev
), PC_DIMM_NODE_PROP
, errp
);
3476 if (node
< 0 || node
>= MAX_NODES
) {
3477 error_setg(errp
, "Invaild node %d", node
);
3482 * Currently PowerPC kernel doesn't allow hot-adding memory to
3483 * memory-less node, but instead will silently add the memory
3484 * to the first node that has some memory. This causes two
3485 * unexpected behaviours for the user.
3487 * - Memory gets hotplugged to a different node than what the user
3489 * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
3490 * to memory-less node, a reboot will set things accordingly
3491 * and the previously hotplugged memory now ends in the right node.
3492 * This appears as if some memory moved from one node to another.
3494 * So until kernel starts supporting memory hotplug to memory-less
3495 * nodes, just prevent such attempts upfront in QEMU.
3497 if (nb_numa_nodes
&& !numa_info
[node
].node_mem
) {
3498 error_setg(errp
, "Can't hotplug memory to memory-less node %d",
3503 spapr_memory_plug(hotplug_dev
, dev
, node
, errp
);
3504 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3505 spapr_core_plug(hotplug_dev
, dev
, errp
);
3509 static void spapr_machine_device_unplug_request(HotplugHandler
*hotplug_dev
,
3510 DeviceState
*dev
, Error
**errp
)
3512 sPAPRMachineState
*sms
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3513 MachineClass
*mc
= MACHINE_GET_CLASS(sms
);
3515 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3516 if (spapr_ovec_test(sms
->ov5_cas
, OV5_HP_EVT
)) {
3517 spapr_memory_unplug_request(hotplug_dev
, dev
, errp
);
3519 /* NOTE: this means there is a window after guest reset, prior to
3520 * CAS negotiation, where unplug requests will fail due to the
3521 * capability not being detected yet. This is a bit different than
3522 * the case with PCI unplug, where the events will be queued and
3523 * eventually handled by the guest after boot
3525 error_setg(errp
, "Memory hot unplug not supported for this guest");
3527 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3528 if (!mc
->has_hotpluggable_cpus
) {
3529 error_setg(errp
, "CPU hot unplug not supported on this machine");
3532 spapr_core_unplug_request(hotplug_dev
, dev
, errp
);
3536 static void spapr_machine_device_pre_plug(HotplugHandler
*hotplug_dev
,
3537 DeviceState
*dev
, Error
**errp
)
3539 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3540 spapr_memory_pre_plug(hotplug_dev
, dev
, errp
);
3541 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3542 spapr_core_pre_plug(hotplug_dev
, dev
, errp
);
3546 static HotplugHandler
*spapr_get_hotplug_handler(MachineState
*machine
,
3549 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
3550 object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3551 return HOTPLUG_HANDLER(machine
);
3556 static CpuInstanceProperties
3557 spapr_cpu_index_to_props(MachineState
*machine
, unsigned cpu_index
)
3559 CPUArchId
*core_slot
;
3560 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
3562 /* make sure possible_cpu are intialized */
3563 mc
->possible_cpu_arch_ids(machine
);
3564 /* get CPU core slot containing thread that matches cpu_index */
3565 core_slot
= spapr_find_cpu_slot(machine
, cpu_index
, NULL
);
3567 return core_slot
->props
;
3570 static int64_t spapr_get_default_cpu_node_id(const MachineState
*ms
, int idx
)
3572 return idx
/ smp_cores
% nb_numa_nodes
;
3575 static const CPUArchIdList
*spapr_possible_cpu_arch_ids(MachineState
*machine
)
3578 const char *core_type
;
3579 int spapr_max_cores
= max_cpus
/ smp_threads
;
3580 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
3582 if (!mc
->has_hotpluggable_cpus
) {
3583 spapr_max_cores
= QEMU_ALIGN_UP(smp_cpus
, smp_threads
) / smp_threads
;
3585 if (machine
->possible_cpus
) {
3586 assert(machine
->possible_cpus
->len
== spapr_max_cores
);
3587 return machine
->possible_cpus
;
3590 core_type
= spapr_get_cpu_core_type(machine
->cpu_type
);
3592 error_report("Unable to find sPAPR CPU Core definition");
3596 machine
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
3597 sizeof(CPUArchId
) * spapr_max_cores
);
3598 machine
->possible_cpus
->len
= spapr_max_cores
;
3599 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
3600 int core_id
= i
* smp_threads
;
3602 machine
->possible_cpus
->cpus
[i
].type
= core_type
;
3603 machine
->possible_cpus
->cpus
[i
].vcpus_count
= smp_threads
;
3604 machine
->possible_cpus
->cpus
[i
].arch_id
= core_id
;
3605 machine
->possible_cpus
->cpus
[i
].props
.has_core_id
= true;
3606 machine
->possible_cpus
->cpus
[i
].props
.core_id
= core_id
;
3608 return machine
->possible_cpus
;
3611 static void spapr_phb_placement(sPAPRMachineState
*spapr
, uint32_t index
,
3612 uint64_t *buid
, hwaddr
*pio
,
3613 hwaddr
*mmio32
, hwaddr
*mmio64
,
3614 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
3617 * New-style PHB window placement.
3619 * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
3620 * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
3623 * Some guest kernels can't work with MMIO windows above 1<<46
3624 * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
3626 * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
3627 * PHB stacked together. (32TiB+2GiB)..(32TiB+64GiB) contains the
3628 * 2GiB 32-bit MMIO windows for each PHB. Then 33..64TiB has the
3629 * 1TiB 64-bit MMIO windows for each PHB.
3631 const uint64_t base_buid
= 0x800000020000000ULL
;
3632 #define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
3633 SPAPR_PCI_MEM64_WIN_SIZE - 1)
3636 /* Sanity check natural alignments */
3637 QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
3638 QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
3639 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE
% SPAPR_PCI_MEM32_WIN_SIZE
) != 0);
3640 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE
% SPAPR_PCI_IO_WIN_SIZE
) != 0);
3641 /* Sanity check bounds */
3642 QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS
* SPAPR_PCI_IO_WIN_SIZE
) >
3643 SPAPR_PCI_MEM32_WIN_SIZE
);
3644 QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS
* SPAPR_PCI_MEM32_WIN_SIZE
) >
3645 SPAPR_PCI_MEM64_WIN_SIZE
);
3647 if (index
>= SPAPR_MAX_PHBS
) {
3648 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %llu)",
3649 SPAPR_MAX_PHBS
- 1);
3653 *buid
= base_buid
+ index
;
3654 for (i
= 0; i
< n_dma
; ++i
) {
3655 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
3658 *pio
= SPAPR_PCI_BASE
+ index
* SPAPR_PCI_IO_WIN_SIZE
;
3659 *mmio32
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM32_WIN_SIZE
;
3660 *mmio64
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM64_WIN_SIZE
;
3663 static ICSState
*spapr_ics_get(XICSFabric
*dev
, int irq
)
3665 sPAPRMachineState
*spapr
= SPAPR_MACHINE(dev
);
3667 return ics_valid_irq(spapr
->ics
, irq
) ? spapr
->ics
: NULL
;
3670 static void spapr_ics_resend(XICSFabric
*dev
)
3672 sPAPRMachineState
*spapr
= SPAPR_MACHINE(dev
);
3674 ics_resend(spapr
->ics
);
3677 static ICPState
*spapr_icp_get(XICSFabric
*xi
, int vcpu_id
)
3679 PowerPCCPU
*cpu
= spapr_find_cpu(vcpu_id
);
3681 return cpu
? ICP(cpu
->intc
) : NULL
;
3684 #define ICS_IRQ_FREE(ics, srcno) \
3685 (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK)))
3687 static int ics_find_free_block(ICSState
*ics
, int num
, int alignnum
)
3691 for (first
= 0; first
< ics
->nr_irqs
; first
+= alignnum
) {
3692 if (num
> (ics
->nr_irqs
- first
)) {
3695 for (i
= first
; i
< first
+ num
; ++i
) {
3696 if (!ICS_IRQ_FREE(ics
, i
)) {
3700 if (i
== (first
+ num
)) {
3709 * Allocate the IRQ number and set the IRQ type, LSI or MSI
3711 static void spapr_irq_set_lsi(sPAPRMachineState
*spapr
, int irq
, bool lsi
)
3713 ics_set_irq_type(spapr
->ics
, irq
- spapr
->ics
->offset
, lsi
);
3716 int spapr_irq_alloc(sPAPRMachineState
*spapr
, int irq_hint
, bool lsi
,
3719 ICSState
*ics
= spapr
->ics
;
3726 if (!ICS_IRQ_FREE(ics
, irq_hint
- ics
->offset
)) {
3727 error_setg(errp
, "can't allocate IRQ %d: already in use", irq_hint
);
3732 irq
= ics_find_free_block(ics
, 1, 1);
3734 error_setg(errp
, "can't allocate IRQ: no IRQ left");
3740 spapr_irq_set_lsi(spapr
, irq
, lsi
);
3741 trace_spapr_irq_alloc(irq
);
3747 * Allocate block of consecutive IRQs, and return the number of the first IRQ in
3748 * the block. If align==true, aligns the first IRQ number to num.
3750 int spapr_irq_alloc_block(sPAPRMachineState
*spapr
, int num
, bool lsi
,
3751 bool align
, Error
**errp
)
3753 ICSState
*ics
= spapr
->ics
;
3761 * MSIMesage::data is used for storing VIRQ so
3762 * it has to be aligned to num to support multiple
3763 * MSI vectors. MSI-X is not affected by this.
3764 * The hint is used for the first IRQ, the rest should
3765 * be allocated continuously.
3768 assert((num
== 1) || (num
== 2) || (num
== 4) ||
3769 (num
== 8) || (num
== 16) || (num
== 32));
3770 first
= ics_find_free_block(ics
, num
, num
);
3772 first
= ics_find_free_block(ics
, num
, 1);
3775 error_setg(errp
, "can't find a free %d-IRQ block", num
);
3779 first
+= ics
->offset
;
3780 for (i
= first
; i
< first
+ num
; ++i
) {
3781 spapr_irq_set_lsi(spapr
, i
, lsi
);
3784 trace_spapr_irq_alloc_block(first
, num
, lsi
, align
);
3789 void spapr_irq_free(sPAPRMachineState
*spapr
, int irq
, int num
)
3791 ICSState
*ics
= spapr
->ics
;
3792 int srcno
= irq
- ics
->offset
;
3795 if (ics_valid_irq(ics
, irq
)) {
3796 trace_spapr_irq_free(0, irq
, num
);
3797 for (i
= srcno
; i
< srcno
+ num
; ++i
) {
3798 if (ICS_IRQ_FREE(ics
, i
)) {
3799 trace_spapr_irq_free_warn(0, i
+ ics
->offset
);
3801 memset(&ics
->irqs
[i
], 0, sizeof(ICSIRQState
));
3806 qemu_irq
spapr_qirq(sPAPRMachineState
*spapr
, int irq
)
3808 ICSState
*ics
= spapr
->ics
;
3810 if (ics_valid_irq(ics
, irq
)) {
3811 return ics
->qirqs
[irq
- ics
->offset
];
3817 static void spapr_pic_print_info(InterruptStatsProvider
*obj
,
3820 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
3824 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3826 icp_pic_print_info(ICP(cpu
->intc
), mon
);
3829 ics_pic_print_info(spapr
->ics
, mon
);
3832 int spapr_get_vcpu_id(PowerPCCPU
*cpu
)
3834 return cpu
->vcpu_id
;
3837 void spapr_set_vcpu_id(PowerPCCPU
*cpu
, int cpu_index
, Error
**errp
)
3839 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
3842 vcpu_id
= spapr_vcpu_id(spapr
, cpu_index
);
3844 if (kvm_enabled() && !kvm_vcpu_id_is_valid(vcpu_id
)) {
3845 error_setg(errp
, "Can't create CPU with id %d in KVM", vcpu_id
);
3846 error_append_hint(errp
, "Adjust the number of cpus to %d "
3847 "or try to raise the number of threads per core\n",
3848 vcpu_id
* smp_threads
/ spapr
->vsmt
);
3852 cpu
->vcpu_id
= vcpu_id
;
3855 PowerPCCPU
*spapr_find_cpu(int vcpu_id
)
3860 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3862 if (spapr_get_vcpu_id(cpu
) == vcpu_id
) {
3870 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
3872 MachineClass
*mc
= MACHINE_CLASS(oc
);
3873 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
3874 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
3875 NMIClass
*nc
= NMI_CLASS(oc
);
3876 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
3877 PPCVirtualHypervisorClass
*vhc
= PPC_VIRTUAL_HYPERVISOR_CLASS(oc
);
3878 XICSFabricClass
*xic
= XICS_FABRIC_CLASS(oc
);
3879 InterruptStatsProviderClass
*ispc
= INTERRUPT_STATS_PROVIDER_CLASS(oc
);
3881 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
3884 * We set up the default / latest behaviour here. The class_init
3885 * functions for the specific versioned machine types can override
3886 * these details for backwards compatibility
3888 mc
->init
= spapr_machine_init
;
3889 mc
->reset
= spapr_machine_reset
;
3890 mc
->block_default_type
= IF_SCSI
;
3891 mc
->max_cpus
= 1024;
3892 mc
->no_parallel
= 1;
3893 mc
->default_boot_order
= "";
3894 mc
->default_ram_size
= 512 * M_BYTE
;
3895 mc
->kvm_type
= spapr_kvm_type
;
3896 machine_class_allow_dynamic_sysbus_dev(mc
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
3897 mc
->pci_allow_0_address
= true;
3898 mc
->get_hotplug_handler
= spapr_get_hotplug_handler
;
3899 hc
->pre_plug
= spapr_machine_device_pre_plug
;
3900 hc
->plug
= spapr_machine_device_plug
;
3901 mc
->cpu_index_to_instance_props
= spapr_cpu_index_to_props
;
3902 mc
->get_default_cpu_node_id
= spapr_get_default_cpu_node_id
;
3903 mc
->possible_cpu_arch_ids
= spapr_possible_cpu_arch_ids
;
3904 hc
->unplug_request
= spapr_machine_device_unplug_request
;
3906 smc
->dr_lmb_enabled
= true;
3907 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("power8_v2.0");
3908 mc
->has_hotpluggable_cpus
= true;
3909 smc
->resize_hpt_default
= SPAPR_RESIZE_HPT_ENABLED
;
3910 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
3911 nc
->nmi_monitor_handler
= spapr_nmi
;
3912 smc
->phb_placement
= spapr_phb_placement
;
3913 vhc
->hypercall
= emulate_spapr_hypercall
;
3914 vhc
->hpt_mask
= spapr_hpt_mask
;
3915 vhc
->map_hptes
= spapr_map_hptes
;
3916 vhc
->unmap_hptes
= spapr_unmap_hptes
;
3917 vhc
->store_hpte
= spapr_store_hpte
;
3918 vhc
->get_patbe
= spapr_get_patbe
;
3919 vhc
->encode_hpt_for_kvm_pr
= spapr_encode_hpt_for_kvm_pr
;
3920 xic
->ics_get
= spapr_ics_get
;
3921 xic
->ics_resend
= spapr_ics_resend
;
3922 xic
->icp_get
= spapr_icp_get
;
3923 ispc
->print_info
= spapr_pic_print_info
;
3924 /* Force NUMA node memory size to be a multiple of
3925 * SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity
3926 * in which LMBs are represented and hot-added
3928 mc
->numa_mem_align_shift
= 28;
3930 smc
->default_caps
.caps
[SPAPR_CAP_HTM
] = SPAPR_CAP_OFF
;
3931 smc
->default_caps
.caps
[SPAPR_CAP_VSX
] = SPAPR_CAP_ON
;
3932 smc
->default_caps
.caps
[SPAPR_CAP_DFP
] = SPAPR_CAP_ON
;
3933 smc
->default_caps
.caps
[SPAPR_CAP_CFPC
] = SPAPR_CAP_BROKEN
;
3934 smc
->default_caps
.caps
[SPAPR_CAP_SBBC
] = SPAPR_CAP_BROKEN
;
3935 smc
->default_caps
.caps
[SPAPR_CAP_IBS
] = SPAPR_CAP_BROKEN
;
3936 spapr_caps_add_properties(smc
, &error_abort
);
3939 static const TypeInfo spapr_machine_info
= {
3940 .name
= TYPE_SPAPR_MACHINE
,
3941 .parent
= TYPE_MACHINE
,
3943 .instance_size
= sizeof(sPAPRMachineState
),
3944 .instance_init
= spapr_instance_init
,
3945 .instance_finalize
= spapr_machine_finalizefn
,
3946 .class_size
= sizeof(sPAPRMachineClass
),
3947 .class_init
= spapr_machine_class_init
,
3948 .interfaces
= (InterfaceInfo
[]) {
3949 { TYPE_FW_PATH_PROVIDER
},
3951 { TYPE_HOTPLUG_HANDLER
},
3952 { TYPE_PPC_VIRTUAL_HYPERVISOR
},
3953 { TYPE_XICS_FABRIC
},
3954 { TYPE_INTERRUPT_STATS_PROVIDER
},
3959 #define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
3960 static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
3963 MachineClass *mc = MACHINE_CLASS(oc); \
3964 spapr_machine_##suffix##_class_options(mc); \
3966 mc->alias = "pseries"; \
3967 mc->is_default = 1; \
3970 static void spapr_machine_##suffix##_instance_init(Object *obj) \
3972 MachineState *machine = MACHINE(obj); \
3973 spapr_machine_##suffix##_instance_options(machine); \
3975 static const TypeInfo spapr_machine_##suffix##_info = { \
3976 .name = MACHINE_TYPE_NAME("pseries-" verstr), \
3977 .parent = TYPE_SPAPR_MACHINE, \
3978 .class_init = spapr_machine_##suffix##_class_init, \
3979 .instance_init = spapr_machine_##suffix##_instance_init, \
3981 static void spapr_machine_register_##suffix(void) \
3983 type_register(&spapr_machine_##suffix##_info); \
3985 type_init(spapr_machine_register_##suffix)
3990 static void spapr_machine_2_12_instance_options(MachineState
*machine
)
3994 static void spapr_machine_2_12_class_options(MachineClass
*mc
)
3996 /* Defaults for the latest behaviour inherited from the base class */
3999 DEFINE_SPAPR_MACHINE(2_12
, "2.12", true);
4001 static void spapr_machine_2_12_sxxm_instance_options(MachineState
*machine
)
4003 spapr_machine_2_12_instance_options(machine
);
4006 static void spapr_machine_2_12_sxxm_class_options(MachineClass
*mc
)
4008 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4010 spapr_machine_2_12_class_options(mc
);
4011 smc
->default_caps
.caps
[SPAPR_CAP_CFPC
] = SPAPR_CAP_WORKAROUND
;
4012 smc
->default_caps
.caps
[SPAPR_CAP_SBBC
] = SPAPR_CAP_WORKAROUND
;
4013 smc
->default_caps
.caps
[SPAPR_CAP_IBS
] = SPAPR_CAP_FIXED_CCD
;
4016 DEFINE_SPAPR_MACHINE(2_12_sxxm
, "2.12-sxxm", false);
4021 #define SPAPR_COMPAT_2_11 \
4024 static void spapr_machine_2_11_instance_options(MachineState
*machine
)
4026 spapr_machine_2_12_instance_options(machine
);
4029 static void spapr_machine_2_11_class_options(MachineClass
*mc
)
4031 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4033 spapr_machine_2_12_class_options(mc
);
4034 smc
->default_caps
.caps
[SPAPR_CAP_HTM
] = SPAPR_CAP_ON
;
4035 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_11
);
4038 DEFINE_SPAPR_MACHINE(2_11
, "2.11", false);
4043 #define SPAPR_COMPAT_2_10 \
4046 static void spapr_machine_2_10_instance_options(MachineState
*machine
)
4048 spapr_machine_2_11_instance_options(machine
);
4051 static void spapr_machine_2_10_class_options(MachineClass
*mc
)
4053 spapr_machine_2_11_class_options(mc
);
4054 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_10
);
4057 DEFINE_SPAPR_MACHINE(2_10
, "2.10", false);
4062 #define SPAPR_COMPAT_2_9 \
4065 .driver = TYPE_POWERPC_CPU, \
4066 .property = "pre-2.10-migration", \
4070 static void spapr_machine_2_9_instance_options(MachineState *machine)
4072 spapr_machine_2_10_instance_options(machine
);
4075 static void spapr_machine_2_9_class_options(MachineClass
*mc
)
4077 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4079 spapr_machine_2_10_class_options(mc
);
4080 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_9
);
4081 mc
->numa_auto_assign_ram
= numa_legacy_auto_assign_ram
;
4082 smc
->pre_2_10_has_unused_icps
= true;
4083 smc
->resize_hpt_default
= SPAPR_RESIZE_HPT_DISABLED
;
4086 DEFINE_SPAPR_MACHINE(2_9
, "2.9", false);
4091 #define SPAPR_COMPAT_2_8 \
4094 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
4095 .property = "pcie-extended-configuration-space", \
4099 static void spapr_machine_2_8_instance_options(MachineState
*machine
)
4101 spapr_machine_2_9_instance_options(machine
);
4104 static void spapr_machine_2_8_class_options(MachineClass
*mc
)
4106 spapr_machine_2_9_class_options(mc
);
4107 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_8
);
4108 mc
->numa_mem_align_shift
= 23;
4111 DEFINE_SPAPR_MACHINE(2_8
, "2.8", false);
4116 #define SPAPR_COMPAT_2_7 \
4119 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
4120 .property = "mem_win_size", \
4121 .value = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\
4124 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
4125 .property = "mem64_win_size", \
4129 .driver = TYPE_POWERPC_CPU, \
4130 .property = "pre-2.8-migration", \
4134 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
4135 .property = "pre-2.8-migration", \
4139 static void phb_placement_2_7(sPAPRMachineState
*spapr
, uint32_t index
,
4140 uint64_t *buid
, hwaddr
*pio
,
4141 hwaddr
*mmio32
, hwaddr
*mmio64
,
4142 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
4144 /* Legacy PHB placement for pseries-2.7 and earlier machine types */
4145 const uint64_t base_buid
= 0x800000020000000ULL
;
4146 const hwaddr phb_spacing
= 0x1000000000ULL
; /* 64 GiB */
4147 const hwaddr mmio_offset
= 0xa0000000; /* 2 GiB + 512 MiB */
4148 const hwaddr pio_offset
= 0x80000000; /* 2 GiB */
4149 const uint32_t max_index
= 255;
4150 const hwaddr phb0_alignment
= 0x10000000000ULL
; /* 1 TiB */
4152 uint64_t ram_top
= MACHINE(spapr
)->ram_size
;
4153 hwaddr phb0_base
, phb_base
;
4156 /* Do we have hotpluggable memory? */
4157 if (MACHINE(spapr
)->maxram_size
> ram_top
) {
4158 /* Can't just use maxram_size, because there may be an
4159 * alignment gap between normal and hotpluggable memory
4161 ram_top
= spapr
->hotplug_memory
.base
+
4162 memory_region_size(&spapr
->hotplug_memory
.mr
);
4165 phb0_base
= QEMU_ALIGN_UP(ram_top
, phb0_alignment
);
4167 if (index
> max_index
) {
4168 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %u)",
4173 *buid
= base_buid
+ index
;
4174 for (i
= 0; i
< n_dma
; ++i
) {
4175 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
4178 phb_base
= phb0_base
+ index
* phb_spacing
;
4179 *pio
= phb_base
+ pio_offset
;
4180 *mmio32
= phb_base
+ mmio_offset
;
4182 * We don't set the 64-bit MMIO window, relying on the PHB's
4183 * fallback behaviour of automatically splitting a large "32-bit"
4184 * window into contiguous 32-bit and 64-bit windows
4188 static void spapr_machine_2_7_instance_options(MachineState
*machine
)
4190 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
4192 spapr_machine_2_8_instance_options(machine
);
4193 spapr
->use_hotplug_event_source
= false;
4196 static void spapr_machine_2_7_class_options(MachineClass
*mc
)
4198 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4200 spapr_machine_2_8_class_options(mc
);
4201 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("power7_v2.3");
4202 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_7
);
4203 smc
->phb_placement
= phb_placement_2_7
;
4206 DEFINE_SPAPR_MACHINE(2_7
, "2.7", false);
4211 #define SPAPR_COMPAT_2_6 \
4214 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
4216 .value = stringify(off),\
4219 static void spapr_machine_2_6_instance_options(MachineState
*machine
)
4221 spapr_machine_2_7_instance_options(machine
);
4224 static void spapr_machine_2_6_class_options(MachineClass
*mc
)
4226 spapr_machine_2_7_class_options(mc
);
4227 mc
->has_hotpluggable_cpus
= false;
4228 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_6
);
4231 DEFINE_SPAPR_MACHINE(2_6
, "2.6", false);
4236 #define SPAPR_COMPAT_2_5 \
4239 .driver = "spapr-vlan", \
4240 .property = "use-rx-buffer-pools", \
4244 static void spapr_machine_2_5_instance_options(MachineState
*machine
)
4246 spapr_machine_2_6_instance_options(machine
);
4249 static void spapr_machine_2_5_class_options(MachineClass
*mc
)
4251 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4253 spapr_machine_2_6_class_options(mc
);
4254 smc
->use_ohci_by_default
= true;
4255 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_5
);
4258 DEFINE_SPAPR_MACHINE(2_5
, "2.5", false);
4263 #define SPAPR_COMPAT_2_4 \
4266 static void spapr_machine_2_4_instance_options(MachineState
*machine
)
4268 spapr_machine_2_5_instance_options(machine
);
4271 static void spapr_machine_2_4_class_options(MachineClass
*mc
)
4273 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4275 spapr_machine_2_5_class_options(mc
);
4276 smc
->dr_lmb_enabled
= false;
4277 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_4
);
4280 DEFINE_SPAPR_MACHINE(2_4
, "2.4", false);
4285 #define SPAPR_COMPAT_2_3 \
4288 .driver = "spapr-pci-host-bridge",\
4289 .property = "dynamic-reconfiguration",\
4293 static void spapr_machine_2_3_instance_options(MachineState
*machine
)
4295 spapr_machine_2_4_instance_options(machine
);
4298 static void spapr_machine_2_3_class_options(MachineClass
*mc
)
4300 spapr_machine_2_4_class_options(mc
);
4301 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_3
);
4303 DEFINE_SPAPR_MACHINE(2_3
, "2.3", false);
4309 #define SPAPR_COMPAT_2_2 \
4312 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
4313 .property = "mem_win_size",\
4314 .value = "0x20000000",\
4317 static void spapr_machine_2_2_instance_options(MachineState
*machine
)
4319 spapr_machine_2_3_instance_options(machine
);
4320 machine
->suppress_vmdesc
= true;
4323 static void spapr_machine_2_2_class_options(MachineClass
*mc
)
4325 spapr_machine_2_3_class_options(mc
);
4326 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_2
);
4328 DEFINE_SPAPR_MACHINE(2_2
, "2.2", false);
4333 #define SPAPR_COMPAT_2_1 \
4336 static void spapr_machine_2_1_instance_options(MachineState
*machine
)
4338 spapr_machine_2_2_instance_options(machine
);
4341 static void spapr_machine_2_1_class_options(MachineClass
*mc
)
4343 spapr_machine_2_2_class_options(mc
);
4344 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_1
);
4346 DEFINE_SPAPR_MACHINE(2_1
, "2.1", false);
4348 static void spapr_machine_register_types(void)
4350 type_register_static(&spapr_machine_info
);
4353 type_init(spapr_machine_register_types
)