?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
virtio-gpu: pass down VirtIOGPU pointer to a bunch of functions
[qemu.git] / hw / display / virtio-gpu.c
blobcf31b5f710003bcc2f6867c8f7633d3be2dff604
1 /*
2 * Virtio GPU Device
3 *
4 * Copyright Red Hat, Inc. 2013-2014
5 *
6 * Authors:
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
12 */
13
14 #include "qemu/osdep.h"
15 #include "qemu/units.h"
16 #include "qemu-common.h"
17 #include "qemu/iov.h"
18 #include "ui/console.h"
19 #include "trace.h"
20 #include "hw/virtio/virtio.h"
21 #include "hw/virtio/virtio-gpu.h"
22 #include "hw/virtio/virtio-bus.h"
23 #include "migration/blocker.h"
24 #include "qemu/log.h"
25 #include "qapi/error.h"
26
27 #define VIRTIO_GPU_VM_VERSION 1
28
29 static struct virtio_gpu_simple_resource*
30 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
31
32 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
33 struct virtio_gpu_simple_resource *res);
34
35 static void
36 virtio_gpu_ctrl_hdr_bswap(struct virtio_gpu_ctrl_hdr *hdr)
37 {
38 le32_to_cpus(&hdr->type);
39 le32_to_cpus(&hdr->flags);
40 le64_to_cpus(&hdr->fence_id);
41 le32_to_cpus(&hdr->ctx_id);
42 le32_to_cpus(&hdr->padding);
43 }
44
45 static void virtio_gpu_bswap_32(void *ptr,
46 size_t size)
47 {
48 #ifdef HOST_WORDS_BIGENDIAN
49
50 size_t i;
51 struct virtio_gpu_ctrl_hdr *hdr = (struct virtio_gpu_ctrl_hdr *) ptr;
52
53 virtio_gpu_ctrl_hdr_bswap(hdr);
54
55 i = sizeof(struct virtio_gpu_ctrl_hdr);
56 while (i < size) {
57 le32_to_cpus((uint32_t *)(ptr + i));
58 i = i + sizeof(uint32_t);
59 }
60
61 #endif
62 }
63
64 static void
65 virtio_gpu_t2d_bswap(struct virtio_gpu_transfer_to_host_2d *t2d)
66 {
67 virtio_gpu_ctrl_hdr_bswap(&t2d->hdr);
68 le32_to_cpus(&t2d->r.x);
69 le32_to_cpus(&t2d->r.y);
70 le32_to_cpus(&t2d->r.width);
71 le32_to_cpus(&t2d->r.height);
72 le64_to_cpus(&t2d->offset);
73 le32_to_cpus(&t2d->resource_id);
74 le32_to_cpus(&t2d->padding);
75 }
76
77 #ifdef CONFIG_VIRGL
78 #include <virglrenderer.h>
79 #define VIRGL(_g, _virgl, _simple, ...) \
80 do { \
81 if (_g->use_virgl_renderer) { \
82 _virgl(__VA_ARGS__); \
83 } else { \
84 _simple(__VA_ARGS__); \
85 } \
86 } while (0)
87 #else
88 #define VIRGL(_g, _virgl, _simple, ...) \
89 do { \
90 _simple(__VA_ARGS__); \
91 } while (0)
92 #endif
93
94 static void update_cursor_data_simple(VirtIOGPU *g,
95 struct virtio_gpu_scanout *s,
96 uint32_t resource_id)
97 {
98 struct virtio_gpu_simple_resource *res;
99 uint32_t pixels;
100
101 res = virtio_gpu_find_resource(g, resource_id);
102 if (!res) {
103 return;
104 }
105
106 if (pixman_image_get_width(res->image) != s->current_cursor->width ||
107 pixman_image_get_height(res->image) != s->current_cursor->height) {
108 return;
109 }
110
111 pixels = s->current_cursor->width * s->current_cursor->height;
112 memcpy(s->current_cursor->data,
113 pixman_image_get_data(res->image),
114 pixels * sizeof(uint32_t));
115 }
116
117 #ifdef CONFIG_VIRGL
118
119 static void update_cursor_data_virgl(VirtIOGPU *g,
120 struct virtio_gpu_scanout *s,
121 uint32_t resource_id)
122 {
123 uint32_t width, height;
124 uint32_t pixels, *data;
125
126 data = virgl_renderer_get_cursor_data(resource_id, &width, &height);
127 if (!data) {
128 return;
129 }
130
131 if (width != s->current_cursor->width ||
132 height != s->current_cursor->height) {
133 free(data);
134 return;
135 }
136
137 pixels = s->current_cursor->width * s->current_cursor->height;
138 memcpy(s->current_cursor->data, data, pixels * sizeof(uint32_t));
139 free(data);
140 }
141
142 #endif
143
144 static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor)
145 {
146 struct virtio_gpu_scanout *s;
147 bool move = cursor->hdr.type == VIRTIO_GPU_CMD_MOVE_CURSOR;
148
149 if (cursor->pos.scanout_id >= g->conf.max_outputs) {
150 return;
151 }
152 s = &g->scanout[cursor->pos.scanout_id];
153
154 trace_virtio_gpu_update_cursor(cursor->pos.scanout_id,
155 cursor->pos.x,
156 cursor->pos.y,
157 move ? "move" : "update",
158 cursor->resource_id);
159
160 if (!move) {
161 if (!s->current_cursor) {
162 s->current_cursor = cursor_alloc(64, 64);
163 }
164
165 s->current_cursor->hot_x = cursor->hot_x;
166 s->current_cursor->hot_y = cursor->hot_y;
167
168 if (cursor->resource_id > 0) {
169 VIRGL(g, update_cursor_data_virgl, update_cursor_data_simple,
170 g, s, cursor->resource_id);
171 }
172 dpy_cursor_define(s->con, s->current_cursor);
173
174 s->cursor = *cursor;
175 } else {
176 s->cursor.pos.x = cursor->pos.x;
177 s->cursor.pos.y = cursor->pos.y;
178 }
179 dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y,
180 cursor->resource_id ? 1 : 0);
181 }
182
183 static void virtio_gpu_get_config(VirtIODevice *vdev, uint8_t *config)
184 {
185 VirtIOGPU *g = VIRTIO_GPU(vdev);
186 memcpy(config, &g->virtio_config, sizeof(g->virtio_config));
187 }
188
189 static void virtio_gpu_set_config(VirtIODevice *vdev, const uint8_t *config)
190 {
191 VirtIOGPU *g = VIRTIO_GPU(vdev);
192 struct virtio_gpu_config vgconfig;
193
194 memcpy(&vgconfig, config, sizeof(g->virtio_config));
195
196 if (vgconfig.events_clear) {
197 g->virtio_config.events_read &= ~vgconfig.events_clear;
198 }
199 }
200
201 static uint64_t virtio_gpu_get_features(VirtIODevice *vdev, uint64_t features,
202 Error **errp)
203 {
204 VirtIOGPU *g = VIRTIO_GPU(vdev);
205
206 if (virtio_gpu_virgl_enabled(g->conf)) {
207 features |= (1 << VIRTIO_GPU_F_VIRGL);
208 }
209 return features;
210 }
211
212 static void virtio_gpu_set_features(VirtIODevice *vdev, uint64_t features)
213 {
214 static const uint32_t virgl = (1 << VIRTIO_GPU_F_VIRGL);
215 VirtIOGPU *g = VIRTIO_GPU(vdev);
216
217 g->use_virgl_renderer = ((features & virgl) == virgl);
218 trace_virtio_gpu_features(g->use_virgl_renderer);
219 }
220
221 static void virtio_gpu_notify_event(VirtIOGPU *g, uint32_t event_type)
222 {
223 g->virtio_config.events_read |= event_type;
224 virtio_notify_config(&g->parent_obj);
225 }
226
227 static struct virtio_gpu_simple_resource *
228 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id)
229 {
230 struct virtio_gpu_simple_resource *res;
231
232 QTAILQ_FOREACH(res, &g->reslist, next) {
233 if (res->resource_id == resource_id) {
234 return res;
235 }
236 }
237 return NULL;
238 }
239
240 void virtio_gpu_ctrl_response(VirtIOGPU *g,
241 struct virtio_gpu_ctrl_command *cmd,
242 struct virtio_gpu_ctrl_hdr *resp,
243 size_t resp_len)
244 {
245 size_t s;
246
247 if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE) {
248 resp->flags |= VIRTIO_GPU_FLAG_FENCE;
249 resp->fence_id = cmd->cmd_hdr.fence_id;
250 resp->ctx_id = cmd->cmd_hdr.ctx_id;
251 }
252 virtio_gpu_ctrl_hdr_bswap(resp);
253 s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len);
254 if (s != resp_len) {
255 qemu_log_mask(LOG_GUEST_ERROR,
256 "%s: response size incorrect %zu vs %zu\n",
257 __func__, s, resp_len);
258 }
259 virtqueue_push(cmd->vq, &cmd->elem, s);
260 virtio_notify(VIRTIO_DEVICE(g), cmd->vq);
261 cmd->finished = true;
262 }
263
264 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
265 struct virtio_gpu_ctrl_command *cmd,
266 enum virtio_gpu_ctrl_type type)
267 {
268 struct virtio_gpu_ctrl_hdr resp;
269
270 memset(&resp, 0, sizeof(resp));
271 resp.type = type;
272 virtio_gpu_ctrl_response(g, cmd, &resp, sizeof(resp));
273 }
274
275 static void
276 virtio_gpu_fill_display_info(VirtIOGPU *g,
277 struct virtio_gpu_resp_display_info *dpy_info)
278 {
279 int i;
280
281 for (i = 0; i < g->conf.max_outputs; i++) {
282 if (g->enabled_output_bitmask & (1 << i)) {
283 dpy_info->pmodes[i].enabled = 1;
284 dpy_info->pmodes[i].r.width = cpu_to_le32(g->req_state[i].width);
285 dpy_info->pmodes[i].r.height = cpu_to_le32(g->req_state[i].height);
286 }
287 }
288 }
289
290 void virtio_gpu_get_display_info(VirtIOGPU *g,
291 struct virtio_gpu_ctrl_command *cmd)
292 {
293 struct virtio_gpu_resp_display_info display_info;
294
295 trace_virtio_gpu_cmd_get_display_info();
296 memset(&display_info, 0, sizeof(display_info));
297 display_info.hdr.type = VIRTIO_GPU_RESP_OK_DISPLAY_INFO;
298 virtio_gpu_fill_display_info(g, &display_info);
299 virtio_gpu_ctrl_response(g, cmd, &display_info.hdr,
300 sizeof(display_info));
301 }
302
303 static pixman_format_code_t get_pixman_format(uint32_t virtio_gpu_format)
304 {
305 switch (virtio_gpu_format) {
306 case VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM:
307 return PIXMAN_BE_b8g8r8x8;
308 case VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM:
309 return PIXMAN_BE_b8g8r8a8;
310 case VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM:
311 return PIXMAN_BE_x8r8g8b8;
312 case VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM:
313 return PIXMAN_BE_a8r8g8b8;
314 case VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM:
315 return PIXMAN_BE_r8g8b8x8;
316 case VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM:
317 return PIXMAN_BE_r8g8b8a8;
318 case VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM:
319 return PIXMAN_BE_x8b8g8r8;
320 case VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM:
321 return PIXMAN_BE_a8b8g8r8;
322 default:
323 return 0;
324 }
325 }
326
327 static uint32_t calc_image_hostmem(pixman_format_code_t pformat,
328 uint32_t width, uint32_t height)
329 {
330 /* Copied from pixman/pixman-bits-image.c, skip integer overflow check.
331 * pixman_image_create_bits will fail in case it overflow.
332 */
333
334 int bpp = PIXMAN_FORMAT_BPP(pformat);
335 int stride = ((width * bpp + 0x1f) >> 5) * sizeof(uint32_t);
336 return height * stride;
337 }
338
339 static void virtio_gpu_resource_create_2d(VirtIOGPU *g,
340 struct virtio_gpu_ctrl_command *cmd)
341 {
342 pixman_format_code_t pformat;
343 struct virtio_gpu_simple_resource *res;
344 struct virtio_gpu_resource_create_2d c2d;
345
346 VIRTIO_GPU_FILL_CMD(c2d);
347 virtio_gpu_bswap_32(&c2d, sizeof(c2d));
348 trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format,
349 c2d.width, c2d.height);
350
351 if (c2d.resource_id == 0) {
352 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n",
353 __func__);
354 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
355 return;
356 }
357
358 res = virtio_gpu_find_resource(g, c2d.resource_id);
359 if (res) {
360 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n",
361 __func__, c2d.resource_id);
362 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
363 return;
364 }
365
366 res = g_new0(struct virtio_gpu_simple_resource, 1);
367
368 res->width = c2d.width;
369 res->height = c2d.height;
370 res->format = c2d.format;
371 res->resource_id = c2d.resource_id;
372
373 pformat = get_pixman_format(c2d.format);
374 if (!pformat) {
375 qemu_log_mask(LOG_GUEST_ERROR,
376 "%s: host couldn't handle guest format %d\n",
377 __func__, c2d.format);
378 g_free(res);
379 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
380 return;
381 }
382
383 res->hostmem = calc_image_hostmem(pformat, c2d.width, c2d.height);
384 if (res->hostmem + g->hostmem < g->conf.max_hostmem) {
385 res->image = pixman_image_create_bits(pformat,
386 c2d.width,
387 c2d.height,
388 NULL, 0);
389 }
390
391 if (!res->image) {
392 qemu_log_mask(LOG_GUEST_ERROR,
393 "%s: resource creation failed %d %d %d\n",
394 __func__, c2d.resource_id, c2d.width, c2d.height);
395 g_free(res);
396 cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY;
397 return;
398 }
399
400 QTAILQ_INSERT_HEAD(&g->reslist, res, next);
401 g->hostmem += res->hostmem;
402 }
403
404 static void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id)
405 {
406 struct virtio_gpu_scanout *scanout = &g->scanout[scanout_id];
407 struct virtio_gpu_simple_resource *res;
408 DisplaySurface *ds = NULL;
409
410 if (scanout->resource_id == 0) {
411 return;
412 }
413
414 res = virtio_gpu_find_resource(g, scanout->resource_id);
415 if (res) {
416 res->scanout_bitmask &= ~(1 << scanout_id);
417 }
418
419 if (scanout_id == 0) {
420 /* primary head */
421 ds = qemu_create_message_surface(scanout->width ?: 640,
422 scanout->height ?: 480,
423 "Guest disabled display.");
424 }
425 dpy_gfx_replace_surface(scanout->con, ds);
426 scanout->resource_id = 0;
427 scanout->ds = NULL;
428 scanout->width = 0;
429 scanout->height = 0;
430 }
431
432 static void virtio_gpu_resource_destroy(VirtIOGPU *g,
433 struct virtio_gpu_simple_resource *res)
434 {
435 int i;
436
437 if (res->scanout_bitmask) {
438 for (i = 0; i < g->conf.max_outputs; i++) {
439 if (res->scanout_bitmask & (1 << i)) {
440 virtio_gpu_disable_scanout(g, i);
441 }
442 }
443 }
444
445 pixman_image_unref(res->image);
446 virtio_gpu_cleanup_mapping(g, res);
447 QTAILQ_REMOVE(&g->reslist, res, next);
448 g->hostmem -= res->hostmem;
449 g_free(res);
450 }
451
452 static void virtio_gpu_resource_unref(VirtIOGPU *g,
453 struct virtio_gpu_ctrl_command *cmd)
454 {
455 struct virtio_gpu_simple_resource *res;
456 struct virtio_gpu_resource_unref unref;
457
458 VIRTIO_GPU_FILL_CMD(unref);
459 virtio_gpu_bswap_32(&unref, sizeof(unref));
460 trace_virtio_gpu_cmd_res_unref(unref.resource_id);
461
462 res = virtio_gpu_find_resource(g, unref.resource_id);
463 if (!res) {
464 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
465 __func__, unref.resource_id);
466 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
467 return;
468 }
469 virtio_gpu_resource_destroy(g, res);
470 }
471
472 static void virtio_gpu_transfer_to_host_2d(VirtIOGPU *g,
473 struct virtio_gpu_ctrl_command *cmd)
474 {
475 struct virtio_gpu_simple_resource *res;
476 int h;
477 uint32_t src_offset, dst_offset, stride;
478 int bpp;
479 pixman_format_code_t format;
480 struct virtio_gpu_transfer_to_host_2d t2d;
481
482 VIRTIO_GPU_FILL_CMD(t2d);
483 virtio_gpu_t2d_bswap(&t2d);
484 trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id);
485
486 res = virtio_gpu_find_resource(g, t2d.resource_id);
487 if (!res || !res->iov) {
488 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
489 __func__, t2d.resource_id);
490 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
491 return;
492 }
493
494 if (t2d.r.x > res->width ||
495 t2d.r.y > res->height ||
496 t2d.r.width > res->width ||
497 t2d.r.height > res->height ||
498 t2d.r.x + t2d.r.width > res->width ||
499 t2d.r.y + t2d.r.height > res->height) {
500 qemu_log_mask(LOG_GUEST_ERROR, "%s: transfer bounds outside resource"
501 " bounds for resource %d: %d %d %d %d vs %d %d\n",
502 __func__, t2d.resource_id, t2d.r.x, t2d.r.y,
503 t2d.r.width, t2d.r.height, res->width, res->height);
504 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
505 return;
506 }
507
508 format = pixman_image_get_format(res->image);
509 bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8);
510 stride = pixman_image_get_stride(res->image);
511
512 if (t2d.offset || t2d.r.x || t2d.r.y ||
513 t2d.r.width != pixman_image_get_width(res->image)) {
514 void *img_data = pixman_image_get_data(res->image);
515 for (h = 0; h < t2d.r.height; h++) {
516 src_offset = t2d.offset + stride * h;
517 dst_offset = (t2d.r.y + h) * stride + (t2d.r.x * bpp);
518
519 iov_to_buf(res->iov, res->iov_cnt, src_offset,
520 (uint8_t *)img_data
521 + dst_offset, t2d.r.width * bpp);
522 }
523 } else {
524 iov_to_buf(res->iov, res->iov_cnt, 0,
525 pixman_image_get_data(res->image),
526 pixman_image_get_stride(res->image)
527 * pixman_image_get_height(res->image));
528 }
529 }
530
531 static void virtio_gpu_resource_flush(VirtIOGPU *g,
532 struct virtio_gpu_ctrl_command *cmd)
533 {
534 struct virtio_gpu_simple_resource *res;
535 struct virtio_gpu_resource_flush rf;
536 pixman_region16_t flush_region;
537 int i;
538
539 VIRTIO_GPU_FILL_CMD(rf);
540 virtio_gpu_bswap_32(&rf, sizeof(rf));
541 trace_virtio_gpu_cmd_res_flush(rf.resource_id,
542 rf.r.width, rf.r.height, rf.r.x, rf.r.y);
543
544 res = virtio_gpu_find_resource(g, rf.resource_id);
545 if (!res) {
546 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
547 __func__, rf.resource_id);
548 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
549 return;
550 }
551
552 if (rf.r.x > res->width ||
553 rf.r.y > res->height ||
554 rf.r.width > res->width ||
555 rf.r.height > res->height ||
556 rf.r.x + rf.r.width > res->width ||
557 rf.r.y + rf.r.height > res->height) {
558 qemu_log_mask(LOG_GUEST_ERROR, "%s: flush bounds outside resource"
559 " bounds for resource %d: %d %d %d %d vs %d %d\n",
560 __func__, rf.resource_id, rf.r.x, rf.r.y,
561 rf.r.width, rf.r.height, res->width, res->height);
562 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
563 return;
564 }
565
566 pixman_region_init_rect(&flush_region,
567 rf.r.x, rf.r.y, rf.r.width, rf.r.height);
568 for (i = 0; i < g->conf.max_outputs; i++) {
569 struct virtio_gpu_scanout *scanout;
570 pixman_region16_t region, finalregion;
571 pixman_box16_t *extents;
572
573 if (!(res->scanout_bitmask & (1 << i))) {
574 continue;
575 }
576 scanout = &g->scanout[i];
577
578 pixman_region_init(&finalregion);
579 pixman_region_init_rect(&region, scanout->x, scanout->y,
580 scanout->width, scanout->height);
581
582 pixman_region_intersect(&finalregion, &flush_region, &region);
583 pixman_region_translate(&finalregion, -scanout->x, -scanout->y);
584 extents = pixman_region_extents(&finalregion);
585 /* work out the area we need to update for each console */
586 dpy_gfx_update(g->scanout[i].con,
587 extents->x1, extents->y1,
588 extents->x2 - extents->x1,
589 extents->y2 - extents->y1);
590
591 pixman_region_fini(&region);
592 pixman_region_fini(&finalregion);
593 }
594 pixman_region_fini(&flush_region);
595 }
596
597 static void virtio_unref_resource(pixman_image_t *image, void *data)
598 {
599 pixman_image_unref(data);
600 }
601
602 static void virtio_gpu_set_scanout(VirtIOGPU *g,
603 struct virtio_gpu_ctrl_command *cmd)
604 {
605 struct virtio_gpu_simple_resource *res, *ores;
606 struct virtio_gpu_scanout *scanout;
607 pixman_format_code_t format;
608 uint32_t offset;
609 int bpp;
610 struct virtio_gpu_set_scanout ss;
611
612 VIRTIO_GPU_FILL_CMD(ss);
613 virtio_gpu_bswap_32(&ss, sizeof(ss));
614 trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id,
615 ss.r.width, ss.r.height, ss.r.x, ss.r.y);
616
617 if (ss.scanout_id >= g->conf.max_outputs) {
618 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
619 __func__, ss.scanout_id);
620 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
621 return;
622 }
623
624 g->enable = 1;
625 if (ss.resource_id == 0) {
626 virtio_gpu_disable_scanout(g, ss.scanout_id);
627 return;
628 }
629
630 /* create a surface for this scanout */
631 res = virtio_gpu_find_resource(g, ss.resource_id);
632 if (!res) {
633 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
634 __func__, ss.resource_id);
635 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
636 return;
637 }
638
639 if (ss.r.x > res->width ||
640 ss.r.y > res->height ||
641 ss.r.width > res->width ||
642 ss.r.height > res->height ||
643 ss.r.x + ss.r.width > res->width ||
644 ss.r.y + ss.r.height > res->height) {
645 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout %d bounds for"
646 " resource %d, (%d,%d)+%d,%d vs %d %d\n",
647 __func__, ss.scanout_id, ss.resource_id, ss.r.x, ss.r.y,
648 ss.r.width, ss.r.height, res->width, res->height);
649 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
650 return;
651 }
652
653 scanout = &g->scanout[ss.scanout_id];
654
655 format = pixman_image_get_format(res->image);
656 bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8);
657 offset = (ss.r.x * bpp) + ss.r.y * pixman_image_get_stride(res->image);
658 if (!scanout->ds || surface_data(scanout->ds)
659 != ((uint8_t *)pixman_image_get_data(res->image) + offset) ||
660 scanout->width != ss.r.width ||
661 scanout->height != ss.r.height) {
662 pixman_image_t *rect;
663 void *ptr = (uint8_t *)pixman_image_get_data(res->image) + offset;
664 rect = pixman_image_create_bits(format, ss.r.width, ss.r.height, ptr,
665 pixman_image_get_stride(res->image));
666 pixman_image_ref(res->image);
667 pixman_image_set_destroy_function(rect, virtio_unref_resource,
668 res->image);
669 /* realloc the surface ptr */
670 scanout->ds = qemu_create_displaysurface_pixman(rect);
671 if (!scanout->ds) {
672 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
673 return;
674 }
675 pixman_image_unref(rect);
676 dpy_gfx_replace_surface(g->scanout[ss.scanout_id].con, scanout->ds);
677 }
678
679 ores = virtio_gpu_find_resource(g, scanout->resource_id);
680 if (ores) {
681 ores->scanout_bitmask &= ~(1 << ss.scanout_id);
682 }
683
684 res->scanout_bitmask |= (1 << ss.scanout_id);
685 scanout->resource_id = ss.resource_id;
686 scanout->x = ss.r.x;
687 scanout->y = ss.r.y;
688 scanout->width = ss.r.width;
689 scanout->height = ss.r.height;
690 }
691
692 int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
693 struct virtio_gpu_resource_attach_backing *ab,
694 struct virtio_gpu_ctrl_command *cmd,
695 uint64_t **addr, struct iovec **iov)
696 {
697 struct virtio_gpu_mem_entry *ents;
698 size_t esize, s;
699 int i;
700
701 if (ab->nr_entries > 16384) {
702 qemu_log_mask(LOG_GUEST_ERROR,
703 "%s: nr_entries is too big (%d > 16384)\n",
704 __func__, ab->nr_entries);
705 return -1;
706 }
707
708 esize = sizeof(*ents) * ab->nr_entries;
709 ents = g_malloc(esize);
710 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num,
711 sizeof(*ab), ents, esize);
712 if (s != esize) {
713 qemu_log_mask(LOG_GUEST_ERROR,
714 "%s: command data size incorrect %zu vs %zu\n",
715 __func__, s, esize);
716 g_free(ents);
717 return -1;
718 }
719
720 *iov = g_malloc0(sizeof(struct iovec) * ab->nr_entries);
721 if (addr) {
722 *addr = g_malloc0(sizeof(uint64_t) * ab->nr_entries);
723 }
724 for (i = 0; i < ab->nr_entries; i++) {
725 uint64_t a = le64_to_cpu(ents[i].addr);
726 uint32_t l = le32_to_cpu(ents[i].length);
727 hwaddr len = l;
728 (*iov)[i].iov_len = l;
729 (*iov)[i].iov_base = cpu_physical_memory_map(a, &len, 1);
730 if (addr) {
731 (*addr)[i] = a;
732 }
733 if (!(*iov)[i].iov_base || len != l) {
734 qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for"
735 " resource %d element %d\n",
736 __func__, ab->resource_id, i);
737 virtio_gpu_cleanup_mapping_iov(g, *iov, i);
738 g_free(ents);
739 *iov = NULL;
740 if (addr) {
741 g_free(*addr);
742 *addr = NULL;
743 }
744 return -1;
745 }
746 }
747 g_free(ents);
748 return 0;
749 }
750
751 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
752 struct iovec *iov, uint32_t count)
753 {
754 int i;
755
756 for (i = 0; i < count; i++) {
757 cpu_physical_memory_unmap(iov[i].iov_base, iov[i].iov_len, 1,
758 iov[i].iov_len);
759 }
760 g_free(iov);
761 }
762
763 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
764 struct virtio_gpu_simple_resource *res)
765 {
766 virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt);
767 res->iov = NULL;
768 res->iov_cnt = 0;
769 g_free(res->addrs);
770 res->addrs = NULL;
771 }
772
773 static void
774 virtio_gpu_resource_attach_backing(VirtIOGPU *g,
775 struct virtio_gpu_ctrl_command *cmd)
776 {
777 struct virtio_gpu_simple_resource *res;
778 struct virtio_gpu_resource_attach_backing ab;
779 int ret;
780
781 VIRTIO_GPU_FILL_CMD(ab);
782 virtio_gpu_bswap_32(&ab, sizeof(ab));
783 trace_virtio_gpu_cmd_res_back_attach(ab.resource_id);
784
785 res = virtio_gpu_find_resource(g, ab.resource_id);
786 if (!res) {
787 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
788 __func__, ab.resource_id);
789 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
790 return;
791 }
792
793 if (res->iov) {
794 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
795 return;
796 }
797
798 ret = virtio_gpu_create_mapping_iov(g, &ab, cmd, &res->addrs, &res->iov);
799 if (ret != 0) {
800 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
801 return;
802 }
803
804 res->iov_cnt = ab.nr_entries;
805 }
806
807 static void
808 virtio_gpu_resource_detach_backing(VirtIOGPU *g,
809 struct virtio_gpu_ctrl_command *cmd)
810 {
811 struct virtio_gpu_simple_resource *res;
812 struct virtio_gpu_resource_detach_backing detach;
813
814 VIRTIO_GPU_FILL_CMD(detach);
815 virtio_gpu_bswap_32(&detach, sizeof(detach));
816 trace_virtio_gpu_cmd_res_back_detach(detach.resource_id);
817
818 res = virtio_gpu_find_resource(g, detach.resource_id);
819 if (!res || !res->iov) {
820 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
821 __func__, detach.resource_id);
822 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
823 return;
824 }
825 virtio_gpu_cleanup_mapping(g, res);
826 }
827
828 static void virtio_gpu_simple_process_cmd(VirtIOGPU *g,
829 struct virtio_gpu_ctrl_command *cmd)
830 {
831 VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);
832 virtio_gpu_ctrl_hdr_bswap(&cmd->cmd_hdr);
833
834 switch (cmd->cmd_hdr.type) {
835 case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:
836 virtio_gpu_get_display_info(g, cmd);
837 break;
838 case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D:
839 virtio_gpu_resource_create_2d(g, cmd);
840 break;
841 case VIRTIO_GPU_CMD_RESOURCE_UNREF:
842 virtio_gpu_resource_unref(g, cmd);
843 break;
844 case VIRTIO_GPU_CMD_RESOURCE_FLUSH:
845 virtio_gpu_resource_flush(g, cmd);
846 break;
847 case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D:
848 virtio_gpu_transfer_to_host_2d(g, cmd);
849 break;
850 case VIRTIO_GPU_CMD_SET_SCANOUT:
851 virtio_gpu_set_scanout(g, cmd);
852 break;
853 case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING:
854 virtio_gpu_resource_attach_backing(g, cmd);
855 break;
856 case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING:
857 virtio_gpu_resource_detach_backing(g, cmd);
858 break;
859 default:
860 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
861 break;
862 }
863 if (!cmd->finished) {
864 virtio_gpu_ctrl_response_nodata(g, cmd, cmd->error ? cmd->error :
865 VIRTIO_GPU_RESP_OK_NODATA);
866 }
867 }
868
869 static void virtio_gpu_handle_ctrl_cb(VirtIODevice *vdev, VirtQueue *vq)
870 {
871 VirtIOGPU *g = VIRTIO_GPU(vdev);
872 qemu_bh_schedule(g->ctrl_bh);
873 }
874
875 static void virtio_gpu_handle_cursor_cb(VirtIODevice *vdev, VirtQueue *vq)
876 {
877 VirtIOGPU *g = VIRTIO_GPU(vdev);
878 qemu_bh_schedule(g->cursor_bh);
879 }
880
881 void virtio_gpu_process_cmdq(VirtIOGPU *g)
882 {
883 struct virtio_gpu_ctrl_command *cmd;
884
885 while (!QTAILQ_EMPTY(&g->cmdq)) {
886 cmd = QTAILQ_FIRST(&g->cmdq);
887
888 /* process command */
889 VIRGL(g, virtio_gpu_virgl_process_cmd, virtio_gpu_simple_process_cmd,
890 g, cmd);
891 if (cmd->waiting) {
892 break;
893 }
894 QTAILQ_REMOVE(&g->cmdq, cmd, next);
895 if (virtio_gpu_stats_enabled(g->conf)) {
896 g->stats.requests++;
897 }
898
899 if (!cmd->finished) {
900 QTAILQ_INSERT_TAIL(&g->fenceq, cmd, next);
901 g->inflight++;
902 if (virtio_gpu_stats_enabled(g->conf)) {
903 if (g->stats.max_inflight < g->inflight) {
904 g->stats.max_inflight = g->inflight;
905 }
906 fprintf(stderr, "inflight: %3d (+)\r", g->inflight);
907 }
908 } else {
909 g_free(cmd);
910 }
911 }
912 }
913
914 static void virtio_gpu_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq)
915 {
916 VirtIOGPU *g = VIRTIO_GPU(vdev);
917 struct virtio_gpu_ctrl_command *cmd;
918
919 if (!virtio_queue_ready(vq)) {
920 return;
921 }
922
923 #ifdef CONFIG_VIRGL
924 if (!g->renderer_inited && g->use_virgl_renderer) {
925 virtio_gpu_virgl_init(g);
926 g->renderer_inited = true;
927 }
928 #endif
929
930 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
931 while (cmd) {
932 cmd->vq = vq;
933 cmd->error = 0;
934 cmd->finished = false;
935 cmd->waiting = false;
936 QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next);
937 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
938 }
939
940 virtio_gpu_process_cmdq(g);
941
942 #ifdef CONFIG_VIRGL
943 if (g->use_virgl_renderer) {
944 virtio_gpu_virgl_fence_poll(g);
945 }
946 #endif
947 }
948
949 static void virtio_gpu_ctrl_bh(void *opaque)
950 {
951 VirtIOGPU *g = opaque;
952 virtio_gpu_handle_ctrl(&g->parent_obj, g->ctrl_vq);
953 }
954
955 static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq)
956 {
957 VirtIOGPU *g = VIRTIO_GPU(vdev);
958 VirtQueueElement *elem;
959 size_t s;
960 struct virtio_gpu_update_cursor cursor_info;
961
962 if (!virtio_queue_ready(vq)) {
963 return;
964 }
965 for (;;) {
966 elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
967 if (!elem) {
968 break;
969 }
970
971 s = iov_to_buf(elem->out_sg, elem->out_num, 0,
972 &cursor_info, sizeof(cursor_info));
973 if (s != sizeof(cursor_info)) {
974 qemu_log_mask(LOG_GUEST_ERROR,
975 "%s: cursor size incorrect %zu vs %zu\n",
976 __func__, s, sizeof(cursor_info));
977 } else {
978 virtio_gpu_bswap_32(&cursor_info, sizeof(cursor_info));
979 update_cursor(g, &cursor_info);
980 }
981 virtqueue_push(vq, elem, 0);
982 virtio_notify(vdev, vq);
983 g_free(elem);
984 }
985 }
986
987 static void virtio_gpu_cursor_bh(void *opaque)
988 {
989 VirtIOGPU *g = opaque;
990 virtio_gpu_handle_cursor(&g->parent_obj, g->cursor_vq);
991 }
992
993 static void virtio_gpu_invalidate_display(void *opaque)
994 {
995 }
996
997 static void virtio_gpu_update_display(void *opaque)
998 {
999 }
1000
1001 static void virtio_gpu_text_update(void *opaque, console_ch_t *chardata)
1002 {
1003 }
1004
1005 static int virtio_gpu_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
1006 {
1007 VirtIOGPU *g = opaque;
1008
1009 if (idx >= g->conf.max_outputs) {
1010 return -1;
1011 }
1012
1013 g->req_state[idx].x = info->xoff;
1014 g->req_state[idx].y = info->yoff;
1015 g->req_state[idx].width = info->width;
1016 g->req_state[idx].height = info->height;
1017
1018 if (info->width && info->height) {
1019 g->enabled_output_bitmask |= (1 << idx);
1020 } else {
1021 g->enabled_output_bitmask &= ~(1 << idx);
1022 }
1023
1024 /* send event to guest */
1025 virtio_gpu_notify_event(g, VIRTIO_GPU_EVENT_DISPLAY);
1026 return 0;
1027 }
1028
1029 const GraphicHwOps virtio_gpu_ops = {
1030 .invalidate = virtio_gpu_invalidate_display,
1031 .gfx_update = virtio_gpu_update_display,
1032 .text_update = virtio_gpu_text_update,
1033 .ui_info = virtio_gpu_ui_info,
1034 #ifdef CONFIG_VIRGL
1035 .gl_block = virtio_gpu_gl_block,
1036 #endif
1037 };
1038
1039 static const VMStateDescription vmstate_virtio_gpu_scanout = {
1040 .name = "virtio-gpu-one-scanout",
1041 .version_id = 1,
1042 .fields = (VMStateField[]) {
1043 VMSTATE_UINT32(resource_id, struct virtio_gpu_scanout),
1044 VMSTATE_UINT32(width, struct virtio_gpu_scanout),
1045 VMSTATE_UINT32(height, struct virtio_gpu_scanout),
1046 VMSTATE_INT32(x, struct virtio_gpu_scanout),
1047 VMSTATE_INT32(y, struct virtio_gpu_scanout),
1048 VMSTATE_UINT32(cursor.resource_id, struct virtio_gpu_scanout),
1049 VMSTATE_UINT32(cursor.hot_x, struct virtio_gpu_scanout),
1050 VMSTATE_UINT32(cursor.hot_y, struct virtio_gpu_scanout),
1051 VMSTATE_UINT32(cursor.pos.x, struct virtio_gpu_scanout),
1052 VMSTATE_UINT32(cursor.pos.y, struct virtio_gpu_scanout),
1053 VMSTATE_END_OF_LIST()
1054 },
1055 };
1056
1057 static const VMStateDescription vmstate_virtio_gpu_scanouts = {
1058 .name = "virtio-gpu-scanouts",
1059 .version_id = 1,
1060 .fields = (VMStateField[]) {
1061 VMSTATE_INT32(enable, struct VirtIOGPU),
1062 VMSTATE_UINT32_EQUAL(conf.max_outputs, struct VirtIOGPU, NULL),
1063 VMSTATE_STRUCT_VARRAY_UINT32(scanout, struct VirtIOGPU,
1064 conf.max_outputs, 1,
1065 vmstate_virtio_gpu_scanout,
1066 struct virtio_gpu_scanout),
1067 VMSTATE_END_OF_LIST()
1068 },
1069 };
1070
1071 static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size,
1072 VMStateField *field, QJSON *vmdesc)
1073 {
1074 VirtIOGPU *g = opaque;
1075 struct virtio_gpu_simple_resource *res;
1076 int i;
1077
1078 /* in 2d mode we should never find unprocessed commands here */
1079 assert(QTAILQ_EMPTY(&g->cmdq));
1080
1081 QTAILQ_FOREACH(res, &g->reslist, next) {
1082 qemu_put_be32(f, res->resource_id);
1083 qemu_put_be32(f, res->width);
1084 qemu_put_be32(f, res->height);
1085 qemu_put_be32(f, res->format);
1086 qemu_put_be32(f, res->iov_cnt);
1087 for (i = 0; i < res->iov_cnt; i++) {
1088 qemu_put_be64(f, res->addrs[i]);
1089 qemu_put_be32(f, res->iov[i].iov_len);
1090 }
1091 qemu_put_buffer(f, (void *)pixman_image_get_data(res->image),
1092 pixman_image_get_stride(res->image) * res->height);
1093 }
1094 qemu_put_be32(f, 0); /* end of list */
1095
1096 return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL);
1097 }
1098
1099 static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
1100 VMStateField *field)
1101 {
1102 VirtIOGPU *g = opaque;
1103 struct virtio_gpu_simple_resource *res;
1104 struct virtio_gpu_scanout *scanout;
1105 uint32_t resource_id, pformat;
1106 int i;
1107
1108 g->hostmem = 0;
1109
1110 resource_id = qemu_get_be32(f);
1111 while (resource_id != 0) {
1112 res = g_new0(struct virtio_gpu_simple_resource, 1);
1113 res->resource_id = resource_id;
1114 res->width = qemu_get_be32(f);
1115 res->height = qemu_get_be32(f);
1116 res->format = qemu_get_be32(f);
1117 res->iov_cnt = qemu_get_be32(f);
1118
1119 /* allocate */
1120 pformat = get_pixman_format(res->format);
1121 if (!pformat) {
1122 g_free(res);
1123 return -EINVAL;
1124 }
1125 res->image = pixman_image_create_bits(pformat,
1126 res->width, res->height,
1127 NULL, 0);
1128 if (!res->image) {
1129 g_free(res);
1130 return -EINVAL;
1131 }
1132
1133 res->hostmem = calc_image_hostmem(pformat, res->width, res->height);
1134
1135 res->addrs = g_new(uint64_t, res->iov_cnt);
1136 res->iov = g_new(struct iovec, res->iov_cnt);
1137
1138 /* read data */
1139 for (i = 0; i < res->iov_cnt; i++) {
1140 res->addrs[i] = qemu_get_be64(f);
1141 res->iov[i].iov_len = qemu_get_be32(f);
1142 }
1143 qemu_get_buffer(f, (void *)pixman_image_get_data(res->image),
1144 pixman_image_get_stride(res->image) * res->height);
1145
1146 /* restore mapping */
1147 for (i = 0; i < res->iov_cnt; i++) {
1148 hwaddr len = res->iov[i].iov_len;
1149 res->iov[i].iov_base =
1150 cpu_physical_memory_map(res->addrs[i], &len, 1);
1151
1152 if (!res->iov[i].iov_base || len != res->iov[i].iov_len) {
1153 /* Clean up the half-a-mapping we just created... */
1154 if (res->iov[i].iov_base) {
1155 cpu_physical_memory_unmap(res->iov[i].iov_base,
1156 len, 0, 0);
1157 }
1158 /* ...and the mappings for previous loop iterations */
1159 res->iov_cnt = i;
1160 virtio_gpu_cleanup_mapping(g, res);
1161 pixman_image_unref(res->image);
1162 g_free(res);
1163 return -EINVAL;
1164 }
1165 }
1166
1167 QTAILQ_INSERT_HEAD(&g->reslist, res, next);
1168 g->hostmem += res->hostmem;
1169
1170 resource_id = qemu_get_be32(f);
1171 }
1172
1173 /* load & apply scanout state */
1174 vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1);
1175 for (i = 0; i < g->conf.max_outputs; i++) {
1176 scanout = &g->scanout[i];
1177 if (!scanout->resource_id) {
1178 continue;
1179 }
1180 res = virtio_gpu_find_resource(g, scanout->resource_id);
1181 if (!res) {
1182 return -EINVAL;
1183 }
1184 scanout->ds = qemu_create_displaysurface_pixman(res->image);
1185 if (!scanout->ds) {
1186 return -EINVAL;
1187 }
1188
1189 dpy_gfx_replace_surface(scanout->con, scanout->ds);
1190 dpy_gfx_update_full(scanout->con);
1191 if (scanout->cursor.resource_id) {
1192 update_cursor(g, &scanout->cursor);
1193 }
1194 res->scanout_bitmask |= (1 << i);
1195 }
1196
1197 return 0;
1198 }
1199
1200 static void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
1201 {
1202 VirtIODevice *vdev = VIRTIO_DEVICE(qdev);
1203 VirtIOGPU *g = VIRTIO_GPU(qdev);
1204 bool have_virgl;
1205 Error *local_err = NULL;
1206 int i;
1207
1208 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
1209 error_setg(errp, "virtio-gpu does not support vIOMMU yet");
1210 return;
1211 }
1212
1213 if (g->conf.max_outputs > VIRTIO_GPU_MAX_SCANOUTS) {
1214 error_setg(errp, "invalid max_outputs > %d", VIRTIO_GPU_MAX_SCANOUTS);
1215 return;
1216 }
1217
1218 g->use_virgl_renderer = false;
1219 #if !defined(CONFIG_VIRGL) || defined(HOST_WORDS_BIGENDIAN)
1220 have_virgl = false;
1221 #else
1222 have_virgl = display_opengl;
1223 #endif
1224 if (!have_virgl) {
1225 g->conf.flags &= ~(1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED);
1226 }
1227
1228 if (virtio_gpu_virgl_enabled(g->conf)) {
1229 error_setg(&g->migration_blocker, "virgl is not yet migratable");
1230 migrate_add_blocker(g->migration_blocker, &local_err);
1231 if (local_err) {
1232 error_propagate(errp, local_err);
1233 error_free(g->migration_blocker);
1234 return;
1235 }
1236 }
1237
1238 g->config_size = sizeof(struct virtio_gpu_config);
1239 g->virtio_config.num_scanouts = cpu_to_le32(g->conf.max_outputs);
1240 virtio_init(VIRTIO_DEVICE(g), "virtio-gpu", VIRTIO_ID_GPU,
1241 g->config_size);
1242
1243 g->req_state[0].width = g->conf.xres;
1244 g->req_state[0].height = g->conf.yres;
1245
1246 if (virtio_gpu_virgl_enabled(g->conf)) {
1247 /* use larger control queue in 3d mode */
1248 g->ctrl_vq = virtio_add_queue(vdev, 256, virtio_gpu_handle_ctrl_cb);
1249 g->cursor_vq = virtio_add_queue(vdev, 16, virtio_gpu_handle_cursor_cb);
1250
1251 #if defined(CONFIG_VIRGL)
1252 g->virtio_config.num_capsets = virtio_gpu_virgl_get_num_capsets(g);
1253 #else
1254 g->virtio_config.num_capsets = 0;
1255 #endif
1256 } else {
1257 g->ctrl_vq = virtio_add_queue(vdev, 64, virtio_gpu_handle_ctrl_cb);
1258 g->cursor_vq = virtio_add_queue(vdev, 16, virtio_gpu_handle_cursor_cb);
1259 }
1260
1261 g->ctrl_bh = qemu_bh_new(virtio_gpu_ctrl_bh, g);
1262 g->cursor_bh = qemu_bh_new(virtio_gpu_cursor_bh, g);
1263 QTAILQ_INIT(&g->reslist);
1264 QTAILQ_INIT(&g->cmdq);
1265 QTAILQ_INIT(&g->fenceq);
1266
1267 g->enabled_output_bitmask = 1;
1268 g->qdev = qdev;
1269
1270 for (i = 0; i < g->conf.max_outputs; i++) {
1271 g->scanout[i].con =
1272 graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g);
1273 if (i > 0) {
1274 dpy_gfx_replace_surface(g->scanout[i].con, NULL);
1275 }
1276 }
1277 }
1278
1279 static void virtio_gpu_device_unrealize(DeviceState *qdev, Error **errp)
1280 {
1281 VirtIOGPU *g = VIRTIO_GPU(qdev);
1282 if (g->migration_blocker) {
1283 migrate_del_blocker(g->migration_blocker);
1284 error_free(g->migration_blocker);
1285 }
1286 }
1287
1288 static void virtio_gpu_instance_init(Object *obj)
1289 {
1290 }
1291
1292 void virtio_gpu_reset(VirtIODevice *vdev)
1293 {
1294 VirtIOGPU *g = VIRTIO_GPU(vdev);
1295 struct virtio_gpu_simple_resource *res, *tmp;
1296 int i;
1297
1298 g->enable = 0;
1299
1300 QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) {
1301 virtio_gpu_resource_destroy(g, res);
1302 }
1303 for (i = 0; i < g->conf.max_outputs; i++) {
1304 g->scanout[i].resource_id = 0;
1305 g->scanout[i].width = 0;
1306 g->scanout[i].height = 0;
1307 g->scanout[i].x = 0;
1308 g->scanout[i].y = 0;
1309 g->scanout[i].ds = NULL;
1310 }
1311
1312 #ifdef CONFIG_VIRGL
1313 if (g->use_virgl_renderer) {
1314 virtio_gpu_virgl_reset(g);
1315 g->use_virgl_renderer = 0;
1316 }
1317 #endif
1318 }
1319
1320 /*
1321 * For historical reasons virtio_gpu does not adhere to virtio migration
1322 * scheme as described in doc/virtio-migration.txt, in a sense that no
1323 * save/load callback are provided to the core. Instead the device data
1324 * is saved/loaded after the core data.
1325 *
1326 * Because of this we need a special vmsd.
1327 */
1328 static const VMStateDescription vmstate_virtio_gpu = {
1329 .name = "virtio-gpu",
1330 .minimum_version_id = VIRTIO_GPU_VM_VERSION,
1331 .version_id = VIRTIO_GPU_VM_VERSION,
1332 .fields = (VMStateField[]) {
1333 VMSTATE_VIRTIO_DEVICE /* core */,
1334 {
1335 .name = "virtio-gpu",
1336 .info = &(const VMStateInfo) {
1337 .name = "virtio-gpu",
1338 .get = virtio_gpu_load,
1339 .put = virtio_gpu_save,
1340 },
1341 .flags = VMS_SINGLE,
1342 } /* device */,
1343 VMSTATE_END_OF_LIST()
1344 },
1345 };
1346
1347 static Property virtio_gpu_properties[] = {
1348 DEFINE_PROP_UINT32("max_outputs", VirtIOGPU, conf.max_outputs, 1),
1349 DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf.max_hostmem, 256 * MiB),
1350 #ifdef CONFIG_VIRGL
1351 DEFINE_PROP_BIT("virgl", VirtIOGPU, conf.flags,
1352 VIRTIO_GPU_FLAG_VIRGL_ENABLED, true),
1353 DEFINE_PROP_BIT("stats", VirtIOGPU, conf.flags,
1354 VIRTIO_GPU_FLAG_STATS_ENABLED, false),
1355 #endif
1356 DEFINE_PROP_UINT32("xres", VirtIOGPU, conf.xres, 1024),
1357 DEFINE_PROP_UINT32("yres", VirtIOGPU, conf.yres, 768),
1358 DEFINE_PROP_END_OF_LIST(),
1359 };
1360
1361 static void virtio_gpu_class_init(ObjectClass *klass, void *data)
1362 {
1363 DeviceClass *dc = DEVICE_CLASS(klass);
1364 VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
1365
1366 vdc->realize = virtio_gpu_device_realize;
1367 vdc->unrealize = virtio_gpu_device_unrealize;
1368 vdc->get_config = virtio_gpu_get_config;
1369 vdc->set_config = virtio_gpu_set_config;
1370 vdc->get_features = virtio_gpu_get_features;
1371 vdc->set_features = virtio_gpu_set_features;
1372
1373 vdc->reset = virtio_gpu_reset;
1374
1375 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
1376 dc->props = virtio_gpu_properties;
1377 dc->vmsd = &vmstate_virtio_gpu;
1378 dc->hotpluggable = false;
1379 }
1380
1381 static const TypeInfo virtio_gpu_info = {
1382 .name = TYPE_VIRTIO_GPU,
1383 .parent = TYPE_VIRTIO_DEVICE,
1384 .instance_size = sizeof(VirtIOGPU),
1385 .instance_init = virtio_gpu_instance_init,
1386 .class_init = virtio_gpu_class_init,
1387 };
1388
1389 static void virtio_register_types(void)
1390 {
1391 type_register_static(&virtio_gpu_info);
1392 }
1393
1394 type_init(virtio_register_types)
1395
1396 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctrl_hdr) != 24);
1397 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_update_cursor) != 56);
1398 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_unref) != 32);
1399 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_2d) != 40);
1400 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_set_scanout) != 48);
1401 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_flush) != 48);
1402 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_to_host_2d) != 56);
1403 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_mem_entry) != 16);
1404 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_attach_backing) != 32);
1405 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_detach_backing) != 32);
1406 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_display_info) != 408);
1407
1408 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_host_3d) != 72);
1409 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_3d) != 72);
1410 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_create) != 96);
1411 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_destroy) != 24);
1412 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_resource) != 32);
1413 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_cmd_submit) != 32);
1414 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset_info) != 32);
1415 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset_info) != 40);
1416 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset) != 32);
1417 QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset) != 24);
QEmu