target-ppc/timebase_helper.c

   1 /*
   2  *  PowerPC emulation helpers for QEMU.
   3  *
   4  *  Copyright (c) 2003-2007 Jocelyn Mayer
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "qemu/osdep.h"
  20 #include "cpu.h"
  21 #include "exec/helper-proto.h"
  22 #include "qemu/log.h"
  23
  24 /*****************************************************************************/
  25 /* SPR accesses */
  26
  27 target_ulong helper_load_tbl(CPUPPCState *env)
  28 {
  29     return (target_ulong)cpu_ppc_load_tbl(env);
  30 }
  31
  32 target_ulong helper_load_tbu(CPUPPCState *env)
  33 {
  34     return cpu_ppc_load_tbu(env);
  35 }
  36
  37 target_ulong helper_load_atbl(CPUPPCState *env)
  38 {
  39     return (target_ulong)cpu_ppc_load_atbl(env);
  40 }
  41
  42 target_ulong helper_load_atbu(CPUPPCState *env)
  43 {
  44     return cpu_ppc_load_atbu(env);
  45 }
  46
  47 #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
  48 target_ulong helper_load_purr(CPUPPCState *env)
  49 {
  50     return (target_ulong)cpu_ppc_load_purr(env);
  51 }
  52 #endif
  53
  54 target_ulong helper_load_601_rtcl(CPUPPCState *env)
  55 {
  56     return cpu_ppc601_load_rtcl(env);
  57 }
  58
  59 target_ulong helper_load_601_rtcu(CPUPPCState *env)
  60 {
  61     return cpu_ppc601_load_rtcu(env);
  62 }
  63
  64 #if !defined(CONFIG_USER_ONLY)
  65 void helper_store_tbl(CPUPPCState *env, target_ulong val)
  66 {
  67     cpu_ppc_store_tbl(env, val);
  68 }
  69
  70 void helper_store_tbu(CPUPPCState *env, target_ulong val)
  71 {
  72     cpu_ppc_store_tbu(env, val);
  73 }
  74
  75 void helper_store_atbl(CPUPPCState *env, target_ulong val)
  76 {
  77     cpu_ppc_store_atbl(env, val);
  78 }
  79
  80 void helper_store_atbu(CPUPPCState *env, target_ulong val)
  81 {
  82     cpu_ppc_store_atbu(env, val);
  83 }
  84
  85 void helper_store_601_rtcl(CPUPPCState *env, target_ulong val)
  86 {
  87     cpu_ppc601_store_rtcl(env, val);
  88 }
  89
  90 void helper_store_601_rtcu(CPUPPCState *env, target_ulong val)
  91 {
  92     cpu_ppc601_store_rtcu(env, val);
  93 }
  94
  95 target_ulong helper_load_decr(CPUPPCState *env)
  96 {
  97     return cpu_ppc_load_decr(env);
  98 }
  99
 100 void helper_store_decr(CPUPPCState *env, target_ulong val)
 101 {
 102     cpu_ppc_store_decr(env, val);
 103 }
 104
 105 target_ulong helper_load_hdecr(CPUPPCState *env)
 106 {
 107     return cpu_ppc_load_hdecr(env);
 108 }
 109
 110 void helper_store_hdecr(CPUPPCState *env, target_ulong val)
 111 {
 112     cpu_ppc_store_hdecr(env, val);
 113 }
 114
 115 target_ulong helper_load_40x_pit(CPUPPCState *env)
 116 {
 117     return load_40x_pit(env);
 118 }
 119
 120 void helper_store_40x_pit(CPUPPCState *env, target_ulong val)
 121 {
 122     store_40x_pit(env, val);
 123 }
 124
 125 void helper_store_booke_tcr(CPUPPCState *env, target_ulong val)
 126 {
 127     store_booke_tcr(env, val);
 128 }
 129
 130 void helper_store_booke_tsr(CPUPPCState *env, target_ulong val)
 131 {
 132     store_booke_tsr(env, val);
 133 }
 134 #endif
 135
 136 /*****************************************************************************/
 137 /* Embedded PowerPC specific helpers */
 138
 139 /* XXX: to be improved to check access rights when in user-mode */
 140 target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn)
 141 {
 142     uint32_t val = 0;
 143
 144     if (unlikely(env->dcr_env == NULL)) {
 145         qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
 146         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 147                                    POWERPC_EXCP_INVAL |
 148                                    POWERPC_EXCP_INVAL_INVAL);
 149     } else if (unlikely(ppc_dcr_read(env->dcr_env,
 150                                      (uint32_t)dcrn, &val) != 0)) {
 151         qemu_log_mask(LOG_GUEST_ERROR, "DCR read error %d %03x\n",
 152                       (uint32_t)dcrn, (uint32_t)dcrn);
 153         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 154                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
 155     }
 156     return val;
 157 }
 158
 159 void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val)
 160 {
 161     if (unlikely(env->dcr_env == NULL)) {
 162         qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
 163         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 164                                    POWERPC_EXCP_INVAL |
 165                                    POWERPC_EXCP_INVAL_INVAL);
 166     } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn,
 167                                       (uint32_t)val) != 0)) {
 168         qemu_log_mask(LOG_GUEST_ERROR, "DCR write error %d %03x\n",
 169                       (uint32_t)dcrn, (uint32_t)dcrn);
 170         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 171                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
 172     }
 173 }