4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
25 #include "hw/qdev-core.h"
26 #include "disas/bfd.h"
27 #include "exec/hwaddr.h"
28 #include "exec/memattrs.h"
29 #include "qemu/queue.h"
30 #include "qemu/thread.h"
32 #include "qemu/typedefs.h"
34 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
39 * Type wide enough to contain any #target_ulong virtual address.
41 typedef uint64_t vaddr
;
42 #define VADDR_PRId PRId64
43 #define VADDR_PRIu PRIu64
44 #define VADDR_PRIo PRIo64
45 #define VADDR_PRIx PRIx64
46 #define VADDR_PRIX PRIX64
47 #define VADDR_MAX UINT64_MAX
51 * @section_id: QEMU-cpu
53 * @short_description: Base class for all CPUs
56 #define TYPE_CPU "cpu"
58 /* Since this macro is used a lot in hot code paths and in conjunction with
59 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
62 #define CPU(obj) ((CPUState *)(obj))
64 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
65 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
67 typedef struct CPUState CPUState
;
69 typedef void (*CPUUnassignedAccess
)(CPUState
*cpu
, hwaddr addr
,
70 bool is_write
, bool is_exec
, int opaque
,
73 struct TranslationBlock
;
77 * @class_by_name: Callback to map -cpu command line model name to an
78 * instantiatable CPU type.
79 * @parse_features: Callback to parse command line arguments.
80 * @reset: Callback to reset the #CPUState to its initial state.
81 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
82 * @has_work: Callback for checking if there is work to do.
83 * @do_interrupt: Callback for interrupt handling.
84 * @do_unassigned_access: Callback for unassigned access handling.
85 * @do_unaligned_access: Callback for unaligned access handling, if
86 * the target defines #ALIGNED_ONLY.
87 * @virtio_is_big_endian: Callback to return %true if a CPU which supports
88 * runtime configurable endianness is currently big-endian. Non-configurable
89 * CPUs can use the default implementation of this method. This method should
90 * not be used by any callers other than the pre-1.0 virtio devices.
91 * @memory_rw_debug: Callback for GDB memory access.
92 * @dump_state: Callback for dumping state.
93 * @dump_statistics: Callback for dumping statistics.
94 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
95 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
96 * @get_memory_mapping: Callback for obtaining the memory mappings.
97 * @set_pc: Callback for setting the Program Counter register.
98 * @synchronize_from_tb: Callback for synchronizing state from a TCG
100 * @handle_mmu_fault: Callback for handling an MMU fault.
101 * @get_phys_page_debug: Callback for obtaining a physical address.
102 * @gdb_read_register: Callback for letting GDB read a register.
103 * @gdb_write_register: Callback for letting GDB write a register.
104 * @debug_excp_handler: Callback for handling debug exceptions.
105 * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
106 * 64-bit VM coredump.
107 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
108 * note to a 32-bit VM coredump.
109 * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
110 * 32-bit VM coredump.
111 * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
112 * note to a 32-bit VM coredump.
113 * @vmsd: State description for migration.
114 * @gdb_num_core_regs: Number of core registers accessible to GDB.
115 * @gdb_core_xml_file: File name for core registers GDB XML description.
116 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
117 * before the insn which triggers a watchpoint rather than after it.
118 * @cpu_exec_enter: Callback for cpu_exec preparation.
119 * @cpu_exec_exit: Callback for cpu_exec cleanup.
120 * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
121 * @disas_set_info: Setup architecture specific components of disassembly info
123 * Represents a CPU family or model.
125 typedef struct CPUClass
{
127 DeviceClass parent_class
;
130 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
131 void (*parse_features
)(CPUState
*cpu
, char *str
, Error
**errp
);
133 void (*reset
)(CPUState
*cpu
);
134 int reset_dump_flags
;
135 bool (*has_work
)(CPUState
*cpu
);
136 void (*do_interrupt
)(CPUState
*cpu
);
137 CPUUnassignedAccess do_unassigned_access
;
138 void (*do_unaligned_access
)(CPUState
*cpu
, vaddr addr
,
139 int is_write
, int is_user
, uintptr_t retaddr
);
140 bool (*virtio_is_big_endian
)(CPUState
*cpu
);
141 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
142 uint8_t *buf
, int len
, bool is_write
);
143 void (*dump_state
)(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
145 void (*dump_statistics
)(CPUState
*cpu
, FILE *f
,
146 fprintf_function cpu_fprintf
, int flags
);
147 int64_t (*get_arch_id
)(CPUState
*cpu
);
148 bool (*get_paging_enabled
)(const CPUState
*cpu
);
149 void (*get_memory_mapping
)(CPUState
*cpu
, MemoryMappingList
*list
,
151 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
152 void (*synchronize_from_tb
)(CPUState
*cpu
, struct TranslationBlock
*tb
);
153 int (*handle_mmu_fault
)(CPUState
*cpu
, vaddr address
, int rw
,
155 hwaddr (*get_phys_page_debug
)(CPUState
*cpu
, vaddr addr
);
156 int (*gdb_read_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
157 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
158 void (*debug_excp_handler
)(CPUState
*cpu
);
160 int (*write_elf64_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
161 int cpuid
, void *opaque
);
162 int (*write_elf64_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
164 int (*write_elf32_note
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
165 int cpuid
, void *opaque
);
166 int (*write_elf32_qemunote
)(WriteCoreDumpFunction f
, CPUState
*cpu
,
169 const struct VMStateDescription
*vmsd
;
170 int gdb_num_core_regs
;
171 const char *gdb_core_xml_file
;
172 bool gdb_stop_before_watchpoint
;
174 void (*cpu_exec_enter
)(CPUState
*cpu
);
175 void (*cpu_exec_exit
)(CPUState
*cpu
);
176 bool (*cpu_exec_interrupt
)(CPUState
*cpu
, int interrupt_request
);
178 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
181 #ifdef HOST_WORDS_BIGENDIAN
182 typedef struct icount_decr_u16
{
187 typedef struct icount_decr_u16
{
193 typedef struct CPUBreakpoint
{
195 int flags
; /* BP_* */
196 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
199 typedef struct CPUWatchpoint
{
204 int flags
; /* BP_* */
205 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
211 #define TB_JMP_CACHE_BITS 12
212 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
216 * @cpu_index: CPU index (informative).
217 * @nr_cores: Number of cores within this CPU package.
218 * @nr_threads: Number of threads within this CPU.
219 * @numa_node: NUMA node this CPU is belonging to.
220 * @host_tid: Host thread ID.
221 * @running: #true if CPU is currently running (usermode).
222 * @created: Indicates whether the CPU thread has been successfully created.
223 * @interrupt_request: Indicates a pending interrupt request.
224 * @halted: Nonzero if the CPU is in suspended state.
225 * @stop: Indicates a pending stop request.
226 * @stopped: Indicates the CPU has been artificially stopped.
227 * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
228 * CPU and return to its top level loop.
229 * @singlestep_enabled: Flags for single-stepping.
230 * @icount_extra: Instructions until next timer event.
231 * @icount_decr: Number of cycles left, with interrupt flag in high bit.
232 * This allows a single read-compare-cbranch-write sequence to test
233 * for both decrementer underflow and exceptions.
234 * @can_do_io: Nonzero if memory-mapped IO is safe.
235 * @env_ptr: Pointer to subclass-specific CPUArchState field.
236 * @current_tb: Currently executing TB.
237 * @gdb_regs: Additional GDB registers.
238 * @gdb_num_regs: Number of total registers accessible to GDB.
239 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
240 * @next_cpu: Next CPU sharing TB cache.
241 * @opaque: User data.
242 * @mem_io_pc: Host Program Counter at which the memory was accessed.
243 * @mem_io_vaddr: Target virtual address at which the memory was accessed.
244 * @kvm_fd: vCPU file descriptor for KVM.
246 * State of one CPU core or thread.
250 DeviceState parent_obj
;
257 struct QemuThread
*thread
;
264 struct QemuCond
*halt_cond
;
265 struct qemu_work_item
*queued_work_first
, *queued_work_last
;
270 volatile sig_atomic_t exit_request
;
271 uint32_t interrupt_request
;
272 int singlestep_enabled
;
273 int64_t icount_extra
;
277 struct AddressSpaceDispatch
*memory_dispatch
;
278 MemoryListener
*tcg_as_listener
;
280 void *env_ptr
; /* CPUArchState */
281 struct TranslationBlock
*current_tb
;
282 struct TranslationBlock
*tb_jmp_cache
[TB_JMP_CACHE_SIZE
];
283 struct GDBRegisterState
*gdb_regs
;
286 QTAILQ_ENTRY(CPUState
) node
;
288 /* ice debug support */
289 QTAILQ_HEAD(breakpoints_head
, CPUBreakpoint
) breakpoints
;
291 QTAILQ_HEAD(watchpoints_head
, CPUWatchpoint
) watchpoints
;
292 CPUWatchpoint
*watchpoint_hit
;
296 /* In order to avoid passing too many arguments to the MMIO helpers,
297 * we store some rarely used information in the CPU context.
304 struct KVMState
*kvm_state
;
305 struct kvm_run
*kvm_run
;
307 /* TODO Move common fields from CPUArchState here. */
308 int cpu_index
; /* used by alpha TCG */
309 uint32_t halted
; /* used by alpha, cris, ppc TCG */
315 int32_t exception_index
; /* used by m68k TCG */
317 /* Note that this is accessed at the start of every TB via a negative
318 offset from AREG0. Leave this field at the end so as to make the
319 (absolute value) offset as small as possible. This reduces code
320 size, especially for hosts without large memory offsets. */
321 volatile sig_atomic_t tcg_exit_req
;
324 QTAILQ_HEAD(CPUTailQ
, CPUState
);
325 extern struct CPUTailQ cpus
;
326 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
327 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
328 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
329 QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
330 #define CPU_FOREACH_REVERSE(cpu) \
331 QTAILQ_FOREACH_REVERSE(cpu, &cpus, CPUTailQ, node)
332 #define first_cpu QTAILQ_FIRST(&cpus)
334 DECLARE_TLS(CPUState
*, current_cpu
);
335 #define current_cpu tls_var(current_cpu)
338 * cpu_paging_enabled:
339 * @cpu: The CPU whose state is to be inspected.
341 * Returns: %true if paging is enabled, %false otherwise.
343 bool cpu_paging_enabled(const CPUState
*cpu
);
346 * cpu_get_memory_mapping:
347 * @cpu: The CPU whose memory mappings are to be obtained.
348 * @list: Where to write the memory mappings to.
349 * @errp: Pointer for reporting an #Error.
351 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
355 * cpu_write_elf64_note:
356 * @f: pointer to a function that writes memory to a file
357 * @cpu: The CPU whose memory is to be dumped
358 * @cpuid: ID number of the CPU
359 * @opaque: pointer to the CPUState struct
361 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
362 int cpuid
, void *opaque
);
365 * cpu_write_elf64_qemunote:
366 * @f: pointer to a function that writes memory to a file
367 * @cpu: The CPU whose memory is to be dumped
368 * @cpuid: ID number of the CPU
369 * @opaque: pointer to the CPUState struct
371 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
375 * cpu_write_elf32_note:
376 * @f: pointer to a function that writes memory to a file
377 * @cpu: The CPU whose memory is to be dumped
378 * @cpuid: ID number of the CPU
379 * @opaque: pointer to the CPUState struct
381 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
382 int cpuid
, void *opaque
);
385 * cpu_write_elf32_qemunote:
386 * @f: pointer to a function that writes memory to a file
387 * @cpu: The CPU whose memory is to be dumped
388 * @cpuid: ID number of the CPU
389 * @opaque: pointer to the CPUState struct
391 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
397 * @CPU_DUMP_FPU: dump FPU register state, not just integer
398 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
401 CPU_DUMP_CODE
= 0x00010000,
402 CPU_DUMP_FPU
= 0x00020000,
403 CPU_DUMP_CCOP
= 0x00040000,
408 * @cpu: The CPU whose state is to be dumped.
409 * @f: File to dump to.
410 * @cpu_fprintf: Function to dump with.
411 * @flags: Flags what to dump.
415 void cpu_dump_state(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
419 * cpu_dump_statistics:
420 * @cpu: The CPU whose state is to be dumped.
421 * @f: File to dump to.
422 * @cpu_fprintf: Function to dump with.
423 * @flags: Flags what to dump.
425 * Dumps CPU statistics.
427 void cpu_dump_statistics(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
430 #ifndef CONFIG_USER_ONLY
432 * cpu_get_phys_page_debug:
433 * @cpu: The CPU to obtain the physical page address for.
434 * @addr: The virtual address.
436 * Obtains the physical page corresponding to a virtual one.
437 * Use it only for debugging because no protection checks are done.
439 * Returns: Corresponding physical page address or -1 if no page found.
441 static inline hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
)
443 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
445 return cc
->get_phys_page_debug(cpu
, addr
);
451 * @cpu: The CPU whose state is to be reset.
453 void cpu_reset(CPUState
*cpu
);
457 * @typename: The CPU base type.
458 * @cpu_model: The model string without any parameters.
460 * Looks up a CPU #ObjectClass matching name @cpu_model.
462 * Returns: A #CPUClass or %NULL if not matching class is found.
464 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
468 * @typename: The CPU base type.
469 * @cpu_model: The model string including optional parameters.
471 * Instantiates a CPU, processes optional parameters and realizes the CPU.
473 * Returns: A #CPUState or %NULL if an error occurred.
475 CPUState
*cpu_generic_init(const char *typename
, const char *cpu_model
);
479 * @cpu: The vCPU to check.
481 * Checks whether the CPU has work to do.
483 * Returns: %true if the CPU has work, %false otherwise.
485 static inline bool cpu_has_work(CPUState
*cpu
)
487 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
489 g_assert(cc
->has_work
);
490 return cc
->has_work(cpu
);
495 * @cpu: The vCPU to check against.
497 * Checks whether the caller is executing on the vCPU thread.
499 * Returns: %true if called from @cpu's thread, %false otherwise.
501 bool qemu_cpu_is_self(CPUState
*cpu
);
505 * @cpu: The vCPU to kick.
507 * Kicks @cpu's thread.
509 void qemu_cpu_kick(CPUState
*cpu
);
513 * @cpu: The CPU to check.
515 * Checks whether the CPU is stopped.
517 * Returns: %true if run state is not running or if artificially stopped;
520 bool cpu_is_stopped(CPUState
*cpu
);
524 * @cpu: The vCPU to run on.
525 * @func: The function to be executed.
526 * @data: Data to pass to the function.
528 * Schedules the function @func for execution on the vCPU @cpu.
530 void run_on_cpu(CPUState
*cpu
, void (*func
)(void *data
), void *data
);
534 * @cpu: The vCPU to run on.
535 * @func: The function to be executed.
536 * @data: Data to pass to the function.
538 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
540 void async_run_on_cpu(CPUState
*cpu
, void (*func
)(void *data
), void *data
);
544 * @index: The CPUState@cpu_index value of the CPU to obtain.
546 * Gets a CPU matching @index.
548 * Returns: The CPU or %NULL if there is no matching CPU.
550 CPUState
*qemu_get_cpu(int index
);
554 * @id: Guest-exposed CPU ID to lookup.
556 * Search for CPU with specified ID.
558 * Returns: %true - CPU is found, %false - CPU isn't found.
560 bool cpu_exists(int64_t id
);
562 #ifndef CONFIG_USER_ONLY
564 typedef void (*CPUInterruptHandler
)(CPUState
*, int);
566 extern CPUInterruptHandler cpu_interrupt_handler
;
570 * @cpu: The CPU to set an interrupt on.
571 * @mask: The interupts to set.
573 * Invokes the interrupt handler.
575 static inline void cpu_interrupt(CPUState
*cpu
, int mask
)
577 cpu_interrupt_handler(cpu
, mask
);
580 #else /* USER_ONLY */
582 void cpu_interrupt(CPUState
*cpu
, int mask
);
584 #endif /* USER_ONLY */
586 #ifdef CONFIG_SOFTMMU
587 static inline void cpu_unassigned_access(CPUState
*cpu
, hwaddr addr
,
588 bool is_write
, bool is_exec
,
589 int opaque
, unsigned size
)
591 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
593 if (cc
->do_unassigned_access
) {
594 cc
->do_unassigned_access(cpu
, addr
, is_write
, is_exec
, opaque
, size
);
598 static inline void cpu_unaligned_access(CPUState
*cpu
, vaddr addr
,
599 int is_write
, int is_user
,
602 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
604 cc
->do_unaligned_access(cpu
, addr
, is_write
, is_user
, retaddr
);
610 * @cpu: The CPU to set the program counter for.
611 * @addr: Program counter value.
613 * Sets the program counter for a CPU.
615 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
617 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
619 cc
->set_pc(cpu
, addr
);
623 * cpu_reset_interrupt:
624 * @cpu: The CPU to clear the interrupt on.
625 * @mask: The interrupt mask to clear.
627 * Resets interrupts on the vCPU @cpu.
629 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
633 * @cpu: The CPU to exit.
635 * Requests the CPU @cpu to exit execution.
637 void cpu_exit(CPUState
*cpu
);
641 * @cpu: The CPU to resume.
643 * Resumes CPU, i.e. puts CPU into runnable state.
645 void cpu_resume(CPUState
*cpu
);
649 * @cpu: The vCPU to initialize.
651 * Initializes a vCPU.
653 void qemu_init_vcpu(CPUState
*cpu
);
655 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
656 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
657 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
661 * @cpu: CPU to the flags for.
662 * @enabled: Flags to enable.
664 * Enables or disables single-stepping for @cpu.
666 void cpu_single_step(CPUState
*cpu
, int enabled
);
668 /* Breakpoint/watchpoint flags */
669 #define BP_MEM_READ 0x01
670 #define BP_MEM_WRITE 0x02
671 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
672 #define BP_STOP_BEFORE_ACCESS 0x04
673 /* 0x08 currently unused */
676 #define BP_WATCHPOINT_HIT_READ 0x40
677 #define BP_WATCHPOINT_HIT_WRITE 0x80
678 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
680 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
681 CPUBreakpoint
**breakpoint
);
682 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
683 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
684 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
686 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
687 int flags
, CPUWatchpoint
**watchpoint
);
688 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
689 vaddr len
, int flags
);
690 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
691 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
693 void QEMU_NORETURN
cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
695 void cpu_exec_exit(CPUState
*cpu
);
697 #ifdef CONFIG_SOFTMMU
698 extern const struct VMStateDescription vmstate_cpu_common
;
700 #define vmstate_cpu_common vmstate_dummy
703 #define VMSTATE_CPU() { \
704 .name = "parent_obj", \
705 .size = sizeof(CPUState), \
706 .vmsd = &vmstate_cpu_common, \
707 .flags = VMS_STRUCT, \