hw/spapr_hcall.c

   1 #include "sysemu.h"
   2 #include "cpu.h"
   3 #include "qemu-char.h"
   4 #include "sysemu.h"
   5 #include "qemu-char.h"
   6 #include "helper_regs.h"
   7 #include "hw/spapr.h"
   8
   9 #define HPTES_PER_GROUP 8
  10
  11 #define HPTE_V_SSIZE_SHIFT      62
  12 #define HPTE_V_AVPN_SHIFT       7
  13 #define HPTE_V_AVPN             0x3fffffffffffff80ULL
  14 #define HPTE_V_AVPN_VAL(x)      (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
  15 #define HPTE_V_COMPARE(x, y)    (!(((x) ^ (y)) & 0xffffffffffffff80UL))
  16 #define HPTE_V_BOLTED           0x0000000000000010ULL
  17 #define HPTE_V_LOCK             0x0000000000000008ULL
  18 #define HPTE_V_LARGE            0x0000000000000004ULL
  19 #define HPTE_V_SECONDARY        0x0000000000000002ULL
  20 #define HPTE_V_VALID            0x0000000000000001ULL
  21
  22 #define HPTE_R_PP0              0x8000000000000000ULL
  23 #define HPTE_R_TS               0x4000000000000000ULL
  24 #define HPTE_R_KEY_HI           0x3000000000000000ULL
  25 #define HPTE_R_RPN_SHIFT        12
  26 #define HPTE_R_RPN              0x3ffffffffffff000ULL
  27 #define HPTE_R_FLAGS            0x00000000000003ffULL
  28 #define HPTE_R_PP               0x0000000000000003ULL
  29 #define HPTE_R_N                0x0000000000000004ULL
  30 #define HPTE_R_G                0x0000000000000008ULL
  31 #define HPTE_R_M                0x0000000000000010ULL
  32 #define HPTE_R_I                0x0000000000000020ULL
  33 #define HPTE_R_W                0x0000000000000040ULL
  34 #define HPTE_R_WIMG             0x0000000000000078ULL
  35 #define HPTE_R_C                0x0000000000000080ULL
  36 #define HPTE_R_R                0x0000000000000100ULL
  37 #define HPTE_R_KEY_LO           0x0000000000000e00ULL
  38
  39 #define HPTE_V_1TB_SEG          0x4000000000000000ULL
  40 #define HPTE_V_VRMA_MASK        0x4001ffffff000000ULL
  41
  42 #define HPTE_V_HVLOCK           0x40ULL
  43
  44 static inline int lock_hpte(void *hpte, target_ulong bits)
  45 {
  46     uint64_t pteh;
  47
  48     pteh = ldq_p(hpte);
  49
  50     /* We're protected by qemu's global lock here */
  51     if (pteh & bits) {
  52         return 0;
  53     }
  54     stq_p(hpte, pteh | HPTE_V_HVLOCK);
  55     return 1;
  56 }
  57
  58 static target_ulong compute_tlbie_rb(target_ulong v, target_ulong r,
  59                                      target_ulong pte_index)
  60 {
  61     target_ulong rb, va_low;
  62
  63     rb = (v & ~0x7fULL) << 16; /* AVA field */
  64     va_low = pte_index >> 3;
  65     if (v & HPTE_V_SECONDARY) {
  66         va_low = ~va_low;
  67     }
  68     /* xor vsid from AVA */
  69     if (!(v & HPTE_V_1TB_SEG)) {
  70         va_low ^= v >> 12;
  71     } else {
  72         va_low ^= v >> 24;
  73     }
  74     va_low &= 0x7ff;
  75     if (v & HPTE_V_LARGE) {
  76         rb |= 1;                         /* L field */
  77 #if 0 /* Disable that P7 specific bit for now */
  78         if (r & 0xff000) {
  79             /* non-16MB large page, must be 64k */
  80             /* (masks depend on page size) */
  81             rb |= 0x1000;                /* page encoding in LP field */
  82             rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
  83             rb |= (va_low & 0xfe);       /* AVAL field */
  84         }
  85 #endif
  86     } else {
  87         /* 4kB page */
  88         rb |= (va_low & 0x7ff) << 12;   /* remaining 11b of AVA */
  89     }
  90     rb |= (v >> 54) & 0x300;            /* B field */
  91     return rb;
  92 }
  93
  94 static target_ulong h_enter(CPUPPCState *env, sPAPREnvironment *spapr,
  95                             target_ulong opcode, target_ulong *args)
  96 {
  97     target_ulong flags = args[0];
  98     target_ulong pte_index = args[1];
  99     target_ulong pteh = args[2];
 100     target_ulong ptel = args[3];
 101     target_ulong page_shift = 12;
 102     target_ulong raddr;
 103     target_ulong i;
 104     uint8_t *hpte;
 105
 106     /* only handle 4k and 16M pages for now */
 107     if (pteh & HPTE_V_LARGE) {
 108 #if 0 /* We don't support 64k pages yet */
 109         if ((ptel & 0xf000) == 0x1000) {
 110             /* 64k page */
 111         } else
 112 #endif
 113         if ((ptel & 0xff000) == 0) {
 114             /* 16M page */
 115             page_shift = 24;
 116             /* lowest AVA bit must be 0 for 16M pages */
 117             if (pteh & 0x80) {
 118                 return H_PARAMETER;
 119             }
 120         } else {
 121             return H_PARAMETER;
 122         }
 123     }
 124
 125     raddr = (ptel & HPTE_R_RPN) & ~((1ULL << page_shift) - 1);
 126
 127     if (raddr < spapr->ram_limit) {
 128         /* Regular RAM - should have WIMG=0010 */
 129         if ((ptel & HPTE_R_WIMG) != HPTE_R_M) {
 130             return H_PARAMETER;
 131         }
 132     } else {
 133         /* Looks like an IO address */
 134         /* FIXME: What WIMG combinations could be sensible for IO?
 135          * For now we allow WIMG=010x, but are there others? */
 136         /* FIXME: Should we check against registered IO addresses? */
 137         if ((ptel & (HPTE_R_W | HPTE_R_I | HPTE_R_M)) != HPTE_R_I) {
 138             return H_PARAMETER;
 139         }
 140     }
 141
 142     pteh &= ~0x60ULL;
 143
 144     if ((pte_index * HASH_PTE_SIZE_64) & ~env->htab_mask) {
 145         return H_PARAMETER;
 146     }
 147     if (likely((flags & H_EXACT) == 0)) {
 148         pte_index &= ~7ULL;
 149         hpte = env->external_htab + (pte_index * HASH_PTE_SIZE_64);
 150         for (i = 0; ; ++i) {
 151             if (i == 8) {
 152                 return H_PTEG_FULL;
 153             }
 154             if (((ldq_p(hpte) & HPTE_V_VALID) == 0) &&
 155                 lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID)) {
 156                 break;
 157             }
 158             hpte += HASH_PTE_SIZE_64;
 159         }
 160     } else {
 161         i = 0;
 162         hpte = env->external_htab + (pte_index * HASH_PTE_SIZE_64);
 163         if (!lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID)) {
 164             return H_PTEG_FULL;
 165         }
 166     }
 167     stq_p(hpte + (HASH_PTE_SIZE_64/2), ptel);
 168     /* eieio();  FIXME: need some sort of barrier for smp? */
 169     stq_p(hpte, pteh);
 170
 171     assert(!(ldq_p(hpte) & HPTE_V_HVLOCK));
 172     args[0] = pte_index + i;
 173     return H_SUCCESS;
 174 }
 175
 176 enum {
 177     REMOVE_SUCCESS = 0,
 178     REMOVE_NOT_FOUND = 1,
 179     REMOVE_PARM = 2,
 180     REMOVE_HW = 3,
 181 };
 182
 183 static target_ulong remove_hpte(CPUPPCState *env, target_ulong ptex,
 184                                 target_ulong avpn,
 185                                 target_ulong flags,
 186                                 target_ulong *vp, target_ulong *rp)
 187 {
 188     uint8_t *hpte;
 189     target_ulong v, r, rb;
 190
 191     if ((ptex * HASH_PTE_SIZE_64) & ~env->htab_mask) {
 192         return REMOVE_PARM;
 193     }
 194
 195     hpte = env->external_htab + (ptex * HASH_PTE_SIZE_64);
 196     while (!lock_hpte(hpte, HPTE_V_HVLOCK)) {
 197         /* We have no real concurrency in qemu soft-emulation, so we
 198          * will never actually have a contested lock */
 199         assert(0);
 200     }
 201
 202     v = ldq_p(hpte);
 203     r = ldq_p(hpte + (HASH_PTE_SIZE_64/2));
 204
 205     if ((v & HPTE_V_VALID) == 0 ||
 206         ((flags & H_AVPN) && (v & ~0x7fULL) != avpn) ||
 207         ((flags & H_ANDCOND) && (v & avpn) != 0)) {
 208         stq_p(hpte, v & ~HPTE_V_HVLOCK);
 209         assert(!(ldq_p(hpte) & HPTE_V_HVLOCK));
 210         return REMOVE_NOT_FOUND;
 211     }
 212     *vp = v & ~HPTE_V_HVLOCK;
 213     *rp = r;
 214     stq_p(hpte, 0);
 215     rb = compute_tlbie_rb(v, r, ptex);
 216     ppc_tlb_invalidate_one(env, rb);
 217     assert(!(ldq_p(hpte) & HPTE_V_HVLOCK));
 218     return REMOVE_SUCCESS;
 219 }
 220
 221 static target_ulong h_remove(CPUPPCState *env, sPAPREnvironment *spapr,
 222                              target_ulong opcode, target_ulong *args)
 223 {
 224     target_ulong flags = args[0];
 225     target_ulong pte_index = args[1];
 226     target_ulong avpn = args[2];
 227     int ret;
 228
 229     ret = remove_hpte(env, pte_index, avpn, flags,
 230                       &args[0], &args[1]);
 231
 232     switch (ret) {
 233     case REMOVE_SUCCESS:
 234         return H_SUCCESS;
 235
 236     case REMOVE_NOT_FOUND:
 237         return H_NOT_FOUND;
 238
 239     case REMOVE_PARM:
 240         return H_PARAMETER;
 241
 242     case REMOVE_HW:
 243         return H_HARDWARE;
 244     }
 245
 246     assert(0);
 247 }
 248
 249 #define H_BULK_REMOVE_TYPE             0xc000000000000000ULL
 250 #define   H_BULK_REMOVE_REQUEST        0x4000000000000000ULL
 251 #define   H_BULK_REMOVE_RESPONSE       0x8000000000000000ULL
 252 #define   H_BULK_REMOVE_END            0xc000000000000000ULL
 253 #define H_BULK_REMOVE_CODE             0x3000000000000000ULL
 254 #define   H_BULK_REMOVE_SUCCESS        0x0000000000000000ULL
 255 #define   H_BULK_REMOVE_NOT_FOUND      0x1000000000000000ULL
 256 #define   H_BULK_REMOVE_PARM           0x2000000000000000ULL
 257 #define   H_BULK_REMOVE_HW             0x3000000000000000ULL
 258 #define H_BULK_REMOVE_RC               0x0c00000000000000ULL
 259 #define H_BULK_REMOVE_FLAGS            0x0300000000000000ULL
 260 #define   H_BULK_REMOVE_ABSOLUTE       0x0000000000000000ULL
 261 #define   H_BULK_REMOVE_ANDCOND        0x0100000000000000ULL
 262 #define   H_BULK_REMOVE_AVPN           0x0200000000000000ULL
 263 #define H_BULK_REMOVE_PTEX             0x00ffffffffffffffULL
 264
 265 #define H_BULK_REMOVE_MAX_BATCH        4
 266
 267 static target_ulong h_bulk_remove(CPUPPCState *env, sPAPREnvironment *spapr,
 268                                   target_ulong opcode, target_ulong *args)
 269 {
 270     int i;
 271
 272     for (i = 0; i < H_BULK_REMOVE_MAX_BATCH; i++) {
 273         target_ulong *tsh = &args[i*2];
 274         target_ulong tsl = args[i*2 + 1];
 275         target_ulong v, r, ret;
 276
 277         if ((*tsh & H_BULK_REMOVE_TYPE) == H_BULK_REMOVE_END) {
 278             break;
 279         } else if ((*tsh & H_BULK_REMOVE_TYPE) != H_BULK_REMOVE_REQUEST) {
 280             return H_PARAMETER;
 281         }
 282
 283         *tsh &= H_BULK_REMOVE_PTEX | H_BULK_REMOVE_FLAGS;
 284         *tsh |= H_BULK_REMOVE_RESPONSE;
 285
 286         if ((*tsh & H_BULK_REMOVE_ANDCOND) && (*tsh & H_BULK_REMOVE_AVPN)) {
 287             *tsh |= H_BULK_REMOVE_PARM;
 288             return H_PARAMETER;
 289         }
 290
 291         ret = remove_hpte(env, *tsh & H_BULK_REMOVE_PTEX, tsl,
 292                           (*tsh & H_BULK_REMOVE_FLAGS) >> 26,
 293                           &v, &r);
 294
 295         *tsh |= ret << 60;
 296
 297         switch (ret) {
 298         case REMOVE_SUCCESS:
 299             *tsh |= (r & (HPTE_R_C | HPTE_R_R)) << 43;
 300             break;
 301
 302         case REMOVE_PARM:
 303             return H_PARAMETER;
 304
 305         case REMOVE_HW:
 306             return H_HARDWARE;
 307         }
 308     }
 309
 310     return H_SUCCESS;
 311 }
 312
 313 static target_ulong h_protect(CPUPPCState *env, sPAPREnvironment *spapr,
 314                               target_ulong opcode, target_ulong *args)
 315 {
 316     target_ulong flags = args[0];
 317     target_ulong pte_index = args[1];
 318     target_ulong avpn = args[2];
 319     uint8_t *hpte;
 320     target_ulong v, r, rb;
 321
 322     if ((pte_index * HASH_PTE_SIZE_64) & ~env->htab_mask) {
 323         return H_PARAMETER;
 324     }
 325
 326     hpte = env->external_htab + (pte_index * HASH_PTE_SIZE_64);
 327     while (!lock_hpte(hpte, HPTE_V_HVLOCK)) {
 328         /* We have no real concurrency in qemu soft-emulation, so we
 329          * will never actually have a contested lock */
 330         assert(0);
 331     }
 332
 333     v = ldq_p(hpte);
 334     r = ldq_p(hpte + (HASH_PTE_SIZE_64/2));
 335
 336     if ((v & HPTE_V_VALID) == 0 ||
 337         ((flags & H_AVPN) && (v & ~0x7fULL) != avpn)) {
 338         stq_p(hpte, v & ~HPTE_V_HVLOCK);
 339         assert(!(ldq_p(hpte) & HPTE_V_HVLOCK));
 340         return H_NOT_FOUND;
 341     }
 342
 343     r &= ~(HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N |
 344            HPTE_R_KEY_HI | HPTE_R_KEY_LO);
 345     r |= (flags << 55) & HPTE_R_PP0;
 346     r |= (flags << 48) & HPTE_R_KEY_HI;
 347     r |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO);
 348     rb = compute_tlbie_rb(v, r, pte_index);
 349     stq_p(hpte, v & ~HPTE_V_VALID);
 350     ppc_tlb_invalidate_one(env, rb);
 351     stq_p(hpte + (HASH_PTE_SIZE_64/2), r);
 352     /* Don't need a memory barrier, due to qemu's global lock */
 353     stq_p(hpte, v & ~HPTE_V_HVLOCK);
 354     assert(!(ldq_p(hpte) & HPTE_V_HVLOCK));
 355     return H_SUCCESS;
 356 }
 357
 358 static target_ulong h_set_dabr(CPUPPCState *env, sPAPREnvironment *spapr,
 359                                target_ulong opcode, target_ulong *args)
 360 {
 361     /* FIXME: actually implement this */
 362     return H_HARDWARE;
 363 }
 364
 365 #define FLAGS_REGISTER_VPA         0x0000200000000000ULL
 366 #define FLAGS_REGISTER_DTL         0x0000400000000000ULL
 367 #define FLAGS_REGISTER_SLBSHADOW   0x0000600000000000ULL
 368 #define FLAGS_DEREGISTER_VPA       0x0000a00000000000ULL
 369 #define FLAGS_DEREGISTER_DTL       0x0000c00000000000ULL
 370 #define FLAGS_DEREGISTER_SLBSHADOW 0x0000e00000000000ULL
 371
 372 #define VPA_MIN_SIZE           640
 373 #define VPA_SIZE_OFFSET        0x4
 374 #define VPA_SHARED_PROC_OFFSET 0x9
 375 #define VPA_SHARED_PROC_VAL    0x2
 376
 377 static target_ulong register_vpa(CPUPPCState *env, target_ulong vpa)
 378 {
 379     uint16_t size;
 380     uint8_t tmp;
 381
 382     if (vpa == 0) {
 383         hcall_dprintf("Can't cope with registering a VPA at logical 0\n");
 384         return H_HARDWARE;
 385     }
 386
 387     if (vpa % env->dcache_line_size) {
 388         return H_PARAMETER;
 389     }
 390     /* FIXME: bounds check the address */
 391
 392     size = lduw_be_phys(vpa + 0x4);
 393
 394     if (size < VPA_MIN_SIZE) {
 395         return H_PARAMETER;
 396     }
 397
 398     /* VPA is not allowed to cross a page boundary */
 399     if ((vpa / 4096) != ((vpa + size - 1) / 4096)) {
 400         return H_PARAMETER;
 401     }
 402
 403     env->vpa = vpa;
 404
 405     tmp = ldub_phys(env->vpa + VPA_SHARED_PROC_OFFSET);
 406     tmp |= VPA_SHARED_PROC_VAL;
 407     stb_phys(env->vpa + VPA_SHARED_PROC_OFFSET, tmp);
 408
 409     return H_SUCCESS;
 410 }
 411
 412 static target_ulong deregister_vpa(CPUPPCState *env, target_ulong vpa)
 413 {
 414     if (env->slb_shadow) {
 415         return H_RESOURCE;
 416     }
 417
 418     if (env->dispatch_trace_log) {
 419         return H_RESOURCE;
 420     }
 421
 422     env->vpa = 0;
 423     return H_SUCCESS;
 424 }
 425
 426 static target_ulong register_slb_shadow(CPUPPCState *env, target_ulong addr)
 427 {
 428     uint32_t size;
 429
 430     if (addr == 0) {
 431         hcall_dprintf("Can't cope with SLB shadow at logical 0\n");
 432         return H_HARDWARE;
 433     }
 434
 435     size = ldl_be_phys(addr + 0x4);
 436     if (size < 0x8) {
 437         return H_PARAMETER;
 438     }
 439
 440     if ((addr / 4096) != ((addr + size - 1) / 4096)) {
 441         return H_PARAMETER;
 442     }
 443
 444     if (!env->vpa) {
 445         return H_RESOURCE;
 446     }
 447
 448     env->slb_shadow = addr;
 449
 450     return H_SUCCESS;
 451 }
 452
 453 static target_ulong deregister_slb_shadow(CPUPPCState *env, target_ulong addr)
 454 {
 455     env->slb_shadow = 0;
 456     return H_SUCCESS;
 457 }
 458
 459 static target_ulong register_dtl(CPUPPCState *env, target_ulong addr)
 460 {
 461     uint32_t size;
 462
 463     if (addr == 0) {
 464         hcall_dprintf("Can't cope with DTL at logical 0\n");
 465         return H_HARDWARE;
 466     }
 467
 468     size = ldl_be_phys(addr + 0x4);
 469
 470     if (size < 48) {
 471         return H_PARAMETER;
 472     }
 473
 474     if (!env->vpa) {
 475         return H_RESOURCE;
 476     }
 477
 478     env->dispatch_trace_log = addr;
 479     env->dtl_size = size;
 480
 481     return H_SUCCESS;
 482 }
 483
 484 static target_ulong deregister_dtl(CPUPPCState *env, target_ulong addr)
 485 {
 486     env->dispatch_trace_log = 0;
 487     env->dtl_size = 0;
 488
 489     return H_SUCCESS;
 490 }
 491
 492 static target_ulong h_register_vpa(CPUPPCState *env, sPAPREnvironment *spapr,
 493                                    target_ulong opcode, target_ulong *args)
 494 {
 495     target_ulong flags = args[0];
 496     target_ulong procno = args[1];
 497     target_ulong vpa = args[2];
 498     target_ulong ret = H_PARAMETER;
 499     CPUPPCState *tenv;
 500
 501     for (tenv = first_cpu; tenv; tenv = tenv->next_cpu) {
 502         if (tenv->cpu_index == procno) {
 503             break;
 504         }
 505     }
 506
 507     if (!tenv) {
 508         return H_PARAMETER;
 509     }
 510
 511     switch (flags) {
 512     case FLAGS_REGISTER_VPA:
 513         ret = register_vpa(tenv, vpa);
 514         break;
 515
 516     case FLAGS_DEREGISTER_VPA:
 517         ret = deregister_vpa(tenv, vpa);
 518         break;
 519
 520     case FLAGS_REGISTER_SLBSHADOW:
 521         ret = register_slb_shadow(tenv, vpa);
 522         break;
 523
 524     case FLAGS_DEREGISTER_SLBSHADOW:
 525         ret = deregister_slb_shadow(tenv, vpa);
 526         break;
 527
 528     case FLAGS_REGISTER_DTL:
 529         ret = register_dtl(tenv, vpa);
 530         break;
 531
 532     case FLAGS_DEREGISTER_DTL:
 533         ret = deregister_dtl(tenv, vpa);
 534         break;
 535     }
 536
 537     return ret;
 538 }
 539
 540 static target_ulong h_cede(CPUPPCState *env, sPAPREnvironment *spapr,
 541                            target_ulong opcode, target_ulong *args)
 542 {
 543     env->msr |= (1ULL << MSR_EE);
 544     hreg_compute_hflags(env);
 545     if (!cpu_has_work(env)) {
 546         env->halted = 1;
 547     }
 548     return H_SUCCESS;
 549 }
 550
 551 static target_ulong h_rtas(CPUPPCState *env, sPAPREnvironment *spapr,
 552                            target_ulong opcode, target_ulong *args)
 553 {
 554     target_ulong rtas_r3 = args[0];
 555     uint32_t token = ldl_be_phys(rtas_r3);
 556     uint32_t nargs = ldl_be_phys(rtas_r3 + 4);
 557     uint32_t nret = ldl_be_phys(rtas_r3 + 8);
 558
 559     return spapr_rtas_call(spapr, token, nargs, rtas_r3 + 12,
 560                            nret, rtas_r3 + 12 + 4*nargs);
 561 }
 562
 563 static target_ulong h_logical_load(CPUPPCState *env, sPAPREnvironment *spapr,
 564                                    target_ulong opcode, target_ulong *args)
 565 {
 566     target_ulong size = args[0];
 567     target_ulong addr = args[1];
 568
 569     switch (size) {
 570     case 1:
 571         args[0] = ldub_phys(addr);
 572         return H_SUCCESS;
 573     case 2:
 574         args[0] = lduw_phys(addr);
 575         return H_SUCCESS;
 576     case 4:
 577         args[0] = ldl_phys(addr);
 578         return H_SUCCESS;
 579     case 8:
 580         args[0] = ldq_phys(addr);
 581         return H_SUCCESS;
 582     }
 583     return H_PARAMETER;
 584 }
 585
 586 static target_ulong h_logical_store(CPUPPCState *env, sPAPREnvironment *spapr,
 587                                     target_ulong opcode, target_ulong *args)
 588 {
 589     target_ulong size = args[0];
 590     target_ulong addr = args[1];
 591     target_ulong val  = args[2];
 592
 593     switch (size) {
 594     case 1:
 595         stb_phys(addr, val);
 596         return H_SUCCESS;
 597     case 2:
 598         stw_phys(addr, val);
 599         return H_SUCCESS;
 600     case 4:
 601         stl_phys(addr, val);
 602         return H_SUCCESS;
 603     case 8:
 604         stq_phys(addr, val);
 605         return H_SUCCESS;
 606     }
 607     return H_PARAMETER;
 608 }
 609
 610 static target_ulong h_logical_memop(CPUPPCState *env, sPAPREnvironment *spapr,
 611                                     target_ulong opcode, target_ulong *args)
 612 {
 613     target_ulong dst   = args[0]; /* Destination address */
 614     target_ulong src   = args[1]; /* Source address */
 615     target_ulong esize = args[2]; /* Element size (0=1,1=2,2=4,3=8) */
 616     target_ulong count = args[3]; /* Element count */
 617     target_ulong op    = args[4]; /* 0 = copy, 1 = invert */
 618     uint64_t tmp;
 619     unsigned int mask = (1 << esize) - 1;
 620     int step = 1 << esize;
 621
 622     if (count > 0x80000000) {
 623         return H_PARAMETER;
 624     }
 625
 626     if ((dst & mask) || (src & mask) || (op > 1)) {
 627         return H_PARAMETER;
 628     }
 629
 630     if (dst >= src && dst < (src + (count << esize))) {
 631             dst = dst + ((count - 1) << esize);
 632             src = src + ((count - 1) << esize);
 633             step = -step;
 634     }
 635
 636     while (count--) {
 637         switch (esize) {
 638         case 0:
 639             tmp = ldub_phys(src);
 640             break;
 641         case 1:
 642             tmp = lduw_phys(src);
 643             break;
 644         case 2:
 645             tmp = ldl_phys(src);
 646             break;
 647         case 3:
 648             tmp = ldq_phys(src);
 649             break;
 650         default:
 651             return H_PARAMETER;
 652         }
 653         if (op == 1) {
 654             tmp = ~tmp;
 655         }
 656         switch (esize) {
 657         case 0:
 658             stb_phys(dst, tmp);
 659             break;
 660         case 1:
 661             stw_phys(dst, tmp);
 662             break;
 663         case 2:
 664             stl_phys(dst, tmp);
 665             break;
 666         case 3:
 667             stq_phys(dst, tmp);
 668             break;
 669         }
 670         dst = dst + step;
 671         src = src + step;
 672     }
 673
 674     return H_SUCCESS;
 675 }
 676
 677 static target_ulong h_logical_icbi(CPUPPCState *env, sPAPREnvironment *spapr,
 678                                    target_ulong opcode, target_ulong *args)
 679 {
 680     /* Nothing to do on emulation, KVM will trap this in the kernel */
 681     return H_SUCCESS;
 682 }
 683
 684 static target_ulong h_logical_dcbf(CPUPPCState *env, sPAPREnvironment *spapr,
 685                                    target_ulong opcode, target_ulong *args)
 686 {
 687     /* Nothing to do on emulation, KVM will trap this in the kernel */
 688     return H_SUCCESS;
 689 }
 690
 691 static spapr_hcall_fn papr_hypercall_table[(MAX_HCALL_OPCODE / 4) + 1];
 692 static spapr_hcall_fn kvmppc_hypercall_table[KVMPPC_HCALL_MAX - KVMPPC_HCALL_BASE + 1];
 693
 694 void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn)
 695 {
 696     spapr_hcall_fn *slot;
 697
 698     if (opcode <= MAX_HCALL_OPCODE) {
 699         assert((opcode & 0x3) == 0);
 700
 701         slot = &papr_hypercall_table[opcode / 4];
 702     } else {
 703         assert((opcode >= KVMPPC_HCALL_BASE) && (opcode <= KVMPPC_HCALL_MAX));
 704
 705
 706         slot = &kvmppc_hypercall_table[opcode - KVMPPC_HCALL_BASE];
 707     }
 708
 709     assert(!(*slot) || (fn == *slot));
 710     *slot = fn;
 711 }
 712
 713 target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
 714                              target_ulong *args)
 715 {
 716     if (msr_pr) {
 717         hcall_dprintf("Hypercall made with MSR[PR]=1\n");
 718         return H_PRIVILEGE;
 719     }
 720
 721     if ((opcode <= MAX_HCALL_OPCODE)
 722         && ((opcode & 0x3) == 0)) {
 723         spapr_hcall_fn fn = papr_hypercall_table[opcode / 4];
 724
 725         if (fn) {
 726             return fn(env, spapr, opcode, args);
 727         }
 728     } else if ((opcode >= KVMPPC_HCALL_BASE) &&
 729                (opcode <= KVMPPC_HCALL_MAX)) {
 730         spapr_hcall_fn fn = kvmppc_hypercall_table[opcode - KVMPPC_HCALL_BASE];
 731
 732         if (fn) {
 733             return fn(env, spapr, opcode, args);
 734         }
 735     }
 736
 737     hcall_dprintf("Unimplemented hcall 0x" TARGET_FMT_lx "\n", opcode);
 738     return H_FUNCTION;
 739 }
 740
 741 static void hypercall_register_types(void)
 742 {
 743     /* hcall-pft */
 744     spapr_register_hypercall(H_ENTER, h_enter);
 745     spapr_register_hypercall(H_REMOVE, h_remove);
 746     spapr_register_hypercall(H_PROTECT, h_protect);
 747
 748     /* hcall-bulk */
 749     spapr_register_hypercall(H_BULK_REMOVE, h_bulk_remove);
 750
 751     /* hcall-dabr */
 752     spapr_register_hypercall(H_SET_DABR, h_set_dabr);
 753
 754     /* hcall-splpar */
 755     spapr_register_hypercall(H_REGISTER_VPA, h_register_vpa);
 756     spapr_register_hypercall(H_CEDE, h_cede);
 757
 758     /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenciate
 759      * here between the "CI" and the "CACHE" variants, they will use whatever
 760      * mapping attributes qemu is using. When using KVM, the kernel will
 761      * enforce the attributes more strongly
 762      */
 763     spapr_register_hypercall(H_LOGICAL_CI_LOAD, h_logical_load);
 764     spapr_register_hypercall(H_LOGICAL_CI_STORE, h_logical_store);
 765     spapr_register_hypercall(H_LOGICAL_CACHE_LOAD, h_logical_load);
 766     spapr_register_hypercall(H_LOGICAL_CACHE_STORE, h_logical_store);
 767     spapr_register_hypercall(H_LOGICAL_ICBI, h_logical_icbi);
 768     spapr_register_hypercall(H_LOGICAL_DCBF, h_logical_dcbf);
 769     spapr_register_hypercall(KVMPPC_H_LOGICAL_MEMOP, h_logical_memop);
 770
 771     /* qemu/KVM-PPC specific hcalls */
 772     spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas);
 773 }
 774
 775 type_init(hypercall_register_types)