hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw.h"
  11 #include "mips.h"
  12 #include "mips_cpudevs.h"
  13 #include "pc.h"
  14 #include "isa.h"
  15 #include "net.h"
  16 #include "sysemu.h"
  17 #include "boards.h"
  18 #include "flash.h"
  19 #include "qemu-log.h"
  20 #include "mips-bios.h"
  21 #include "ide.h"
  22 #include "loader.h"
  23 #include "elf.h"
  24 #include "mc146818rtc.h"
  25 #include "i8254.h"
  26 #include "blockdev.h"
  27 #include "exec-memory.h"
  28
  29 #define MAX_IDE_BUS 2
  30
  31 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  32 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  33 static const int ide_irq[2] = { 14, 15 };
  34
  35 static ISADevice *pit; /* PIT i8254 */
  36
  37 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  38
  39 static struct _loaderparams {
  40     int ram_size;
  41     const char *kernel_filename;
  42     const char *kernel_cmdline;
  43     const char *initrd_filename;
  44 } loaderparams;
  45
  46 static void mips_qemu_write (void *opaque, target_phys_addr_t addr,
  47                              uint64_t val, unsigned size)
  48 {
  49     if ((addr & 0xffff) == 0 && val == 42)
  50         qemu_system_reset_request ();
  51     else if ((addr & 0xffff) == 4 && val == 42)
  52         qemu_system_shutdown_request ();
  53 }
  54
  55 static uint64_t mips_qemu_read (void *opaque, target_phys_addr_t addr,
  56                                 unsigned size)
  57 {
  58     return 0;
  59 }
  60
  61 static const MemoryRegionOps mips_qemu_ops = {
  62     .read = mips_qemu_read,
  63     .write = mips_qemu_write,
  64     .endianness = DEVICE_NATIVE_ENDIAN,
  65 };
  66
  67 typedef struct ResetData {
  68     MIPSCPU *cpu;
  69     uint64_t vector;
  70 } ResetData;
  71
  72 static int64_t load_kernel(void)
  73 {
  74     int64_t entry, kernel_high;
  75     long kernel_size, initrd_size, params_size;
  76     ram_addr_t initrd_offset;
  77     uint32_t *params_buf;
  78     int big_endian;
  79
  80 #ifdef TARGET_WORDS_BIGENDIAN
  81     big_endian = 1;
  82 #else
  83     big_endian = 0;
  84 #endif
  85     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
  86                            NULL, (uint64_t *)&entry, NULL,
  87                            (uint64_t *)&kernel_high, big_endian,
  88                            ELF_MACHINE, 1);
  89     if (kernel_size >= 0) {
  90         if ((entry & ~0x7fffffffULL) == 0x80000000)
  91             entry = (int32_t)entry;
  92     } else {
  93         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  94                 loaderparams.kernel_filename);
  95         exit(1);
  96     }
  97
  98     /* load initrd */
  99     initrd_size = 0;
 100     initrd_offset = 0;
 101     if (loaderparams.initrd_filename) {
 102         initrd_size = get_image_size (loaderparams.initrd_filename);
 103         if (initrd_size > 0) {
 104             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 105             if (initrd_offset + initrd_size > ram_size) {
 106                 fprintf(stderr,
 107                         "qemu: memory too small for initial ram disk '%s'\n",
 108                         loaderparams.initrd_filename);
 109                 exit(1);
 110             }
 111             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 112                                               initrd_offset,
 113                                               ram_size - initrd_offset);
 114         }
 115         if (initrd_size == (target_ulong) -1) {
 116             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 117                     loaderparams.initrd_filename);
 118             exit(1);
 119         }
 120     }
 121
 122     /* Store command line.  */
 123     params_size = 264;
 124     params_buf = g_malloc(params_size);
 125
 126     params_buf[0] = tswap32(ram_size);
 127     params_buf[1] = tswap32(0x12345678);
 128
 129     if (initrd_size > 0) {
 130         snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 131                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 132                  initrd_size, loaderparams.kernel_cmdline);
 133     } else {
 134         snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
 135     }
 136
 137     rom_add_blob_fixed("params", params_buf, params_size,
 138                        (16 << 20) - 264);
 139
 140     return entry;
 141 }
 142
 143 static void main_cpu_reset(void *opaque)
 144 {
 145     ResetData *s = (ResetData *)opaque;
 146     CPUMIPSState *env = &s->cpu->env;
 147
 148     cpu_reset(CPU(s->cpu));
 149     env->active_tc.PC = s->vector;
 150 }
 151
 152 static const int sector_len = 32 * 1024;
 153 static
 154 void mips_r4k_init (ram_addr_t ram_size,
 155                     const char *boot_device,
 156                     const char *kernel_filename, const char *kernel_cmdline,
 157                     const char *initrd_filename, const char *cpu_model)
 158 {
 159     char *filename;
 160     MemoryRegion *address_space_mem = get_system_memory();
 161     MemoryRegion *ram = g_new(MemoryRegion, 1);
 162     MemoryRegion *bios;
 163     MemoryRegion *iomem = g_new(MemoryRegion, 1);
 164     int bios_size;
 165     MIPSCPU *cpu;
 166     CPUMIPSState *env;
 167     ResetData *reset_info;
 168     int i;
 169     qemu_irq *i8259;
 170     ISABus *isa_bus;
 171     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 172     DriveInfo *dinfo;
 173     int be;
 174
 175     /* init CPUs */
 176     if (cpu_model == NULL) {
 177 #ifdef TARGET_MIPS64
 178         cpu_model = "R4000";
 179 #else
 180         cpu_model = "24Kf";
 181 #endif
 182     }
 183     cpu = cpu_mips_init(cpu_model);
 184     if (cpu == NULL) {
 185         fprintf(stderr, "Unable to find CPU definition\n");
 186         exit(1);
 187     }
 188     env = &cpu->env;
 189
 190     reset_info = g_malloc0(sizeof(ResetData));
 191     reset_info->cpu = cpu;
 192     reset_info->vector = env->active_tc.PC;
 193     qemu_register_reset(main_cpu_reset, reset_info);
 194
 195     /* allocate RAM */
 196     if (ram_size > (256 << 20)) {
 197         fprintf(stderr,
 198                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 199                 ((unsigned int)ram_size / (1 << 20)));
 200         exit(1);
 201     }
 202     memory_region_init_ram(ram, "mips_r4k.ram", ram_size);
 203     vmstate_register_ram_global(ram);
 204
 205     memory_region_add_subregion(address_space_mem, 0, ram);
 206
 207     memory_region_init_io(iomem, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
 208     memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
 209
 210     /* Try to load a BIOS image. If this fails, we continue regardless,
 211        but initialize the hardware ourselves. When a kernel gets
 212        preloaded we also initialize the hardware, since the BIOS wasn't
 213        run. */
 214     if (bios_name == NULL)
 215         bios_name = BIOS_FILENAME;
 216     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 217     if (filename) {
 218         bios_size = get_image_size(filename);
 219     } else {
 220         bios_size = -1;
 221     }
 222 #ifdef TARGET_WORDS_BIGENDIAN
 223     be = 1;
 224 #else
 225     be = 0;
 226 #endif
 227     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 228         bios = g_new(MemoryRegion, 1);
 229         memory_region_init_ram(bios, "mips_r4k.bios", BIOS_SIZE);
 230         vmstate_register_ram_global(bios);
 231         memory_region_set_readonly(bios, true);
 232         memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
 233
 234         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 235     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 236         uint32_t mips_rom = 0x00400000;
 237         if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
 238                                    dinfo->bdrv, sector_len,
 239                                    mips_rom / sector_len,
 240                                    4, 0, 0, 0, 0, be)) {
 241             fprintf(stderr, "qemu: Error registering flash memory.\n");
 242         }
 243     }
 244     else {
 245         /* not fatal */
 246         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 247                 bios_name);
 248     }
 249     if (filename) {
 250         g_free(filename);
 251     }
 252
 253     if (kernel_filename) {
 254         loaderparams.ram_size = ram_size;
 255         loaderparams.kernel_filename = kernel_filename;
 256         loaderparams.kernel_cmdline = kernel_cmdline;
 257         loaderparams.initrd_filename = initrd_filename;
 258         reset_info->vector = load_kernel();
 259     }
 260
 261     /* Init CPU internal devices */
 262     cpu_mips_irq_init_cpu(env);
 263     cpu_mips_clock_init(env);
 264
 265     /* The PIC is attached to the MIPS CPU INT0 pin */
 266     isa_bus = isa_bus_new(NULL, get_system_io());
 267     i8259 = i8259_init(isa_bus, env->irq[2]);
 268     isa_bus_irqs(isa_bus, i8259);
 269
 270     rtc_init(isa_bus, 2000, NULL);
 271
 272     /* Register 64 KB of ISA IO space at 0x14000000 */
 273     isa_mmio_init(0x14000000, 0x00010000);
 274     isa_mem_base = 0x10000000;
 275
 276     pit = pit_init(isa_bus, 0x40, 0, NULL);
 277
 278     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 279         if (serial_hds[i]) {
 280             serial_isa_init(isa_bus, i, serial_hds[i]);
 281         }
 282     }
 283
 284     isa_vga_init(isa_bus);
 285
 286     if (nd_table[0].used)
 287         isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
 288
 289     ide_drive_get(hd, MAX_IDE_BUS);
 290     for(i = 0; i < MAX_IDE_BUS; i++)
 291         isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
 292                      hd[MAX_IDE_DEVS * i],
 293                      hd[MAX_IDE_DEVS * i + 1]);
 294
 295     isa_create_simple(isa_bus, "i8042");
 296 }
 297
 298 static QEMUMachine mips_machine = {
 299     .name = "mips",
 300     .desc = "mips r4k platform",
 301     .init = mips_r4k_init,
 302 };
 303
 304 static void mips_machine_init(void)
 305 {
 306     qemu_register_machine(&mips_machine);
 307 }
 308
 309 machine_init(mips_machine_init);