?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Move hardcoded initialization of xen-platform device.
[qemu.git] / memory.c
blob47b005a558d216dda1c8f7c4395637e8c63b252b
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "sysemu/kvm.h"
21 #include <assert.h>
22
23 #include "exec/memory-internal.h"
24
25 //#define DEBUG_UNASSIGNED
26
27 static unsigned memory_region_transaction_depth;
28 static bool memory_region_update_pending;
29 static bool global_dirty_log = false;
30
31 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
32 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
33
34 static QTAILQ_HEAD(, AddressSpace) address_spaces
35 = QTAILQ_HEAD_INITIALIZER(address_spaces);
36
37 typedef struct AddrRange AddrRange;
38
39 /*
40 * Note using signed integers limits us to physical addresses at most
41 * 63 bits wide. They are needed for negative offsetting in aliases
42 * (large MemoryRegion::alias_offset).
43 */
44 struct AddrRange {
45 Int128 start;
46 Int128 size;
47 };
48
49 static AddrRange addrrange_make(Int128 start, Int128 size)
50 {
51 return (AddrRange) { start, size };
52 }
53
54 static bool addrrange_equal(AddrRange r1, AddrRange r2)
55 {
56 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
57 }
58
59 static Int128 addrrange_end(AddrRange r)
60 {
61 return int128_add(r.start, r.size);
62 }
63
64 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
65 {
66 int128_addto(&range.start, delta);
67 return range;
68 }
69
70 static bool addrrange_contains(AddrRange range, Int128 addr)
71 {
72 return int128_ge(addr, range.start)
73 && int128_lt(addr, addrrange_end(range));
74 }
75
76 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
77 {
78 return addrrange_contains(r1, r2.start)
79 || addrrange_contains(r2, r1.start);
80 }
81
82 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
83 {
84 Int128 start = int128_max(r1.start, r2.start);
85 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
86 return addrrange_make(start, int128_sub(end, start));
87 }
88
89 enum ListenerDirection { Forward, Reverse };
90
91 static bool memory_listener_match(MemoryListener *listener,
92 MemoryRegionSection *section)
93 {
94 return !listener->address_space_filter
95 || listener->address_space_filter == section->address_space;
96 }
97
98 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
99 do { \
100 MemoryListener *_listener; \
101 \
102 switch (_direction) { \
103 case Forward: \
104 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
105 if (_listener->_callback) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
108 } \
109 break; \
110 case Reverse: \
111 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
112 memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 default: \
119 abort(); \
120 } \
121 } while (0)
122
123 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
124 do { \
125 MemoryListener *_listener; \
126 \
127 switch (_direction) { \
128 case Forward: \
129 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
130 if (_listener->_callback \
131 && memory_listener_match(_listener, _section)) { \
132 _listener->_callback(_listener, _section, ##_args); \
133 } \
134 } \
135 break; \
136 case Reverse: \
137 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
138 memory_listeners, link) { \
139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 default: \
146 abort(); \
147 } \
148 } while (0)
149
150 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
151 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
152 .mr = (fr)->mr, \
153 .address_space = (as), \
154 .offset_within_region = (fr)->offset_in_region, \
155 .size = (fr)->addr.size, \
156 .offset_within_address_space = int128_get64((fr)->addr.start), \
157 .readonly = (fr)->readonly, \
158 }))
159
160 struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163 };
164
165 struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
169 EventNotifier *e;
170 };
171
172 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
173 MemoryRegionIoeventfd b)
174 {
175 if (int128_lt(a.addr.start, b.addr.start)) {
176 return true;
177 } else if (int128_gt(a.addr.start, b.addr.start)) {
178 return false;
179 } else if (int128_lt(a.addr.size, b.addr.size)) {
180 return true;
181 } else if (int128_gt(a.addr.size, b.addr.size)) {
182 return false;
183 } else if (a.match_data < b.match_data) {
184 return true;
185 } else if (a.match_data > b.match_data) {
186 return false;
187 } else if (a.match_data) {
188 if (a.data < b.data) {
189 return true;
190 } else if (a.data > b.data) {
191 return false;
192 }
193 }
194 if (a.e < b.e) {
195 return true;
196 } else if (a.e > b.e) {
197 return false;
198 }
199 return false;
200 }
201
202 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
203 MemoryRegionIoeventfd b)
204 {
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207 }
208
209 typedef struct FlatRange FlatRange;
210 typedef struct FlatView FlatView;
211
212 /* Range of memory in the global map. Addresses are absolute. */
213 struct FlatRange {
214 MemoryRegion *mr;
215 hwaddr offset_in_region;
216 AddrRange addr;
217 uint8_t dirty_log_mask;
218 bool romd_mode;
219 bool readonly;
220 };
221
222 /* Flattened global view of current active memory hierarchy. Kept in sorted
223 * order.
224 */
225 struct FlatView {
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229 };
230
231 typedef struct AddressSpaceOps AddressSpaceOps;
232
233 #define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
236 static bool flatrange_equal(FlatRange *a, FlatRange *b)
237 {
238 return a->mr == b->mr
239 && addrrange_equal(a->addr, b->addr)
240 && a->offset_in_region == b->offset_in_region
241 && a->romd_mode == b->romd_mode
242 && a->readonly == b->readonly;
243 }
244
245 static void flatview_init(FlatView *view)
246 {
247 view->ranges = NULL;
248 view->nr = 0;
249 view->nr_allocated = 0;
250 }
251
252 /* Insert a range into a given position. Caller is responsible for maintaining
253 * sorting order.
254 */
255 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
256 {
257 if (view->nr == view->nr_allocated) {
258 view->nr_allocated = MAX(2 * view->nr, 10);
259 view->ranges = g_realloc(view->ranges,
260 view->nr_allocated * sizeof(*view->ranges));
261 }
262 memmove(view->ranges + pos + 1, view->ranges + pos,
263 (view->nr - pos) * sizeof(FlatRange));
264 view->ranges[pos] = *range;
265 ++view->nr;
266 }
267
268 static void flatview_destroy(FlatView *view)
269 {
270 g_free(view->ranges);
271 }
272
273 static bool can_merge(FlatRange *r1, FlatRange *r2)
274 {
275 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
276 && r1->mr == r2->mr
277 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
278 r1->addr.size),
279 int128_make64(r2->offset_in_region))
280 && r1->dirty_log_mask == r2->dirty_log_mask
281 && r1->romd_mode == r2->romd_mode
282 && r1->readonly == r2->readonly;
283 }
284
285 /* Attempt to simplify a view by merging adjacent ranges */
286 static void flatview_simplify(FlatView *view)
287 {
288 unsigned i, j;
289
290 i = 0;
291 while (i < view->nr) {
292 j = i + 1;
293 while (j < view->nr
294 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
295 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
296 ++j;
297 }
298 ++i;
299 memmove(&view->ranges[i], &view->ranges[j],
300 (view->nr - j) * sizeof(view->ranges[j]));
301 view->nr -= j - i;
302 }
303 }
304
305 static void memory_region_oldmmio_read_accessor(void *opaque,
306 hwaddr addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask)
311 {
312 MemoryRegion *mr = opaque;
313 uint64_t tmp;
314
315 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
316 *value |= (tmp & mask) << shift;
317 }
318
319 static void memory_region_read_accessor(void *opaque,
320 hwaddr addr,
321 uint64_t *value,
322 unsigned size,
323 unsigned shift,
324 uint64_t mask)
325 {
326 MemoryRegion *mr = opaque;
327 uint64_t tmp;
328
329 if (mr->flush_coalesced_mmio) {
330 qemu_flush_coalesced_mmio_buffer();
331 }
332 tmp = mr->ops->read(mr->opaque, addr, size);
333 *value |= (tmp & mask) << shift;
334 }
335
336 static void memory_region_oldmmio_write_accessor(void *opaque,
337 hwaddr addr,
338 uint64_t *value,
339 unsigned size,
340 unsigned shift,
341 uint64_t mask)
342 {
343 MemoryRegion *mr = opaque;
344 uint64_t tmp;
345
346 tmp = (*value >> shift) & mask;
347 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
348 }
349
350 static void memory_region_write_accessor(void *opaque,
351 hwaddr addr,
352 uint64_t *value,
353 unsigned size,
354 unsigned shift,
355 uint64_t mask)
356 {
357 MemoryRegion *mr = opaque;
358 uint64_t tmp;
359
360 if (mr->flush_coalesced_mmio) {
361 qemu_flush_coalesced_mmio_buffer();
362 }
363 tmp = (*value >> shift) & mask;
364 mr->ops->write(mr->opaque, addr, tmp, size);
365 }
366
367 static void access_with_adjusted_size(hwaddr addr,
368 uint64_t *value,
369 unsigned size,
370 unsigned access_size_min,
371 unsigned access_size_max,
372 void (*access)(void *opaque,
373 hwaddr addr,
374 uint64_t *value,
375 unsigned size,
376 unsigned shift,
377 uint64_t mask),
378 void *opaque)
379 {
380 uint64_t access_mask;
381 unsigned access_size;
382 unsigned i;
383
384 if (!access_size_min) {
385 access_size_min = 1;
386 }
387 if (!access_size_max) {
388 access_size_max = 4;
389 }
390
391 /* FIXME: support unaligned access? */
392 access_size = MAX(MIN(size, access_size_max), access_size_min);
393 access_mask = -1ULL >> (64 - access_size * 8);
394 for (i = 0; i < size; i += access_size) {
395 #ifdef TARGET_WORDS_BIGENDIAN
396 access(opaque, addr + i, value, access_size,
397 (size - access_size - i) * 8, access_mask);
398 #else
399 access(opaque, addr + i, value, access_size, i * 8, access_mask);
400 #endif
401 }
402 }
403
404 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
405 unsigned width, bool write)
406 {
407 const MemoryRegionPortio *mrp;
408
409 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
410 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
411 && width == mrp->size
412 && (write ? (bool)mrp->write : (bool)mrp->read)) {
413 return mrp;
414 }
415 }
416 return NULL;
417 }
418
419 static void memory_region_iorange_read(IORange *iorange,
420 uint64_t offset,
421 unsigned width,
422 uint64_t *data)
423 {
424 MemoryRegionIORange *mrio
425 = container_of(iorange, MemoryRegionIORange, iorange);
426 MemoryRegion *mr = mrio->mr;
427
428 offset += mrio->offset;
429 if (mr->ops->old_portio) {
430 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
431 width, false);
432
433 *data = ((uint64_t)1 << (width * 8)) - 1;
434 if (mrp) {
435 *data = mrp->read(mr->opaque, offset);
436 } else if (width == 2) {
437 mrp = find_portio(mr, offset - mrio->offset, 1, false);
438 assert(mrp);
439 *data = mrp->read(mr->opaque, offset) |
440 (mrp->read(mr->opaque, offset + 1) << 8);
441 }
442 return;
443 }
444 *data = 0;
445 access_with_adjusted_size(offset, data, width,
446 mr->ops->impl.min_access_size,
447 mr->ops->impl.max_access_size,
448 memory_region_read_accessor, mr);
449 }
450
451 static void memory_region_iorange_write(IORange *iorange,
452 uint64_t offset,
453 unsigned width,
454 uint64_t data)
455 {
456 MemoryRegionIORange *mrio
457 = container_of(iorange, MemoryRegionIORange, iorange);
458 MemoryRegion *mr = mrio->mr;
459
460 offset += mrio->offset;
461 if (mr->ops->old_portio) {
462 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
463 width, true);
464
465 if (mrp) {
466 mrp->write(mr->opaque, offset, data);
467 } else if (width == 2) {
468 mrp = find_portio(mr, offset - mrio->offset, 1, true);
469 assert(mrp);
470 mrp->write(mr->opaque, offset, data & 0xff);
471 mrp->write(mr->opaque, offset + 1, data >> 8);
472 }
473 return;
474 }
475 access_with_adjusted_size(offset, &data, width,
476 mr->ops->impl.min_access_size,
477 mr->ops->impl.max_access_size,
478 memory_region_write_accessor, mr);
479 }
480
481 static void memory_region_iorange_destructor(IORange *iorange)
482 {
483 g_free(container_of(iorange, MemoryRegionIORange, iorange));
484 }
485
486 const IORangeOps memory_region_iorange_ops = {
487 .read = memory_region_iorange_read,
488 .write = memory_region_iorange_write,
489 .destructor = memory_region_iorange_destructor,
490 };
491
492 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
493 {
494 AddressSpace *as;
495
496 while (mr->parent) {
497 mr = mr->parent;
498 }
499 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
500 if (mr == as->root) {
501 return as;
502 }
503 }
504 abort();
505 }
506
507 /* Render a memory region into the global view. Ranges in @view obscure
508 * ranges in @mr.
509 */
510 static void render_memory_region(FlatView *view,
511 MemoryRegion *mr,
512 Int128 base,
513 AddrRange clip,
514 bool readonly)
515 {
516 MemoryRegion *subregion;
517 unsigned i;
518 hwaddr offset_in_region;
519 Int128 remain;
520 Int128 now;
521 FlatRange fr;
522 AddrRange tmp;
523
524 if (!mr->enabled) {
525 return;
526 }
527
528 int128_addto(&base, int128_make64(mr->addr));
529 readonly |= mr->readonly;
530
531 tmp = addrrange_make(base, mr->size);
532
533 if (!addrrange_intersects(tmp, clip)) {
534 return;
535 }
536
537 clip = addrrange_intersection(tmp, clip);
538
539 if (mr->alias) {
540 int128_subfrom(&base, int128_make64(mr->alias->addr));
541 int128_subfrom(&base, int128_make64(mr->alias_offset));
542 render_memory_region(view, mr->alias, base, clip, readonly);
543 return;
544 }
545
546 /* Render subregions in priority order. */
547 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
548 render_memory_region(view, subregion, base, clip, readonly);
549 }
550
551 if (!mr->terminates) {
552 return;
553 }
554
555 offset_in_region = int128_get64(int128_sub(clip.start, base));
556 base = clip.start;
557 remain = clip.size;
558
559 fr.mr = mr;
560 fr.dirty_log_mask = mr->dirty_log_mask;
561 fr.romd_mode = mr->romd_mode;
562 fr.readonly = readonly;
563
564 /* Render the region itself into any gaps left by the current view. */
565 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
566 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
567 continue;
568 }
569 if (int128_lt(base, view->ranges[i].addr.start)) {
570 now = int128_min(remain,
571 int128_sub(view->ranges[i].addr.start, base));
572 fr.offset_in_region = offset_in_region;
573 fr.addr = addrrange_make(base, now);
574 flatview_insert(view, i, &fr);
575 ++i;
576 int128_addto(&base, now);
577 offset_in_region += int128_get64(now);
578 int128_subfrom(&remain, now);
579 }
580 now = int128_sub(int128_min(int128_add(base, remain),
581 addrrange_end(view->ranges[i].addr)),
582 base);
583 int128_addto(&base, now);
584 offset_in_region += int128_get64(now);
585 int128_subfrom(&remain, now);
586 }
587 if (int128_nz(remain)) {
588 fr.offset_in_region = offset_in_region;
589 fr.addr = addrrange_make(base, remain);
590 flatview_insert(view, i, &fr);
591 }
592 }
593
594 /* Render a memory topology into a list of disjoint absolute ranges. */
595 static FlatView generate_memory_topology(MemoryRegion *mr)
596 {
597 FlatView view;
598
599 flatview_init(&view);
600
601 if (mr) {
602 render_memory_region(&view, mr, int128_zero(),
603 addrrange_make(int128_zero(), int128_2_64()), false);
604 }
605 flatview_simplify(&view);
606
607 return view;
608 }
609
610 static void address_space_add_del_ioeventfds(AddressSpace *as,
611 MemoryRegionIoeventfd *fds_new,
612 unsigned fds_new_nb,
613 MemoryRegionIoeventfd *fds_old,
614 unsigned fds_old_nb)
615 {
616 unsigned iold, inew;
617 MemoryRegionIoeventfd *fd;
618 MemoryRegionSection section;
619
620 /* Generate a symmetric difference of the old and new fd sets, adding
621 * and deleting as necessary.
622 */
623
624 iold = inew = 0;
625 while (iold < fds_old_nb || inew < fds_new_nb) {
626 if (iold < fds_old_nb
627 && (inew == fds_new_nb
628 || memory_region_ioeventfd_before(fds_old[iold],
629 fds_new[inew]))) {
630 fd = &fds_old[iold];
631 section = (MemoryRegionSection) {
632 .address_space = as,
633 .offset_within_address_space = int128_get64(fd->addr.start),
634 .size = fd->addr.size,
635 };
636 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
637 fd->match_data, fd->data, fd->e);
638 ++iold;
639 } else if (inew < fds_new_nb
640 && (iold == fds_old_nb
641 || memory_region_ioeventfd_before(fds_new[inew],
642 fds_old[iold]))) {
643 fd = &fds_new[inew];
644 section = (MemoryRegionSection) {
645 .address_space = as,
646 .offset_within_address_space = int128_get64(fd->addr.start),
647 .size = fd->addr.size,
648 };
649 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
650 fd->match_data, fd->data, fd->e);
651 ++inew;
652 } else {
653 ++iold;
654 ++inew;
655 }
656 }
657 }
658
659 static void address_space_update_ioeventfds(AddressSpace *as)
660 {
661 FlatRange *fr;
662 unsigned ioeventfd_nb = 0;
663 MemoryRegionIoeventfd *ioeventfds = NULL;
664 AddrRange tmp;
665 unsigned i;
666
667 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
668 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
669 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
670 int128_sub(fr->addr.start,
671 int128_make64(fr->offset_in_region)));
672 if (addrrange_intersects(fr->addr, tmp)) {
673 ++ioeventfd_nb;
674 ioeventfds = g_realloc(ioeventfds,
675 ioeventfd_nb * sizeof(*ioeventfds));
676 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
677 ioeventfds[ioeventfd_nb-1].addr = tmp;
678 }
679 }
680 }
681
682 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
683 as->ioeventfds, as->ioeventfd_nb);
684
685 g_free(as->ioeventfds);
686 as->ioeventfds = ioeventfds;
687 as->ioeventfd_nb = ioeventfd_nb;
688 }
689
690 static void address_space_update_topology_pass(AddressSpace *as,
691 FlatView old_view,
692 FlatView new_view,
693 bool adding)
694 {
695 unsigned iold, inew;
696 FlatRange *frold, *frnew;
697
698 /* Generate a symmetric difference of the old and new memory maps.
699 * Kill ranges in the old map, and instantiate ranges in the new map.
700 */
701 iold = inew = 0;
702 while (iold < old_view.nr || inew < new_view.nr) {
703 if (iold < old_view.nr) {
704 frold = &old_view.ranges[iold];
705 } else {
706 frold = NULL;
707 }
708 if (inew < new_view.nr) {
709 frnew = &new_view.ranges[inew];
710 } else {
711 frnew = NULL;
712 }
713
714 if (frold
715 && (!frnew
716 || int128_lt(frold->addr.start, frnew->addr.start)
717 || (int128_eq(frold->addr.start, frnew->addr.start)
718 && !flatrange_equal(frold, frnew)))) {
719 /* In old but not in new, or in both but attributes changed. */
720
721 if (!adding) {
722 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
723 }
724
725 ++iold;
726 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
727 /* In both and unchanged (except logging may have changed) */
728
729 if (adding) {
730 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
731 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
732 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
733 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
734 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
735 }
736 }
737
738 ++iold;
739 ++inew;
740 } else {
741 /* In new */
742
743 if (adding) {
744 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
745 }
746
747 ++inew;
748 }
749 }
750 }
751
752
753 static void address_space_update_topology(AddressSpace *as)
754 {
755 FlatView old_view = *as->current_map;
756 FlatView new_view = generate_memory_topology(as->root);
757
758 address_space_update_topology_pass(as, old_view, new_view, false);
759 address_space_update_topology_pass(as, old_view, new_view, true);
760
761 *as->current_map = new_view;
762 flatview_destroy(&old_view);
763 address_space_update_ioeventfds(as);
764 }
765
766 void memory_region_transaction_begin(void)
767 {
768 qemu_flush_coalesced_mmio_buffer();
769 ++memory_region_transaction_depth;
770 }
771
772 void memory_region_transaction_commit(void)
773 {
774 AddressSpace *as;
775
776 assert(memory_region_transaction_depth);
777 --memory_region_transaction_depth;
778 if (!memory_region_transaction_depth && memory_region_update_pending) {
779 memory_region_update_pending = false;
780 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
781
782 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
783 address_space_update_topology(as);
784 }
785
786 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
787 }
788 }
789
790 static void memory_region_destructor_none(MemoryRegion *mr)
791 {
792 }
793
794 static void memory_region_destructor_ram(MemoryRegion *mr)
795 {
796 qemu_ram_free(mr->ram_addr);
797 }
798
799 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
800 {
801 qemu_ram_free_from_ptr(mr->ram_addr);
802 }
803
804 static void memory_region_destructor_rom_device(MemoryRegion *mr)
805 {
806 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
807 }
808
809 static bool memory_region_wrong_endianness(MemoryRegion *mr)
810 {
811 #ifdef TARGET_WORDS_BIGENDIAN
812 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
813 #else
814 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
815 #endif
816 }
817
818 void memory_region_init(MemoryRegion *mr,
819 const char *name,
820 uint64_t size)
821 {
822 mr->ops = &unassigned_mem_ops;
823 mr->opaque = NULL;
824 mr->iommu_ops = NULL;
825 mr->parent = NULL;
826 mr->size = int128_make64(size);
827 if (size == UINT64_MAX) {
828 mr->size = int128_2_64();
829 }
830 mr->addr = 0;
831 mr->subpage = false;
832 mr->enabled = true;
833 mr->terminates = false;
834 mr->ram = false;
835 mr->romd_mode = true;
836 mr->readonly = false;
837 mr->rom_device = false;
838 mr->destructor = memory_region_destructor_none;
839 mr->priority = 0;
840 mr->may_overlap = false;
841 mr->alias = NULL;
842 QTAILQ_INIT(&mr->subregions);
843 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
844 QTAILQ_INIT(&mr->coalesced);
845 mr->name = g_strdup(name);
846 mr->dirty_log_mask = 0;
847 mr->ioeventfd_nb = 0;
848 mr->ioeventfds = NULL;
849 mr->flush_coalesced_mmio = false;
850 }
851
852 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
853 unsigned size)
854 {
855 #ifdef DEBUG_UNASSIGNED
856 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
857 #endif
858 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
859 cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size);
860 #endif
861 return 0;
862 }
863
864 static void unassigned_mem_write(void *opaque, hwaddr addr,
865 uint64_t val, unsigned size)
866 {
867 #ifdef DEBUG_UNASSIGNED
868 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
869 #endif
870 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
871 cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size);
872 #endif
873 }
874
875 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
876 unsigned size, bool is_write)
877 {
878 return false;
879 }
880
881 const MemoryRegionOps unassigned_mem_ops = {
882 .valid.accepts = unassigned_mem_accepts,
883 .endianness = DEVICE_NATIVE_ENDIAN,
884 };
885
886 bool memory_region_access_valid(MemoryRegion *mr,
887 hwaddr addr,
888 unsigned size,
889 bool is_write)
890 {
891 int access_size_min, access_size_max;
892 int access_size, i;
893
894 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
895 return false;
896 }
897
898 if (!mr->ops->valid.accepts) {
899 return true;
900 }
901
902 access_size_min = mr->ops->valid.min_access_size;
903 if (!mr->ops->valid.min_access_size) {
904 access_size_min = 1;
905 }
906
907 access_size_max = mr->ops->valid.max_access_size;
908 if (!mr->ops->valid.max_access_size) {
909 access_size_max = 4;
910 }
911
912 access_size = MAX(MIN(size, access_size_max), access_size_min);
913 for (i = 0; i < size; i += access_size) {
914 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
915 is_write)) {
916 return false;
917 }
918 }
919
920 return true;
921 }
922
923 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
924 hwaddr addr,
925 unsigned size)
926 {
927 uint64_t data = 0;
928
929 if (mr->ops->read) {
930 access_with_adjusted_size(addr, &data, size,
931 mr->ops->impl.min_access_size,
932 mr->ops->impl.max_access_size,
933 memory_region_read_accessor, mr);
934 } else {
935 access_with_adjusted_size(addr, &data, size, 1, 4,
936 memory_region_oldmmio_read_accessor, mr);
937 }
938
939 return data;
940 }
941
942 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
943 {
944 if (memory_region_wrong_endianness(mr)) {
945 switch (size) {
946 case 1:
947 break;
948 case 2:
949 *data = bswap16(*data);
950 break;
951 case 4:
952 *data = bswap32(*data);
953 break;
954 case 8:
955 *data = bswap64(*data);
956 break;
957 default:
958 abort();
959 }
960 }
961 }
962
963 static bool memory_region_dispatch_read(MemoryRegion *mr,
964 hwaddr addr,
965 uint64_t *pval,
966 unsigned size)
967 {
968 if (!memory_region_access_valid(mr, addr, size, false)) {
969 *pval = unassigned_mem_read(mr, addr, size);
970 return true;
971 }
972
973 *pval = memory_region_dispatch_read1(mr, addr, size);
974 adjust_endianness(mr, pval, size);
975 return false;
976 }
977
978 static bool memory_region_dispatch_write(MemoryRegion *mr,
979 hwaddr addr,
980 uint64_t data,
981 unsigned size)
982 {
983 if (!memory_region_access_valid(mr, addr, size, true)) {
984 unassigned_mem_write(mr, addr, data, size);
985 return true;
986 }
987
988 adjust_endianness(mr, &data, size);
989
990 if (mr->ops->write) {
991 access_with_adjusted_size(addr, &data, size,
992 mr->ops->impl.min_access_size,
993 mr->ops->impl.max_access_size,
994 memory_region_write_accessor, mr);
995 } else {
996 access_with_adjusted_size(addr, &data, size, 1, 4,
997 memory_region_oldmmio_write_accessor, mr);
998 }
999 return false;
1000 }
1001
1002 void memory_region_init_io(MemoryRegion *mr,
1003 const MemoryRegionOps *ops,
1004 void *opaque,
1005 const char *name,
1006 uint64_t size)
1007 {
1008 memory_region_init(mr, name, size);
1009 mr->ops = ops;
1010 mr->opaque = opaque;
1011 mr->terminates = true;
1012 mr->ram_addr = ~(ram_addr_t)0;
1013 }
1014
1015 void memory_region_init_ram(MemoryRegion *mr,
1016 const char *name,
1017 uint64_t size)
1018 {
1019 memory_region_init(mr, name, size);
1020 mr->ram = true;
1021 mr->terminates = true;
1022 mr->destructor = memory_region_destructor_ram;
1023 mr->ram_addr = qemu_ram_alloc(size, mr);
1024 }
1025
1026 void memory_region_init_ram_ptr(MemoryRegion *mr,
1027 const char *name,
1028 uint64_t size,
1029 void *ptr)
1030 {
1031 memory_region_init(mr, name, size);
1032 mr->ram = true;
1033 mr->terminates = true;
1034 mr->destructor = memory_region_destructor_ram_from_ptr;
1035 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1036 }
1037
1038 void memory_region_init_alias(MemoryRegion *mr,
1039 const char *name,
1040 MemoryRegion *orig,
1041 hwaddr offset,
1042 uint64_t size)
1043 {
1044 memory_region_init(mr, name, size);
1045 mr->alias = orig;
1046 mr->alias_offset = offset;
1047 }
1048
1049 void memory_region_init_rom_device(MemoryRegion *mr,
1050 const MemoryRegionOps *ops,
1051 void *opaque,
1052 const char *name,
1053 uint64_t size)
1054 {
1055 memory_region_init(mr, name, size);
1056 mr->ops = ops;
1057 mr->opaque = opaque;
1058 mr->terminates = true;
1059 mr->rom_device = true;
1060 mr->destructor = memory_region_destructor_rom_device;
1061 mr->ram_addr = qemu_ram_alloc(size, mr);
1062 }
1063
1064 void memory_region_init_iommu(MemoryRegion *mr,
1065 const MemoryRegionIOMMUOps *ops,
1066 const char *name,
1067 uint64_t size)
1068 {
1069 memory_region_init(mr, name, size);
1070 mr->iommu_ops = ops,
1071 mr->terminates = true; /* then re-forwards */
1072 notifier_list_init(&mr->iommu_notify);
1073 }
1074
1075 void memory_region_init_reservation(MemoryRegion *mr,
1076 const char *name,
1077 uint64_t size)
1078 {
1079 memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
1080 }
1081
1082 void memory_region_destroy(MemoryRegion *mr)
1083 {
1084 assert(QTAILQ_EMPTY(&mr->subregions));
1085 assert(memory_region_transaction_depth == 0);
1086 mr->destructor(mr);
1087 memory_region_clear_coalescing(mr);
1088 g_free((char *)mr->name);
1089 g_free(mr->ioeventfds);
1090 }
1091
1092 uint64_t memory_region_size(MemoryRegion *mr)
1093 {
1094 if (int128_eq(mr->size, int128_2_64())) {
1095 return UINT64_MAX;
1096 }
1097 return int128_get64(mr->size);
1098 }
1099
1100 const char *memory_region_name(MemoryRegion *mr)
1101 {
1102 return mr->name;
1103 }
1104
1105 bool memory_region_is_ram(MemoryRegion *mr)
1106 {
1107 return mr->ram;
1108 }
1109
1110 bool memory_region_is_logging(MemoryRegion *mr)
1111 {
1112 return mr->dirty_log_mask;
1113 }
1114
1115 bool memory_region_is_rom(MemoryRegion *mr)
1116 {
1117 return mr->ram && mr->readonly;
1118 }
1119
1120 bool memory_region_is_iommu(MemoryRegion *mr)
1121 {
1122 return mr->iommu_ops;
1123 }
1124
1125 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1126 {
1127 notifier_list_add(&mr->iommu_notify, n);
1128 }
1129
1130 void memory_region_unregister_iommu_notifier(Notifier *n)
1131 {
1132 notifier_remove(n);
1133 }
1134
1135 void memory_region_notify_iommu(MemoryRegion *mr,
1136 IOMMUTLBEntry entry)
1137 {
1138 assert(memory_region_is_iommu(mr));
1139 notifier_list_notify(&mr->iommu_notify, &entry);
1140 }
1141
1142 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1143 {
1144 uint8_t mask = 1 << client;
1145
1146 memory_region_transaction_begin();
1147 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1148 memory_region_update_pending |= mr->enabled;
1149 memory_region_transaction_commit();
1150 }
1151
1152 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1153 hwaddr size, unsigned client)
1154 {
1155 assert(mr->terminates);
1156 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1157 1 << client);
1158 }
1159
1160 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1161 hwaddr size)
1162 {
1163 assert(mr->terminates);
1164 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1165 }
1166
1167 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1168 hwaddr size, unsigned client)
1169 {
1170 bool ret;
1171 assert(mr->terminates);
1172 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1173 1 << client);
1174 if (ret) {
1175 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1176 mr->ram_addr + addr + size,
1177 1 << client);
1178 }
1179 return ret;
1180 }
1181
1182
1183 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1184 {
1185 AddressSpace *as;
1186 FlatRange *fr;
1187
1188 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1189 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1190 if (fr->mr == mr) {
1191 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1192 }
1193 }
1194 }
1195 }
1196
1197 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1198 {
1199 if (mr->readonly != readonly) {
1200 memory_region_transaction_begin();
1201 mr->readonly = readonly;
1202 memory_region_update_pending |= mr->enabled;
1203 memory_region_transaction_commit();
1204 }
1205 }
1206
1207 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1208 {
1209 if (mr->romd_mode != romd_mode) {
1210 memory_region_transaction_begin();
1211 mr->romd_mode = romd_mode;
1212 memory_region_update_pending |= mr->enabled;
1213 memory_region_transaction_commit();
1214 }
1215 }
1216
1217 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1218 hwaddr size, unsigned client)
1219 {
1220 assert(mr->terminates);
1221 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1222 mr->ram_addr + addr + size,
1223 1 << client);
1224 }
1225
1226 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1227 {
1228 if (mr->alias) {
1229 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1230 }
1231
1232 assert(mr->terminates);
1233
1234 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1235 }
1236
1237 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1238 {
1239 FlatRange *fr;
1240 CoalescedMemoryRange *cmr;
1241 AddrRange tmp;
1242 MemoryRegionSection section;
1243
1244 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1245 if (fr->mr == mr) {
1246 section = (MemoryRegionSection) {
1247 .address_space = as,
1248 .offset_within_address_space = int128_get64(fr->addr.start),
1249 .size = fr->addr.size,
1250 };
1251
1252 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1253 int128_get64(fr->addr.start),
1254 int128_get64(fr->addr.size));
1255 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1256 tmp = addrrange_shift(cmr->addr,
1257 int128_sub(fr->addr.start,
1258 int128_make64(fr->offset_in_region)));
1259 if (!addrrange_intersects(tmp, fr->addr)) {
1260 continue;
1261 }
1262 tmp = addrrange_intersection(tmp, fr->addr);
1263 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1264 int128_get64(tmp.start),
1265 int128_get64(tmp.size));
1266 }
1267 }
1268 }
1269 }
1270
1271 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1272 {
1273 AddressSpace *as;
1274
1275 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1276 memory_region_update_coalesced_range_as(mr, as);
1277 }
1278 }
1279
1280 void memory_region_set_coalescing(MemoryRegion *mr)
1281 {
1282 memory_region_clear_coalescing(mr);
1283 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1284 }
1285
1286 void memory_region_add_coalescing(MemoryRegion *mr,
1287 hwaddr offset,
1288 uint64_t size)
1289 {
1290 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1291
1292 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1293 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1294 memory_region_update_coalesced_range(mr);
1295 memory_region_set_flush_coalesced(mr);
1296 }
1297
1298 void memory_region_clear_coalescing(MemoryRegion *mr)
1299 {
1300 CoalescedMemoryRange *cmr;
1301
1302 qemu_flush_coalesced_mmio_buffer();
1303 mr->flush_coalesced_mmio = false;
1304
1305 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1306 cmr = QTAILQ_FIRST(&mr->coalesced);
1307 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1308 g_free(cmr);
1309 }
1310 memory_region_update_coalesced_range(mr);
1311 }
1312
1313 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1314 {
1315 mr->flush_coalesced_mmio = true;
1316 }
1317
1318 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1319 {
1320 qemu_flush_coalesced_mmio_buffer();
1321 if (QTAILQ_EMPTY(&mr->coalesced)) {
1322 mr->flush_coalesced_mmio = false;
1323 }
1324 }
1325
1326 void memory_region_add_eventfd(MemoryRegion *mr,
1327 hwaddr addr,
1328 unsigned size,
1329 bool match_data,
1330 uint64_t data,
1331 EventNotifier *e)
1332 {
1333 MemoryRegionIoeventfd mrfd = {
1334 .addr.start = int128_make64(addr),
1335 .addr.size = int128_make64(size),
1336 .match_data = match_data,
1337 .data = data,
1338 .e = e,
1339 };
1340 unsigned i;
1341
1342 adjust_endianness(mr, &mrfd.data, size);
1343 memory_region_transaction_begin();
1344 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1345 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1346 break;
1347 }
1348 }
1349 ++mr->ioeventfd_nb;
1350 mr->ioeventfds = g_realloc(mr->ioeventfds,
1351 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1352 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1353 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1354 mr->ioeventfds[i] = mrfd;
1355 memory_region_update_pending |= mr->enabled;
1356 memory_region_transaction_commit();
1357 }
1358
1359 void memory_region_del_eventfd(MemoryRegion *mr,
1360 hwaddr addr,
1361 unsigned size,
1362 bool match_data,
1363 uint64_t data,
1364 EventNotifier *e)
1365 {
1366 MemoryRegionIoeventfd mrfd = {
1367 .addr.start = int128_make64(addr),
1368 .addr.size = int128_make64(size),
1369 .match_data = match_data,
1370 .data = data,
1371 .e = e,
1372 };
1373 unsigned i;
1374
1375 adjust_endianness(mr, &mrfd.data, size);
1376 memory_region_transaction_begin();
1377 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1378 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1379 break;
1380 }
1381 }
1382 assert(i != mr->ioeventfd_nb);
1383 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1384 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1385 --mr->ioeventfd_nb;
1386 mr->ioeventfds = g_realloc(mr->ioeventfds,
1387 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1388 memory_region_update_pending |= mr->enabled;
1389 memory_region_transaction_commit();
1390 }
1391
1392 static void memory_region_add_subregion_common(MemoryRegion *mr,
1393 hwaddr offset,
1394 MemoryRegion *subregion)
1395 {
1396 MemoryRegion *other;
1397
1398 memory_region_transaction_begin();
1399
1400 assert(!subregion->parent);
1401 subregion->parent = mr;
1402 subregion->addr = offset;
1403 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1404 if (subregion->may_overlap || other->may_overlap) {
1405 continue;
1406 }
1407 if (int128_ge(int128_make64(offset),
1408 int128_add(int128_make64(other->addr), other->size))
1409 || int128_le(int128_add(int128_make64(offset), subregion->size),
1410 int128_make64(other->addr))) {
1411 continue;
1412 }
1413 #if 0
1414 printf("warning: subregion collision %llx/%llx (%s) "
1415 "vs %llx/%llx (%s)\n",
1416 (unsigned long long)offset,
1417 (unsigned long long)int128_get64(subregion->size),
1418 subregion->name,
1419 (unsigned long long)other->addr,
1420 (unsigned long long)int128_get64(other->size),
1421 other->name);
1422 #endif
1423 }
1424 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1425 if (subregion->priority >= other->priority) {
1426 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1427 goto done;
1428 }
1429 }
1430 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1431 done:
1432 memory_region_update_pending |= mr->enabled && subregion->enabled;
1433 memory_region_transaction_commit();
1434 }
1435
1436
1437 void memory_region_add_subregion(MemoryRegion *mr,
1438 hwaddr offset,
1439 MemoryRegion *subregion)
1440 {
1441 subregion->may_overlap = false;
1442 subregion->priority = 0;
1443 memory_region_add_subregion_common(mr, offset, subregion);
1444 }
1445
1446 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1447 hwaddr offset,
1448 MemoryRegion *subregion,
1449 unsigned priority)
1450 {
1451 subregion->may_overlap = true;
1452 subregion->priority = priority;
1453 memory_region_add_subregion_common(mr, offset, subregion);
1454 }
1455
1456 void memory_region_del_subregion(MemoryRegion *mr,
1457 MemoryRegion *subregion)
1458 {
1459 memory_region_transaction_begin();
1460 assert(subregion->parent == mr);
1461 subregion->parent = NULL;
1462 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1463 memory_region_update_pending |= mr->enabled && subregion->enabled;
1464 memory_region_transaction_commit();
1465 }
1466
1467 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1468 {
1469 if (enabled == mr->enabled) {
1470 return;
1471 }
1472 memory_region_transaction_begin();
1473 mr->enabled = enabled;
1474 memory_region_update_pending = true;
1475 memory_region_transaction_commit();
1476 }
1477
1478 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1479 {
1480 MemoryRegion *parent = mr->parent;
1481 unsigned priority = mr->priority;
1482 bool may_overlap = mr->may_overlap;
1483
1484 if (addr == mr->addr || !parent) {
1485 mr->addr = addr;
1486 return;
1487 }
1488
1489 memory_region_transaction_begin();
1490 memory_region_del_subregion(parent, mr);
1491 if (may_overlap) {
1492 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1493 } else {
1494 memory_region_add_subregion(parent, addr, mr);
1495 }
1496 memory_region_transaction_commit();
1497 }
1498
1499 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1500 {
1501 assert(mr->alias);
1502
1503 if (offset == mr->alias_offset) {
1504 return;
1505 }
1506
1507 memory_region_transaction_begin();
1508 mr->alias_offset = offset;
1509 memory_region_update_pending |= mr->enabled;
1510 memory_region_transaction_commit();
1511 }
1512
1513 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1514 {
1515 return mr->ram_addr;
1516 }
1517
1518 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1519 {
1520 const AddrRange *addr = addr_;
1521 const FlatRange *fr = fr_;
1522
1523 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1524 return -1;
1525 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1526 return 1;
1527 }
1528 return 0;
1529 }
1530
1531 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1532 {
1533 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1534 sizeof(FlatRange), cmp_flatrange_addr);
1535 }
1536
1537 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1538 hwaddr addr, uint64_t size)
1539 {
1540 MemoryRegionSection ret = { .mr = NULL };
1541 MemoryRegion *root;
1542 AddressSpace *as;
1543 AddrRange range;
1544 FlatRange *fr;
1545
1546 addr += mr->addr;
1547 for (root = mr; root->parent; ) {
1548 root = root->parent;
1549 addr += root->addr;
1550 }
1551
1552 as = memory_region_to_address_space(root);
1553 range = addrrange_make(int128_make64(addr), int128_make64(size));
1554 fr = address_space_lookup(as, range);
1555 if (!fr) {
1556 return ret;
1557 }
1558
1559 while (fr > as->current_map->ranges
1560 && addrrange_intersects(fr[-1].addr, range)) {
1561 --fr;
1562 }
1563
1564 ret.mr = fr->mr;
1565 ret.address_space = as;
1566 range = addrrange_intersection(range, fr->addr);
1567 ret.offset_within_region = fr->offset_in_region;
1568 ret.offset_within_region += int128_get64(int128_sub(range.start,
1569 fr->addr.start));
1570 ret.size = range.size;
1571 ret.offset_within_address_space = int128_get64(range.start);
1572 ret.readonly = fr->readonly;
1573 return ret;
1574 }
1575
1576 void address_space_sync_dirty_bitmap(AddressSpace *as)
1577 {
1578 FlatRange *fr;
1579
1580 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1581 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1582 }
1583 }
1584
1585 void memory_global_dirty_log_start(void)
1586 {
1587 global_dirty_log = true;
1588 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1589 }
1590
1591 void memory_global_dirty_log_stop(void)
1592 {
1593 global_dirty_log = false;
1594 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1595 }
1596
1597 static void listener_add_address_space(MemoryListener *listener,
1598 AddressSpace *as)
1599 {
1600 FlatRange *fr;
1601
1602 if (listener->address_space_filter
1603 && listener->address_space_filter != as) {
1604 return;
1605 }
1606
1607 if (global_dirty_log) {
1608 if (listener->log_global_start) {
1609 listener->log_global_start(listener);
1610 }
1611 }
1612
1613 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1614 MemoryRegionSection section = {
1615 .mr = fr->mr,
1616 .address_space = as,
1617 .offset_within_region = fr->offset_in_region,
1618 .size = fr->addr.size,
1619 .offset_within_address_space = int128_get64(fr->addr.start),
1620 .readonly = fr->readonly,
1621 };
1622 if (listener->region_add) {
1623 listener->region_add(listener, &section);
1624 }
1625 }
1626 }
1627
1628 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1629 {
1630 MemoryListener *other = NULL;
1631 AddressSpace *as;
1632
1633 listener->address_space_filter = filter;
1634 if (QTAILQ_EMPTY(&memory_listeners)
1635 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1636 memory_listeners)->priority) {
1637 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1638 } else {
1639 QTAILQ_FOREACH(other, &memory_listeners, link) {
1640 if (listener->priority < other->priority) {
1641 break;
1642 }
1643 }
1644 QTAILQ_INSERT_BEFORE(other, listener, link);
1645 }
1646
1647 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1648 listener_add_address_space(listener, as);
1649 }
1650 }
1651
1652 void memory_listener_unregister(MemoryListener *listener)
1653 {
1654 QTAILQ_REMOVE(&memory_listeners, listener, link);
1655 }
1656
1657 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1658 {
1659 memory_region_transaction_begin();
1660 as->root = root;
1661 as->current_map = g_new(FlatView, 1);
1662 flatview_init(as->current_map);
1663 as->ioeventfd_nb = 0;
1664 as->ioeventfds = NULL;
1665 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1666 as->name = g_strdup(name ? name : "anonymous");
1667 address_space_init_dispatch(as);
1668 memory_region_update_pending |= root->enabled;
1669 memory_region_transaction_commit();
1670 }
1671
1672 void address_space_destroy(AddressSpace *as)
1673 {
1674 /* Flush out anything from MemoryListeners listening in on this */
1675 memory_region_transaction_begin();
1676 as->root = NULL;
1677 memory_region_transaction_commit();
1678 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1679 address_space_destroy_dispatch(as);
1680 flatview_destroy(as->current_map);
1681 g_free(as->name);
1682 g_free(as->current_map);
1683 g_free(as->ioeventfds);
1684 }
1685
1686 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1687 {
1688 return memory_region_dispatch_read(mr, addr, pval, size);
1689 }
1690
1691 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1692 uint64_t val, unsigned size)
1693 {
1694 return memory_region_dispatch_write(mr, addr, val, size);
1695 }
1696
1697 typedef struct MemoryRegionList MemoryRegionList;
1698
1699 struct MemoryRegionList {
1700 const MemoryRegion *mr;
1701 bool printed;
1702 QTAILQ_ENTRY(MemoryRegionList) queue;
1703 };
1704
1705 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1706
1707 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1708 const MemoryRegion *mr, unsigned int level,
1709 hwaddr base,
1710 MemoryRegionListHead *alias_print_queue)
1711 {
1712 MemoryRegionList *new_ml, *ml, *next_ml;
1713 MemoryRegionListHead submr_print_queue;
1714 const MemoryRegion *submr;
1715 unsigned int i;
1716
1717 if (!mr || !mr->enabled) {
1718 return;
1719 }
1720
1721 for (i = 0; i < level; i++) {
1722 mon_printf(f, " ");
1723 }
1724
1725 if (mr->alias) {
1726 MemoryRegionList *ml;
1727 bool found = false;
1728
1729 /* check if the alias is already in the queue */
1730 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1731 if (ml->mr == mr->alias && !ml->printed) {
1732 found = true;
1733 }
1734 }
1735
1736 if (!found) {
1737 ml = g_new(MemoryRegionList, 1);
1738 ml->mr = mr->alias;
1739 ml->printed = false;
1740 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1741 }
1742 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1743 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1744 "-" TARGET_FMT_plx "\n",
1745 base + mr->addr,
1746 base + mr->addr
1747 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1748 mr->priority,
1749 mr->romd_mode ? 'R' : '-',
1750 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1751 : '-',
1752 mr->name,
1753 mr->alias->name,
1754 mr->alias_offset,
1755 mr->alias_offset
1756 + (hwaddr)int128_get64(mr->size) - 1);
1757 } else {
1758 mon_printf(f,
1759 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1760 base + mr->addr,
1761 base + mr->addr
1762 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1763 mr->priority,
1764 mr->romd_mode ? 'R' : '-',
1765 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1766 : '-',
1767 mr->name);
1768 }
1769
1770 QTAILQ_INIT(&submr_print_queue);
1771
1772 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1773 new_ml = g_new(MemoryRegionList, 1);
1774 new_ml->mr = submr;
1775 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1776 if (new_ml->mr->addr < ml->mr->addr ||
1777 (new_ml->mr->addr == ml->mr->addr &&
1778 new_ml->mr->priority > ml->mr->priority)) {
1779 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1780 new_ml = NULL;
1781 break;
1782 }
1783 }
1784 if (new_ml) {
1785 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1786 }
1787 }
1788
1789 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1790 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1791 alias_print_queue);
1792 }
1793
1794 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1795 g_free(ml);
1796 }
1797 }
1798
1799 void mtree_info(fprintf_function mon_printf, void *f)
1800 {
1801 MemoryRegionListHead ml_head;
1802 MemoryRegionList *ml, *ml2;
1803 AddressSpace *as;
1804
1805 QTAILQ_INIT(&ml_head);
1806
1807 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1808 mon_printf(f, "%s\n", as->name);
1809 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1810 }
1811
1812 mon_printf(f, "aliases\n");
1813 /* print aliased regions */
1814 QTAILQ_FOREACH(ml, &ml_head, queue) {
1815 if (!ml->printed) {
1816 mon_printf(f, "%s\n", ml->mr->name);
1817 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1818 }
1819 }
1820
1821 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1822 g_free(ml);
1823 }
1824 }
QEmu