Implement hcall based RTAS for pSeries machines
[qemu.git] / hw / spapr.c
blobc07af1954331b3b1a3a55273df2bd0a4562bc10e
1 /*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
27 #include "sysemu.h"
28 #include "hw.h"
29 #include "elf.h"
31 #include "hw/boards.h"
32 #include "hw/ppc.h"
33 #include "hw/loader.h"
35 #include "hw/spapr.h"
36 #include "hw/spapr_vio.h"
38 #include <libfdt.h>
40 #define KERNEL_LOAD_ADDR 0x00000000
41 #define INITRD_LOAD_ADDR 0x02800000
42 #define FDT_MAX_SIZE 0x10000
43 #define RTAS_MAX_SIZE 0x10000
45 #define TIMEBASE_FREQ 512000000ULL
47 #define MAX_CPUS 32
49 sPAPREnvironment *spapr;
51 static void *spapr_create_fdt(int *fdt_size, ram_addr_t ramsize,
52 const char *cpu_model, CPUState *envs[],
53 sPAPREnvironment *spapr,
54 target_phys_addr_t initrd_base,
55 target_phys_addr_t initrd_size,
56 const char *kernel_cmdline,
57 target_phys_addr_t rtas_addr,
58 target_phys_addr_t rtas_size,
59 long hash_shift)
61 void *fdt;
62 uint64_t mem_reg_property[] = { 0, cpu_to_be64(ramsize) };
63 uint32_t start_prop = cpu_to_be32(initrd_base);
64 uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
65 uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
66 char hypertas_prop[] = "hcall-pft\0hcall-term";
67 int i;
68 char *modelname;
69 int ret;
71 #define _FDT(exp) \
72 do { \
73 int ret = (exp); \
74 if (ret < 0) { \
75 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
76 #exp, fdt_strerror(ret)); \
77 exit(1); \
78 } \
79 } while (0)
81 fdt = qemu_mallocz(FDT_MAX_SIZE);
82 _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
84 _FDT((fdt_finish_reservemap(fdt)));
86 /* Root node */
87 _FDT((fdt_begin_node(fdt, "")));
88 _FDT((fdt_property_string(fdt, "device_type", "chrp")));
89 _FDT((fdt_property_string(fdt, "model", "qemu,emulated-pSeries-LPAR")));
91 _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
92 _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
94 /* /chosen */
95 _FDT((fdt_begin_node(fdt, "chosen")));
97 _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
98 _FDT((fdt_property(fdt, "linux,initrd-start",
99 &start_prop, sizeof(start_prop))));
100 _FDT((fdt_property(fdt, "linux,initrd-end",
101 &end_prop, sizeof(end_prop))));
103 _FDT((fdt_end_node(fdt)));
105 /* memory node */
106 _FDT((fdt_begin_node(fdt, "memory@0")));
108 _FDT((fdt_property_string(fdt, "device_type", "memory")));
109 _FDT((fdt_property(fdt, "reg",
110 mem_reg_property, sizeof(mem_reg_property))));
112 _FDT((fdt_end_node(fdt)));
114 /* cpus */
115 _FDT((fdt_begin_node(fdt, "cpus")));
117 _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
118 _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
120 modelname = qemu_strdup(cpu_model);
122 for (i = 0; i < strlen(modelname); i++) {
123 modelname[i] = toupper(modelname[i]);
126 for (i = 0; i < smp_cpus; i++) {
127 CPUState *env = envs[i];
128 char *nodename;
129 uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
130 0xffffffff, 0xffffffff};
132 if (asprintf(&nodename, "%s@%x", modelname, i) < 0) {
133 fprintf(stderr, "Allocation failure\n");
134 exit(1);
137 _FDT((fdt_begin_node(fdt, nodename)));
139 free(nodename);
141 _FDT((fdt_property_cell(fdt, "reg", i)));
142 _FDT((fdt_property_string(fdt, "device_type", "cpu")));
144 _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
145 _FDT((fdt_property_cell(fdt, "dcache-block-size",
146 env->dcache_line_size)));
147 _FDT((fdt_property_cell(fdt, "icache-block-size",
148 env->icache_line_size)));
149 _FDT((fdt_property_cell(fdt, "timebase-frequency", TIMEBASE_FREQ)));
150 /* Hardcode CPU frequency for now. It's kind of arbitrary on
151 * full emu, for kvm we should copy it from the host */
152 _FDT((fdt_property_cell(fdt, "clock-frequency", 1000000000)));
153 _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
154 _FDT((fdt_property(fdt, "ibm,pft-size",
155 pft_size_prop, sizeof(pft_size_prop))));
156 _FDT((fdt_property_string(fdt, "status", "okay")));
157 _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
159 if (envs[i]->mmu_model & POWERPC_MMU_1TSEG) {
160 _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
161 segs, sizeof(segs))));
164 _FDT((fdt_end_node(fdt)));
167 qemu_free(modelname);
169 _FDT((fdt_end_node(fdt)));
171 /* RTAS */
172 _FDT((fdt_begin_node(fdt, "rtas")));
174 _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
175 sizeof(hypertas_prop))));
177 _FDT((fdt_end_node(fdt)));
179 /* vdevice */
180 _FDT((fdt_begin_node(fdt, "vdevice")));
182 _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
183 _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
184 _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
185 _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
187 _FDT((fdt_end_node(fdt)));
189 _FDT((fdt_end_node(fdt))); /* close root node */
190 _FDT((fdt_finish(fdt)));
192 /* re-expand to allow for further tweaks */
193 _FDT((fdt_open_into(fdt, fdt, FDT_MAX_SIZE)));
195 ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
196 if (ret < 0) {
197 fprintf(stderr, "couldn't setup vio devices in fdt\n");
198 exit(1);
201 /* RTAS */
202 ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
203 if (ret < 0) {
204 fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
207 _FDT((fdt_pack(fdt)));
209 *fdt_size = fdt_totalsize(fdt);
211 return fdt;
214 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
216 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
219 static void emulate_spapr_hypercall(CPUState *env)
221 env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
224 /* pSeries LPAR / sPAPR hardware init */
225 static void ppc_spapr_init(ram_addr_t ram_size,
226 const char *boot_device,
227 const char *kernel_filename,
228 const char *kernel_cmdline,
229 const char *initrd_filename,
230 const char *cpu_model)
232 CPUState *envs[MAX_CPUS];
233 void *fdt, *htab;
234 int i;
235 ram_addr_t ram_offset;
236 target_phys_addr_t fdt_addr, rtas_addr;
237 uint32_t kernel_base, initrd_base;
238 long kernel_size, initrd_size, htab_size, rtas_size;
239 long pteg_shift = 17;
240 int fdt_size;
241 char *filename;
243 spapr = qemu_malloc(sizeof(*spapr));
244 cpu_ppc_hypercall = emulate_spapr_hypercall;
246 /* We place the device tree just below either the top of RAM, or
247 * 2GB, so that it can be processed with 32-bit code if
248 * necessary */
249 fdt_addr = MIN(ram_size, 0x80000000) - FDT_MAX_SIZE;
250 /* RTAS goes just below that */
251 rtas_addr = fdt_addr - RTAS_MAX_SIZE;
253 /* init CPUs */
254 if (cpu_model == NULL) {
255 cpu_model = "POWER7";
257 for (i = 0; i < smp_cpus; i++) {
258 CPUState *env = cpu_init(cpu_model);
260 if (!env) {
261 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
262 exit(1);
264 /* Set time-base frequency to 512 MHz */
265 cpu_ppc_tb_init(env, TIMEBASE_FREQ);
266 qemu_register_reset((QEMUResetHandler *)&cpu_reset, env);
268 env->hreset_vector = 0x60;
269 env->hreset_excp_prefix = 0;
270 env->gpr[3] = i;
272 envs[i] = env;
275 /* allocate RAM */
276 ram_offset = qemu_ram_alloc(NULL, "ppc_spapr.ram", ram_size);
277 cpu_register_physical_memory(0, ram_size, ram_offset);
279 /* allocate hash page table. For now we always make this 16mb,
280 * later we should probably make it scale to the size of guest
281 * RAM */
282 htab_size = 1ULL << (pteg_shift + 7);
283 htab = qemu_mallocz(htab_size);
285 for (i = 0; i < smp_cpus; i++) {
286 envs[i]->external_htab = htab;
287 envs[i]->htab_base = -1;
288 envs[i]->htab_mask = htab_size - 1;
291 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
292 rtas_size = load_image_targphys(filename, rtas_addr, ram_size - rtas_addr);
293 if (rtas_size < 0) {
294 hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
295 exit(1);
297 qemu_free(filename);
299 spapr->vio_bus = spapr_vio_bus_init();
301 for (i = 0; i < MAX_SERIAL_PORTS; i++) {
302 if (serial_hds[i]) {
303 spapr_vty_create(spapr->vio_bus, i, serial_hds[i]);
307 if (kernel_filename) {
308 uint64_t lowaddr = 0;
310 kernel_base = KERNEL_LOAD_ADDR;
312 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
313 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
314 if (kernel_size < 0) {
315 kernel_size = load_image_targphys(kernel_filename, kernel_base,
316 ram_size - kernel_base);
318 if (kernel_size < 0) {
319 fprintf(stderr, "qemu: could not load kernel '%s'\n",
320 kernel_filename);
321 exit(1);
324 /* load initrd */
325 if (initrd_filename) {
326 initrd_base = INITRD_LOAD_ADDR;
327 initrd_size = load_image_targphys(initrd_filename, initrd_base,
328 ram_size - initrd_base);
329 if (initrd_size < 0) {
330 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
331 initrd_filename);
332 exit(1);
334 } else {
335 initrd_base = 0;
336 initrd_size = 0;
338 } else {
339 fprintf(stderr, "pSeries machine needs -kernel for now");
340 exit(1);
343 /* Prepare the device tree */
344 fdt = spapr_create_fdt(&fdt_size, ram_size, cpu_model, envs, spapr,
345 initrd_base, initrd_size, kernel_cmdline,
346 rtas_addr, rtas_size, pteg_shift + 7);
347 assert(fdt != NULL);
349 cpu_physical_memory_write(fdt_addr, fdt, fdt_size);
351 qemu_free(fdt);
353 envs[0]->gpr[3] = fdt_addr;
354 envs[0]->gpr[5] = 0;
355 envs[0]->hreset_vector = kernel_base;
358 static QEMUMachine spapr_machine = {
359 .name = "pseries",
360 .desc = "pSeries Logical Partition (PAPR compliant)",
361 .init = ppc_spapr_init,
362 .max_cpus = MAX_CPUS,
363 .no_vga = 1,
364 .no_parallel = 1,
367 static void spapr_machine_init(void)
369 qemu_register_machine(&spapr_machine);
372 machine_init(spapr_machine_init);