hw/core: Introduce QEMU machine as QOM object
[qemu.git] / hw / xen / xen_platform.c
blob1d9d0e9f258a4e7a3154f221fdacc34decf824c8
1 /*
2 * XEN platform pci device, formerly known as the event channel device
4 * Copyright (c) 2003-2004 Intel Corp.
5 * Copyright (c) 2006 XenSource
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
26 #include <assert.h>
28 #include "hw/hw.h"
29 #include "hw/i386/pc.h"
30 #include "hw/ide.h"
31 #include "hw/pci/pci.h"
32 #include "hw/irq.h"
33 #include "hw/xen/xen_common.h"
34 #include "hw/xen/xen_backend.h"
35 #include "trace.h"
36 #include "exec/address-spaces.h"
38 #include <xenguest.h>
40 //#define DEBUG_PLATFORM
42 #ifdef DEBUG_PLATFORM
43 #define DPRINTF(fmt, ...) do { \
44 fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
45 } while (0)
46 #else
47 #define DPRINTF(fmt, ...) do { } while (0)
48 #endif
50 #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
52 typedef struct PCIXenPlatformState {
53 /*< private >*/
54 PCIDevice parent_obj;
55 /*< public >*/
57 MemoryRegion fixed_io;
58 MemoryRegion bar;
59 MemoryRegion mmio_bar;
60 uint8_t flags; /* used only for version_id == 2 */
61 int drivers_blacklisted;
62 uint16_t driver_product_version;
64 /* Log from guest drivers */
65 char log_buffer[4096];
66 int log_buffer_off;
67 } PCIXenPlatformState;
69 #define TYPE_XEN_PLATFORM "xen-platform"
70 #define XEN_PLATFORM(obj) \
71 OBJECT_CHECK(PCIXenPlatformState, (obj), TYPE_XEN_PLATFORM)
73 #define XEN_PLATFORM_IOPORT 0x10
75 /* Send bytes to syslog */
76 static void log_writeb(PCIXenPlatformState *s, char val)
78 if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
79 /* Flush buffer */
80 s->log_buffer[s->log_buffer_off] = 0;
81 trace_xen_platform_log(s->log_buffer);
82 s->log_buffer_off = 0;
83 } else {
84 s->log_buffer[s->log_buffer_off++] = val;
88 /* Xen Platform, Fixed IOPort */
89 #define UNPLUG_ALL_IDE_DISKS 1
90 #define UNPLUG_ALL_NICS 2
91 #define UNPLUG_AUX_IDE_DISKS 4
93 static void unplug_nic(PCIBus *b, PCIDevice *d, void *o)
95 /* We have to ignore passthrough devices */
96 if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
97 PCI_CLASS_NETWORK_ETHERNET
98 && strcmp(d->name, "xen-pci-passthrough") != 0) {
99 object_unparent(OBJECT(d));
103 static void pci_unplug_nics(PCIBus *bus)
105 pci_for_each_device(bus, 0, unplug_nic, NULL);
108 static void unplug_disks(PCIBus *b, PCIDevice *d, void *o)
110 /* We have to ignore passthrough devices */
111 if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
112 PCI_CLASS_STORAGE_IDE
113 && strcmp(d->name, "xen-pci-passthrough") != 0) {
114 pci_piix3_xen_ide_unplug(DEVICE(d));
118 static void pci_unplug_disks(PCIBus *bus)
120 pci_for_each_device(bus, 0, unplug_disks, NULL);
123 static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
125 PCIXenPlatformState *s = opaque;
127 switch (addr) {
128 case 0: {
129 PCIDevice *pci_dev = PCI_DEVICE(s);
130 /* Unplug devices. Value is a bitmask of which devices to
131 unplug, with bit 0 the IDE devices, bit 1 the network
132 devices, and bit 2 the non-primary-master IDE devices. */
133 if (val & UNPLUG_ALL_IDE_DISKS) {
134 DPRINTF("unplug disks\n");
135 bdrv_drain_all();
136 bdrv_flush_all();
137 pci_unplug_disks(pci_dev->bus);
139 if (val & UNPLUG_ALL_NICS) {
140 DPRINTF("unplug nics\n");
141 pci_unplug_nics(pci_dev->bus);
143 if (val & UNPLUG_AUX_IDE_DISKS) {
144 DPRINTF("unplug auxiliary disks not supported\n");
146 break;
148 case 2:
149 switch (val) {
150 case 1:
151 DPRINTF("Citrix Windows PV drivers loaded in guest\n");
152 break;
153 case 0:
154 DPRINTF("Guest claimed to be running PV product 0?\n");
155 break;
156 default:
157 DPRINTF("Unknown PV product %d loaded in guest\n", val);
158 break;
160 s->driver_product_version = val;
161 break;
165 static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
166 uint32_t val)
168 switch (addr) {
169 case 0:
170 /* PV driver version */
171 break;
175 static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
177 PCIXenPlatformState *s = opaque;
179 switch (addr) {
180 case 0: /* Platform flags */ {
181 hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
182 HVMMEM_ram_ro : HVMMEM_ram_rw;
183 if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, 0xc0, 0x40)) {
184 DPRINTF("unable to change ro/rw state of ROM memory area!\n");
185 } else {
186 s->flags = val & PFFLAG_ROM_LOCK;
187 DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
188 (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
190 break;
192 case 2:
193 log_writeb(s, val);
194 break;
198 static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
200 PCIXenPlatformState *s = opaque;
202 switch (addr) {
203 case 0:
204 if (s->drivers_blacklisted) {
205 /* The drivers will recognise this magic number and refuse
206 * to do anything. */
207 return 0xd249;
208 } else {
209 /* Magic value so that you can identify the interface. */
210 return 0x49d2;
212 default:
213 return 0xffff;
217 static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
219 PCIXenPlatformState *s = opaque;
221 switch (addr) {
222 case 0:
223 /* Platform flags */
224 return s->flags;
225 case 2:
226 /* Version number */
227 return 1;
228 default:
229 return 0xff;
233 static void platform_fixed_ioport_reset(void *opaque)
235 PCIXenPlatformState *s = opaque;
237 platform_fixed_ioport_writeb(s, 0, 0);
240 static uint64_t platform_fixed_ioport_read(void *opaque,
241 hwaddr addr,
242 unsigned size)
244 switch (size) {
245 case 1:
246 return platform_fixed_ioport_readb(opaque, addr);
247 case 2:
248 return platform_fixed_ioport_readw(opaque, addr);
249 default:
250 return -1;
254 static void platform_fixed_ioport_write(void *opaque, hwaddr addr,
256 uint64_t val, unsigned size)
258 switch (size) {
259 case 1:
260 platform_fixed_ioport_writeb(opaque, addr, val);
261 break;
262 case 2:
263 platform_fixed_ioport_writew(opaque, addr, val);
264 break;
265 case 4:
266 platform_fixed_ioport_writel(opaque, addr, val);
267 break;
272 static const MemoryRegionOps platform_fixed_io_ops = {
273 .read = platform_fixed_ioport_read,
274 .write = platform_fixed_ioport_write,
275 .valid = {
276 .unaligned = true,
278 .impl = {
279 .min_access_size = 1,
280 .max_access_size = 4,
281 .unaligned = true,
283 .endianness = DEVICE_LITTLE_ENDIAN,
286 static void platform_fixed_ioport_init(PCIXenPlatformState* s)
288 memory_region_init_io(&s->fixed_io, OBJECT(s), &platform_fixed_io_ops, s,
289 "xen-fixed", 16);
290 memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
291 &s->fixed_io);
294 /* Xen Platform PCI Device */
296 static uint64_t xen_platform_ioport_readb(void *opaque, hwaddr addr,
297 unsigned int size)
299 if (addr == 0) {
300 return platform_fixed_ioport_readb(opaque, 0);
301 } else {
302 return ~0u;
306 static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
307 uint64_t val, unsigned int size)
309 PCIXenPlatformState *s = opaque;
311 switch (addr) {
312 case 0: /* Platform flags */
313 platform_fixed_ioport_writeb(opaque, 0, (uint32_t)val);
314 break;
315 case 8:
316 log_writeb(s, (uint32_t)val);
317 break;
318 default:
319 break;
323 static const MemoryRegionOps xen_pci_io_ops = {
324 .read = xen_platform_ioport_readb,
325 .write = xen_platform_ioport_writeb,
326 .impl.min_access_size = 1,
327 .impl.max_access_size = 1,
330 static void platform_ioport_bar_setup(PCIXenPlatformState *d)
332 memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d,
333 "xen-pci", 0x100);
336 static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
337 unsigned size)
339 DPRINTF("Warning: attempted read from physical address "
340 "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
342 return 0;
345 static void platform_mmio_write(void *opaque, hwaddr addr,
346 uint64_t val, unsigned size)
348 DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
349 "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
350 val, addr);
353 static const MemoryRegionOps platform_mmio_handler = {
354 .read = &platform_mmio_read,
355 .write = &platform_mmio_write,
356 .endianness = DEVICE_NATIVE_ENDIAN,
359 static void platform_mmio_setup(PCIXenPlatformState *d)
361 memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d,
362 "xen-mmio", 0x1000000);
365 static int xen_platform_post_load(void *opaque, int version_id)
367 PCIXenPlatformState *s = opaque;
369 platform_fixed_ioport_writeb(s, 0, s->flags);
371 return 0;
374 static const VMStateDescription vmstate_xen_platform = {
375 .name = "platform",
376 .version_id = 4,
377 .minimum_version_id = 4,
378 .minimum_version_id_old = 4,
379 .post_load = xen_platform_post_load,
380 .fields = (VMStateField []) {
381 VMSTATE_PCI_DEVICE(parent_obj, PCIXenPlatformState),
382 VMSTATE_UINT8(flags, PCIXenPlatformState),
383 VMSTATE_END_OF_LIST()
387 static int xen_platform_initfn(PCIDevice *dev)
389 PCIXenPlatformState *d = XEN_PLATFORM(dev);
390 uint8_t *pci_conf;
392 pci_conf = dev->config;
394 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
396 pci_config_set_prog_interface(pci_conf, 0);
398 pci_conf[PCI_INTERRUPT_PIN] = 1;
400 platform_ioport_bar_setup(d);
401 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
403 /* reserve 16MB mmio address for share memory*/
404 platform_mmio_setup(d);
405 pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
406 &d->mmio_bar);
408 platform_fixed_ioport_init(d);
410 return 0;
413 static void platform_reset(DeviceState *dev)
415 PCIXenPlatformState *s = XEN_PLATFORM(dev);
417 platform_fixed_ioport_reset(s);
420 static void xen_platform_class_init(ObjectClass *klass, void *data)
422 DeviceClass *dc = DEVICE_CLASS(klass);
423 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
425 k->init = xen_platform_initfn;
426 k->vendor_id = PCI_VENDOR_ID_XEN;
427 k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
428 k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
429 k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
430 k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
431 k->revision = 1;
432 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
433 dc->desc = "XEN platform pci device";
434 dc->reset = platform_reset;
435 dc->vmsd = &vmstate_xen_platform;
438 static const TypeInfo xen_platform_info = {
439 .name = TYPE_XEN_PLATFORM,
440 .parent = TYPE_PCI_DEVICE,
441 .instance_size = sizeof(PCIXenPlatformState),
442 .class_init = xen_platform_class_init,
445 static void xen_platform_register_types(void)
447 type_register_static(&xen_platform_info);
450 type_init(xen_platform_register_types)