tcg/ppc: Fix not_i32
[qemu.git] / qemu-char.h
blob3a9427be67111a9942ebf7af7fc0ea8238c70778
1 #ifndef QEMU_CHAR_H
2 #define QEMU_CHAR_H
4 #include "qemu-common.h"
5 #include "qemu-queue.h"
6 #include "qemu-option.h"
7 #include "qemu-config.h"
8 #include "qobject.h"
10 /* character device */
12 #define CHR_EVENT_BREAK 0 /* serial break char */
13 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
14 #define CHR_EVENT_OPENED 2 /* new connection established */
15 #define CHR_EVENT_MUX_IN 3 /* mux-focus was set to this terminal */
16 #define CHR_EVENT_MUX_OUT 4 /* mux-focus will move on */
17 #define CHR_EVENT_CLOSED 5 /* connection closed */
20 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
21 typedef struct {
22 int speed;
23 int parity;
24 int data_bits;
25 int stop_bits;
26 } QEMUSerialSetParams;
28 #define CHR_IOCTL_SERIAL_SET_BREAK 2
30 #define CHR_IOCTL_PP_READ_DATA 3
31 #define CHR_IOCTL_PP_WRITE_DATA 4
32 #define CHR_IOCTL_PP_READ_CONTROL 5
33 #define CHR_IOCTL_PP_WRITE_CONTROL 6
34 #define CHR_IOCTL_PP_READ_STATUS 7
35 #define CHR_IOCTL_PP_EPP_READ_ADDR 8
36 #define CHR_IOCTL_PP_EPP_READ 9
37 #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
38 #define CHR_IOCTL_PP_EPP_WRITE 11
39 #define CHR_IOCTL_PP_DATA_DIR 12
41 #define CHR_IOCTL_SERIAL_SET_TIOCM 13
42 #define CHR_IOCTL_SERIAL_GET_TIOCM 14
44 #define CHR_TIOCM_CTS 0x020
45 #define CHR_TIOCM_CAR 0x040
46 #define CHR_TIOCM_DSR 0x100
47 #define CHR_TIOCM_RI 0x080
48 #define CHR_TIOCM_DTR 0x002
49 #define CHR_TIOCM_RTS 0x004
51 typedef void IOEventHandler(void *opaque, int event);
53 struct CharDriverState {
54 void (*init)(struct CharDriverState *s);
55 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
56 void (*chr_update_read_handler)(struct CharDriverState *s);
57 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
58 int (*get_msgfd)(struct CharDriverState *s);
59 IOEventHandler *chr_event;
60 IOCanReadHandler *chr_can_read;
61 IOReadHandler *chr_read;
62 void *handler_opaque;
63 void (*chr_send_event)(struct CharDriverState *chr, int event);
64 void (*chr_close)(struct CharDriverState *chr);
65 void (*chr_accept_input)(struct CharDriverState *chr);
66 void *opaque;
67 QEMUBH *bh;
68 char *label;
69 char *filename;
70 QTAILQ_ENTRY(CharDriverState) next;
73 QemuOpts *qemu_chr_parse_compat(const char *label, const char *filename);
74 CharDriverState *qemu_chr_open_opts(QemuOpts *opts,
75 void (*init)(struct CharDriverState *s));
76 CharDriverState *qemu_chr_open(const char *label, const char *filename, void (*init)(struct CharDriverState *s));
77 void qemu_chr_close(CharDriverState *chr);
78 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
79 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
80 void qemu_chr_send_event(CharDriverState *s, int event);
81 void qemu_chr_add_handlers(CharDriverState *s,
82 IOCanReadHandler *fd_can_read,
83 IOReadHandler *fd_read,
84 IOEventHandler *fd_event,
85 void *opaque);
86 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
87 void qemu_chr_generic_open(CharDriverState *s);
88 int qemu_chr_can_read(CharDriverState *s);
89 void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
90 int qemu_chr_get_msgfd(CharDriverState *s);
91 void qemu_chr_accept_input(CharDriverState *s);
92 void qemu_chr_info_print(Monitor *mon, const QObject *ret_data);
93 void qemu_chr_info(Monitor *mon, QObject **ret_data);
94 CharDriverState *qemu_chr_find(const char *name);
96 extern int term_escape_char;
98 /* async I/O support */
100 int qemu_set_fd_handler2(int fd,
101 IOCanReadHandler *fd_read_poll,
102 IOHandler *fd_read,
103 IOHandler *fd_write,
104 void *opaque);
105 int qemu_set_fd_handler(int fd,
106 IOHandler *fd_read,
107 IOHandler *fd_write,
108 void *opaque);
109 #endif