Emulated CCID card: QOMify
[qemu.git] / target-arm / kvm.c
blob969ab0bab51760ddf29f7c7916ed36e5e935d4c2
1 /*
2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
9 */
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
13 #include <sys/mman.h>
15 #include <linux/kvm.h>
17 #include "qemu-common.h"
18 #include "qemu/timer.h"
19 #include "qemu/error-report.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/kvm.h"
22 #include "kvm_arm.h"
23 #include "cpu.h"
24 #include "internals.h"
25 #include "hw/arm/arm.h"
26 #include "exec/memattrs.h"
27 #include "hw/boards.h"
29 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
30 KVM_CAP_LAST_INFO
33 static bool cap_has_mp_state;
35 int kvm_arm_vcpu_init(CPUState *cs)
37 ARMCPU *cpu = ARM_CPU(cs);
38 struct kvm_vcpu_init init;
40 init.target = cpu->kvm_target;
41 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
43 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
46 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
47 int *fdarray,
48 struct kvm_vcpu_init *init)
50 int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
52 kvmfd = qemu_open("/dev/kvm", O_RDWR);
53 if (kvmfd < 0) {
54 goto err;
56 vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
57 if (vmfd < 0) {
58 goto err;
60 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
61 if (cpufd < 0) {
62 goto err;
65 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
66 if (ret >= 0) {
67 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
68 if (ret < 0) {
69 goto err;
71 } else {
72 /* Old kernel which doesn't know about the
73 * PREFERRED_TARGET ioctl: we know it will only support
74 * creating one kind of guest CPU which is its preferred
75 * CPU type.
77 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
78 init->target = *cpus_to_try++;
79 memset(init->features, 0, sizeof(init->features));
80 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
81 if (ret >= 0) {
82 break;
85 if (ret < 0) {
86 goto err;
90 fdarray[0] = kvmfd;
91 fdarray[1] = vmfd;
92 fdarray[2] = cpufd;
94 return true;
96 err:
97 if (cpufd >= 0) {
98 close(cpufd);
100 if (vmfd >= 0) {
101 close(vmfd);
103 if (kvmfd >= 0) {
104 close(kvmfd);
107 return false;
110 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
112 int i;
114 for (i = 2; i >= 0; i--) {
115 close(fdarray[i]);
119 static void kvm_arm_host_cpu_class_init(ObjectClass *oc, void *data)
121 ARMHostCPUClass *ahcc = ARM_HOST_CPU_CLASS(oc);
123 /* All we really need to set up for the 'host' CPU
124 * is the feature bits -- we rely on the fact that the
125 * various ID register values in ARMCPU are only used for
126 * TCG CPUs.
128 if (!kvm_arm_get_host_cpu_features(ahcc)) {
129 fprintf(stderr, "Failed to retrieve host CPU features!\n");
130 abort();
134 static void kvm_arm_host_cpu_initfn(Object *obj)
136 ARMHostCPUClass *ahcc = ARM_HOST_CPU_GET_CLASS(obj);
137 ARMCPU *cpu = ARM_CPU(obj);
138 CPUARMState *env = &cpu->env;
140 cpu->kvm_target = ahcc->target;
141 cpu->dtb_compatible = ahcc->dtb_compatible;
142 env->features = ahcc->features;
145 static const TypeInfo host_arm_cpu_type_info = {
146 .name = TYPE_ARM_HOST_CPU,
147 #ifdef TARGET_AARCH64
148 .parent = TYPE_AARCH64_CPU,
149 #else
150 .parent = TYPE_ARM_CPU,
151 #endif
152 .instance_init = kvm_arm_host_cpu_initfn,
153 .class_init = kvm_arm_host_cpu_class_init,
154 .class_size = sizeof(ARMHostCPUClass),
157 int kvm_arch_init(MachineState *ms, KVMState *s)
159 /* For ARM interrupt delivery is always asynchronous,
160 * whether we are using an in-kernel VGIC or not.
162 kvm_async_interrupts_allowed = true;
164 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
166 type_register_static(&host_arm_cpu_type_info);
168 return 0;
171 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
173 return cpu->cpu_index;
176 /* We track all the KVM devices which need their memory addresses
177 * passing to the kernel in a list of these structures.
178 * When board init is complete we run through the list and
179 * tell the kernel the base addresses of the memory regions.
180 * We use a MemoryListener to track mapping and unmapping of
181 * the regions during board creation, so the board models don't
182 * need to do anything special for the KVM case.
184 typedef struct KVMDevice {
185 struct kvm_arm_device_addr kda;
186 struct kvm_device_attr kdattr;
187 MemoryRegion *mr;
188 QSLIST_ENTRY(KVMDevice) entries;
189 int dev_fd;
190 } KVMDevice;
192 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
194 static void kvm_arm_devlistener_add(MemoryListener *listener,
195 MemoryRegionSection *section)
197 KVMDevice *kd;
199 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
200 if (section->mr == kd->mr) {
201 kd->kda.addr = section->offset_within_address_space;
206 static void kvm_arm_devlistener_del(MemoryListener *listener,
207 MemoryRegionSection *section)
209 KVMDevice *kd;
211 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
212 if (section->mr == kd->mr) {
213 kd->kda.addr = -1;
218 static MemoryListener devlistener = {
219 .region_add = kvm_arm_devlistener_add,
220 .region_del = kvm_arm_devlistener_del,
223 static void kvm_arm_set_device_addr(KVMDevice *kd)
225 struct kvm_device_attr *attr = &kd->kdattr;
226 int ret;
228 /* If the device control API is available and we have a device fd on the
229 * KVMDevice struct, let's use the newer API
231 if (kd->dev_fd >= 0) {
232 uint64_t addr = kd->kda.addr;
233 attr->addr = (uintptr_t)&addr;
234 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
235 } else {
236 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
239 if (ret < 0) {
240 fprintf(stderr, "Failed to set device address: %s\n",
241 strerror(-ret));
242 abort();
246 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
248 KVMDevice *kd, *tkd;
250 memory_listener_unregister(&devlistener);
251 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
252 if (kd->kda.addr != -1) {
253 kvm_arm_set_device_addr(kd);
255 memory_region_unref(kd->mr);
256 g_free(kd);
260 static Notifier notify = {
261 .notify = kvm_arm_machine_init_done,
264 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
265 uint64_t attr, int dev_fd)
267 KVMDevice *kd;
269 if (!kvm_irqchip_in_kernel()) {
270 return;
273 if (QSLIST_EMPTY(&kvm_devices_head)) {
274 memory_listener_register(&devlistener, NULL);
275 qemu_add_machine_init_done_notifier(&notify);
277 kd = g_new0(KVMDevice, 1);
278 kd->mr = mr;
279 kd->kda.id = devid;
280 kd->kda.addr = -1;
281 kd->kdattr.flags = 0;
282 kd->kdattr.group = group;
283 kd->kdattr.attr = attr;
284 kd->dev_fd = dev_fd;
285 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
286 memory_region_ref(kd->mr);
289 static int compare_u64(const void *a, const void *b)
291 if (*(uint64_t *)a > *(uint64_t *)b) {
292 return 1;
294 if (*(uint64_t *)a < *(uint64_t *)b) {
295 return -1;
297 return 0;
300 /* Initialize the CPUState's cpreg list according to the kernel's
301 * definition of what CPU registers it knows about (and throw away
302 * the previous TCG-created cpreg list).
304 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
306 struct kvm_reg_list rl;
307 struct kvm_reg_list *rlp;
308 int i, ret, arraylen;
309 CPUState *cs = CPU(cpu);
311 rl.n = 0;
312 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
313 if (ret != -E2BIG) {
314 return ret;
316 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
317 rlp->n = rl.n;
318 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
319 if (ret) {
320 goto out;
322 /* Sort the list we get back from the kernel, since cpreg_tuples
323 * must be in strictly ascending order.
325 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
327 for (i = 0, arraylen = 0; i < rlp->n; i++) {
328 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
329 continue;
331 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
332 case KVM_REG_SIZE_U32:
333 case KVM_REG_SIZE_U64:
334 break;
335 default:
336 fprintf(stderr, "Can't handle size of register in kernel list\n");
337 ret = -EINVAL;
338 goto out;
341 arraylen++;
344 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
345 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
346 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
347 arraylen);
348 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
349 arraylen);
350 cpu->cpreg_array_len = arraylen;
351 cpu->cpreg_vmstate_array_len = arraylen;
353 for (i = 0, arraylen = 0; i < rlp->n; i++) {
354 uint64_t regidx = rlp->reg[i];
355 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
356 continue;
358 cpu->cpreg_indexes[arraylen] = regidx;
359 arraylen++;
361 assert(cpu->cpreg_array_len == arraylen);
363 if (!write_kvmstate_to_list(cpu)) {
364 /* Shouldn't happen unless kernel is inconsistent about
365 * what registers exist.
367 fprintf(stderr, "Initial read of kernel register state failed\n");
368 ret = -EINVAL;
369 goto out;
372 out:
373 g_free(rlp);
374 return ret;
377 bool write_kvmstate_to_list(ARMCPU *cpu)
379 CPUState *cs = CPU(cpu);
380 int i;
381 bool ok = true;
383 for (i = 0; i < cpu->cpreg_array_len; i++) {
384 struct kvm_one_reg r;
385 uint64_t regidx = cpu->cpreg_indexes[i];
386 uint32_t v32;
387 int ret;
389 r.id = regidx;
391 switch (regidx & KVM_REG_SIZE_MASK) {
392 case KVM_REG_SIZE_U32:
393 r.addr = (uintptr_t)&v32;
394 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
395 if (!ret) {
396 cpu->cpreg_values[i] = v32;
398 break;
399 case KVM_REG_SIZE_U64:
400 r.addr = (uintptr_t)(cpu->cpreg_values + i);
401 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
402 break;
403 default:
404 abort();
406 if (ret) {
407 ok = false;
410 return ok;
413 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
415 CPUState *cs = CPU(cpu);
416 int i;
417 bool ok = true;
419 for (i = 0; i < cpu->cpreg_array_len; i++) {
420 struct kvm_one_reg r;
421 uint64_t regidx = cpu->cpreg_indexes[i];
422 uint32_t v32;
423 int ret;
425 if (kvm_arm_cpreg_level(regidx) > level) {
426 continue;
429 r.id = regidx;
430 switch (regidx & KVM_REG_SIZE_MASK) {
431 case KVM_REG_SIZE_U32:
432 v32 = cpu->cpreg_values[i];
433 r.addr = (uintptr_t)&v32;
434 break;
435 case KVM_REG_SIZE_U64:
436 r.addr = (uintptr_t)(cpu->cpreg_values + i);
437 break;
438 default:
439 abort();
441 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
442 if (ret) {
443 /* We might fail for "unknown register" and also for
444 * "you tried to set a register which is constant with
445 * a different value from what it actually contains".
447 ok = false;
450 return ok;
453 void kvm_arm_reset_vcpu(ARMCPU *cpu)
455 int ret;
457 /* Re-init VCPU so that all registers are set to
458 * their respective reset values.
460 ret = kvm_arm_vcpu_init(CPU(cpu));
461 if (ret < 0) {
462 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
463 abort();
465 if (!write_kvmstate_to_list(cpu)) {
466 fprintf(stderr, "write_kvmstate_to_list failed\n");
467 abort();
472 * Update KVM's MP_STATE based on what QEMU thinks it is
474 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
476 if (cap_has_mp_state) {
477 struct kvm_mp_state mp_state = {
478 .mp_state =
479 cpu->powered_off ? KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
481 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
482 if (ret) {
483 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
484 __func__, ret, strerror(-ret));
485 return -1;
489 return 0;
493 * Sync the KVM MP_STATE into QEMU
495 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
497 if (cap_has_mp_state) {
498 struct kvm_mp_state mp_state;
499 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
500 if (ret) {
501 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
502 __func__, ret, strerror(-ret));
503 abort();
505 cpu->powered_off = (mp_state.mp_state == KVM_MP_STATE_STOPPED);
508 return 0;
511 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
515 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
517 return MEMTXATTRS_UNSPECIFIED;
521 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
523 int ret = 0;
525 switch (run->exit_reason) {
526 case KVM_EXIT_DEBUG:
527 if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
528 ret = EXCP_DEBUG;
529 } /* otherwise return to guest */
530 break;
531 default:
532 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
533 __func__, run->exit_reason);
534 break;
536 return ret;
539 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
541 return true;
544 int kvm_arch_process_async_events(CPUState *cs)
546 return 0;
549 int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
551 return 1;
554 int kvm_arch_on_sigbus(int code, void *addr)
556 return 1;
559 /* The #ifdef protections are until 32bit headers are imported and can
560 * be removed once both 32 and 64 bit reach feature parity.
562 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
564 #ifdef KVM_GUESTDBG_USE_SW_BP
565 if (kvm_sw_breakpoints_active(cs)) {
566 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
568 #endif
569 #ifdef KVM_GUESTDBG_USE_HW
570 if (kvm_arm_hw_debug_active(cs)) {
571 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
572 kvm_arm_copy_hw_debug_data(&dbg->arch);
574 #endif
577 void kvm_arch_init_irq_routing(KVMState *s)
581 int kvm_arch_irqchip_create(MachineState *ms, KVMState *s)
583 if (machine_kernel_irqchip_split(ms)) {
584 perror("-machine kernel_irqchip=split is not supported on ARM.");
585 exit(1);
588 /* If we can create the VGIC using the newer device control API, we
589 * let the device do this when it initializes itself, otherwise we
590 * fall back to the old API */
591 return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
594 int kvm_arm_vgic_probe(void)
596 if (kvm_create_device(kvm_state,
597 KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
598 return 3;
599 } else if (kvm_create_device(kvm_state,
600 KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
601 return 2;
602 } else {
603 return 0;
607 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
608 uint64_t address, uint32_t data, PCIDevice *dev)
610 return 0;
613 int kvm_arch_msi_data_to_gsi(uint32_t data)
615 return (data - 32) & 0xffff;