hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw.h"
  11 #include "mips.h"
  12 #include "pc.h"
  13 #include "isa.h"
  14 #include "net.h"
  15 #include "sysemu.h"
  16 #include "boards.h"
  17 #include "flash.h"
  18 #include "qemu-log.h"
  19 #include "mips-bios.h"
  20 #include "ide.h"
  21
  22 #define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
  23
  24 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
  25
  26 #define MAX_IDE_BUS 2
  27
  28 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  29 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  30 static const int ide_irq[2] = { 14, 15 };
  31
  32 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
  33 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
  34
  35 static PITState *pit; /* PIT i8254 */
  36
  37 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  38
  39 static struct _loaderparams {
  40     int ram_size;
  41     const char *kernel_filename;
  42     const char *kernel_cmdline;
  43     const char *initrd_filename;
  44 } loaderparams;
  45
  46 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
  47                               uint32_t val)
  48 {
  49     if ((addr & 0xffff) == 0 && val == 42)
  50         qemu_system_reset_request ();
  51     else if ((addr & 0xffff) == 4 && val == 42)
  52         qemu_system_shutdown_request ();
  53 }
  54
  55 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
  56 {
  57     return 0;
  58 }
  59
  60 static CPUWriteMemoryFunc * const mips_qemu_write[] = {
  61     &mips_qemu_writel,
  62     &mips_qemu_writel,
  63     &mips_qemu_writel,
  64 };
  65
  66 static CPUReadMemoryFunc * const mips_qemu_read[] = {
  67     &mips_qemu_readl,
  68     &mips_qemu_readl,
  69     &mips_qemu_readl,
  70 };
  71
  72 static int mips_qemu_iomemtype = 0;
  73
  74 static void load_kernel (CPUState *env)
  75 {
  76     int64_t entry, kernel_low, kernel_high;
  77     long kernel_size, initrd_size;
  78     ram_addr_t initrd_offset;
  79     int ret;
  80
  81     kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
  82                            (uint64_t *)&entry, (uint64_t *)&kernel_low,
  83                            (uint64_t *)&kernel_high);
  84     if (kernel_size >= 0) {
  85         if ((entry & ~0x7fffffffULL) == 0x80000000)
  86             entry = (int32_t)entry;
  87         env->active_tc.PC = entry;
  88     } else {
  89         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  90                 loaderparams.kernel_filename);
  91         exit(1);
  92     }
  93
  94     /* load initrd */
  95     initrd_size = 0;
  96     initrd_offset = 0;
  97     if (loaderparams.initrd_filename) {
  98         initrd_size = get_image_size (loaderparams.initrd_filename);
  99         if (initrd_size > 0) {
 100             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 101             if (initrd_offset + initrd_size > ram_size) {
 102                 fprintf(stderr,
 103                         "qemu: memory too small for initial ram disk '%s'\n",
 104                         loaderparams.initrd_filename);
 105                 exit(1);
 106             }
 107             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 108                                               initrd_offset,
 109                                               ram_size - initrd_offset);
 110         }
 111         if (initrd_size == (target_ulong) -1) {
 112             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 113                     loaderparams.initrd_filename);
 114             exit(1);
 115         }
 116     }
 117
 118     /* Store command line.  */
 119     if (initrd_size > 0) {
 120         char buf[64];
 121         ret = snprintf(buf, 64, "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
 122                        PHYS_TO_VIRT((uint32_t)initrd_offset),
 123                        initrd_size);
 124         cpu_physical_memory_write((16 << 20) - 256, (void *)buf, 64);
 125     } else {
 126         ret = 0;
 127     }
 128     pstrcpy_targphys((16 << 20) - 256 + ret, 256,
 129                      loaderparams.kernel_cmdline);
 130
 131     stl_phys((16 << 20) - 260, 0x12345678);
 132     stl_phys((16 << 20) - 264, ram_size);
 133 }
 134
 135 static void main_cpu_reset(void *opaque)
 136 {
 137     CPUState *env = opaque;
 138     cpu_reset(env);
 139
 140     if (loaderparams.kernel_filename)
 141         load_kernel (env);
 142 }
 143
 144 static const int sector_len = 32 * 1024;
 145 static
 146 void mips_r4k_init (ram_addr_t ram_size,
 147                     const char *boot_device,
 148                     const char *kernel_filename, const char *kernel_cmdline,
 149                     const char *initrd_filename, const char *cpu_model)
 150 {
 151     char *filename;
 152     ram_addr_t ram_offset;
 153     ram_addr_t bios_offset;
 154     int bios_size;
 155     CPUState *env;
 156     RTCState *rtc_state;
 157     int i;
 158     qemu_irq *i8259;
 159     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 160     DriveInfo *dinfo;
 161
 162     /* init CPUs */
 163     if (cpu_model == NULL) {
 164 #ifdef TARGET_MIPS64
 165         cpu_model = "R4000";
 166 #else
 167         cpu_model = "24Kf";
 168 #endif
 169     }
 170     env = cpu_init(cpu_model);
 171     if (!env) {
 172         fprintf(stderr, "Unable to find CPU definition\n");
 173         exit(1);
 174     }
 175     qemu_register_reset(main_cpu_reset, env);
 176
 177     /* allocate RAM */
 178     if (ram_size > (256 << 20)) {
 179         fprintf(stderr,
 180                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 181                 ((unsigned int)ram_size / (1 << 20)));
 182         exit(1);
 183     }
 184     ram_offset = qemu_ram_alloc(ram_size);
 185
 186     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
 187
 188     if (!mips_qemu_iomemtype) {
 189         mips_qemu_iomemtype = cpu_register_io_memory(mips_qemu_read,
 190                                                      mips_qemu_write, NULL);
 191     }
 192     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
 193
 194     /* Try to load a BIOS image. If this fails, we continue regardless,
 195        but initialize the hardware ourselves. When a kernel gets
 196        preloaded we also initialize the hardware, since the BIOS wasn't
 197        run. */
 198     if (bios_name == NULL)
 199         bios_name = BIOS_FILENAME;
 200     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 201     if (filename) {
 202         bios_size = get_image_size(filename);
 203     } else {
 204         bios_size = -1;
 205     }
 206     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 207         bios_offset = qemu_ram_alloc(BIOS_SIZE);
 208         cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
 209                                      bios_offset | IO_MEM_ROM);
 210
 211         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 212     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 213         uint32_t mips_rom = 0x00400000;
 214         bios_offset = qemu_ram_alloc(mips_rom);
 215         if (!pflash_cfi01_register(0x1fc00000, bios_offset,
 216             dinfo->bdrv, sector_len, mips_rom / sector_len,
 217             4, 0, 0, 0, 0)) {
 218             fprintf(stderr, "qemu: Error registering flash memory.\n");
 219         }
 220     }
 221     else {
 222         /* not fatal */
 223         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 224                 bios_name);
 225     }
 226     if (filename) {
 227         qemu_free(filename);
 228     }
 229
 230     if (kernel_filename) {
 231         loaderparams.ram_size = ram_size;
 232         loaderparams.kernel_filename = kernel_filename;
 233         loaderparams.kernel_cmdline = kernel_cmdline;
 234         loaderparams.initrd_filename = initrd_filename;
 235         load_kernel (env);
 236     }
 237
 238     /* Init CPU internal devices */
 239     cpu_mips_irq_init_cpu(env);
 240     cpu_mips_clock_init(env);
 241
 242     /* The PIC is attached to the MIPS CPU INT0 pin */
 243     i8259 = i8259_init(env->irq[2]);
 244     isa_bus_new(NULL);
 245     isa_bus_irqs(i8259);
 246
 247     rtc_state = rtc_init(2000);
 248
 249     /* Register 64 KB of ISA IO space at 0x14000000 */
 250     isa_mmio_init(0x14000000, 0x00010000);
 251     isa_mem_base = 0x10000000;
 252
 253     pit = pit_init(0x40, i8259[0]);
 254
 255     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 256         if (serial_hds[i]) {
 257             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
 258                         serial_hds[i]);
 259         }
 260     }
 261
 262     isa_vga_init();
 263
 264     if (nd_table[0].vlan)
 265         isa_ne2000_init(0x300, 9, &nd_table[0]);
 266
 267     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 268         fprintf(stderr, "qemu: too many IDE bus\n");
 269         exit(1);
 270     }
 271
 272     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 273         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 274     }
 275
 276     for(i = 0; i < MAX_IDE_BUS; i++)
 277         isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
 278                      hd[MAX_IDE_DEVS * i],
 279                      hd[MAX_IDE_DEVS * i + 1]);
 280
 281     isa_create_simple("i8042");
 282 }
 283
 284 static QEMUMachine mips_machine = {
 285     .name = "mips",
 286     .desc = "mips r4k platform",
 287     .init = mips_r4k_init,
 288 };
 289
 290 static void mips_machine_init(void)
 291 {
 292     qemu_register_machine(&mips_machine);
 293 }
 294
 295 machine_init(mips_machine_init);