?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
tcg: fix build on 32-bit hppa, ppc and sparc hosts
[qemu.git] / hw / wm8750.c
blob6064da04134b6363d934e5958fc5d203c257e246
1 /*
2 * WM8750 audio CODEC.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This file is licensed under GNU GPL.
8 */
9
10 #include "hw.h"
11 #include "i2c.h"
12 #include "audio/audio.h"
13
14 #define IN_PORT_N 3
15 #define OUT_PORT_N 3
16
17 #define CODEC "wm8750"
18
19 typedef struct {
20 int adc;
21 int adc_hz;
22 int dac;
23 int dac_hz;
24 } WMRate;
25
26 typedef struct {
27 i2c_slave i2c;
28 uint8_t i2c_data[2];
29 int i2c_len;
30 QEMUSoundCard card;
31 SWVoiceIn *adc_voice[IN_PORT_N];
32 SWVoiceOut *dac_voice[OUT_PORT_N];
33 int enable;
34 void (*data_req)(void *, int, int);
35 void *opaque;
36 uint8_t data_in[4096];
37 uint8_t data_out[4096];
38 int idx_in, req_in;
39 int idx_out, req_out;
40
41 SWVoiceOut **out[2];
42 uint8_t outvol[7], outmute[2];
43 SWVoiceIn **in[2];
44 uint8_t invol[4], inmute[2];
45
46 uint8_t diff[2], pol, ds, monomix[2], alc, mute;
47 uint8_t path[4], mpath[2], power, format;
48 const WMRate *rate;
49 uint8_t rate_vmstate;
50 int adc_hz, dac_hz, ext_adc_hz, ext_dac_hz, master;
51 } WM8750State;
52
53 /* pow(10.0, -i / 20.0) * 255, i = 0..42 */
54 static const uint8_t wm8750_vol_db_table[] = {
55 255, 227, 203, 181, 161, 143, 128, 114, 102, 90, 81, 72, 64, 57, 51, 45,
56 40, 36, 32, 29, 26, 23, 20, 18, 16, 14, 13, 11, 10, 9, 8, 7, 6, 6, 5, 5,
57 4, 4, 3, 3, 3, 2, 2
58 };
59
60 #define WM8750_OUTVOL_TRANSFORM(x) wm8750_vol_db_table[(0x7f - x) / 3]
61 #define WM8750_INVOL_TRANSFORM(x) (x << 2)
62
63 static inline void wm8750_in_load(WM8750State *s)
64 {
65 int acquired;
66 if (s->idx_in + s->req_in <= sizeof(s->data_in))
67 return;
68 s->idx_in = audio_MAX(0, (int) sizeof(s->data_in) - s->req_in);
69 acquired = AUD_read(*s->in[0], s->data_in + s->idx_in,
70 sizeof(s->data_in) - s->idx_in);
71 }
72
73 static inline void wm8750_out_flush(WM8750State *s)
74 {
75 int sent = 0;
76 while (sent < s->idx_out)
77 sent += AUD_write(*s->out[0], s->data_out + sent, s->idx_out - sent)
78 ?: s->idx_out;
79 s->idx_out = 0;
80 }
81
82 static void wm8750_audio_in_cb(void *opaque, int avail_b)
83 {
84 WM8750State *s = (WM8750State *) opaque;
85 s->req_in = avail_b;
86 s->data_req(s->opaque, s->req_out >> 2, avail_b >> 2);
87 }
88
89 static void wm8750_audio_out_cb(void *opaque, int free_b)
90 {
91 WM8750State *s = (WM8750State *) opaque;
92
93 if (s->idx_out >= free_b) {
94 s->idx_out = free_b;
95 s->req_out = 0;
96 wm8750_out_flush(s);
97 } else
98 s->req_out = free_b - s->idx_out;
99
100 s->data_req(s->opaque, s->req_out >> 2, s->req_in >> 2);
101 }
102
103 static const WMRate wm_rate_table[] = {
104 { 256, 48000, 256, 48000 }, /* SR: 00000 */
105 { 384, 48000, 384, 48000 }, /* SR: 00001 */
106 { 256, 48000, 1536, 8000 }, /* SR: 00010 */
107 { 384, 48000, 2304, 8000 }, /* SR: 00011 */
108 { 1536, 8000, 256, 48000 }, /* SR: 00100 */
109 { 2304, 8000, 384, 48000 }, /* SR: 00101 */
110 { 1536, 8000, 1536, 8000 }, /* SR: 00110 */
111 { 2304, 8000, 2304, 8000 }, /* SR: 00111 */
112 { 1024, 12000, 1024, 12000 }, /* SR: 01000 */
113 { 1526, 12000, 1536, 12000 }, /* SR: 01001 */
114 { 768, 16000, 768, 16000 }, /* SR: 01010 */
115 { 1152, 16000, 1152, 16000 }, /* SR: 01011 */
116 { 384, 32000, 384, 32000 }, /* SR: 01100 */
117 { 576, 32000, 576, 32000 }, /* SR: 01101 */
118 { 128, 96000, 128, 96000 }, /* SR: 01110 */
119 { 192, 96000, 192, 96000 }, /* SR: 01111 */
120 { 256, 44100, 256, 44100 }, /* SR: 10000 */
121 { 384, 44100, 384, 44100 }, /* SR: 10001 */
122 { 256, 44100, 1408, 8018 }, /* SR: 10010 */
123 { 384, 44100, 2112, 8018 }, /* SR: 10011 */
124 { 1408, 8018, 256, 44100 }, /* SR: 10100 */
125 { 2112, 8018, 384, 44100 }, /* SR: 10101 */
126 { 1408, 8018, 1408, 8018 }, /* SR: 10110 */
127 { 2112, 8018, 2112, 8018 }, /* SR: 10111 */
128 { 1024, 11025, 1024, 11025 }, /* SR: 11000 */
129 { 1536, 11025, 1536, 11025 }, /* SR: 11001 */
130 { 512, 22050, 512, 22050 }, /* SR: 11010 */
131 { 768, 22050, 768, 22050 }, /* SR: 11011 */
132 { 512, 24000, 512, 24000 }, /* SR: 11100 */
133 { 768, 24000, 768, 24000 }, /* SR: 11101 */
134 { 128, 88200, 128, 88200 }, /* SR: 11110 */
135 { 192, 88200, 192, 88200 }, /* SR: 11111 */
136 };
137
138 static void wm8750_vol_update(WM8750State *s)
139 {
140 /* FIXME: multiply all volumes by s->invol[2], s->invol[3] */
141
142 AUD_set_volume_in(s->adc_voice[0], s->mute,
143 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
144 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
145 AUD_set_volume_in(s->adc_voice[1], s->mute,
146 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
147 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
148 AUD_set_volume_in(s->adc_voice[2], s->mute,
149 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
150 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
151
152 /* FIXME: multiply all volumes by s->outvol[0], s->outvol[1] */
153
154 /* Speaker: LOUT2VOL ROUT2VOL */
155 AUD_set_volume_out(s->dac_voice[0], s->mute,
156 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[4]),
157 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[5]));
158
159 /* Headphone: LOUT1VOL ROUT1VOL */
160 AUD_set_volume_out(s->dac_voice[1], s->mute,
161 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[2]),
162 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[3]));
163
164 /* MONOOUT: MONOVOL MONOVOL */
165 AUD_set_volume_out(s->dac_voice[2], s->mute,
166 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]),
167 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]));
168 }
169
170 static void wm8750_set_format(WM8750State *s)
171 {
172 int i;
173 struct audsettings in_fmt;
174 struct audsettings out_fmt;
175 struct audsettings monoout_fmt;
176
177 wm8750_out_flush(s);
178
179 if (s->in[0] && *s->in[0])
180 AUD_set_active_in(*s->in[0], 0);
181 if (s->out[0] && *s->out[0])
182 AUD_set_active_out(*s->out[0], 0);
183
184 for (i = 0; i < IN_PORT_N; i ++)
185 if (s->adc_voice[i]) {
186 AUD_close_in(&s->card, s->adc_voice[i]);
187 s->adc_voice[i] = NULL;
188 }
189 for (i = 0; i < OUT_PORT_N; i ++)
190 if (s->dac_voice[i]) {
191 AUD_close_out(&s->card, s->dac_voice[i]);
192 s->dac_voice[i] = NULL;
193 }
194
195 if (!s->enable)
196 return;
197
198 /* Setup input */
199 in_fmt.endianness = 0;
200 in_fmt.nchannels = 2;
201 in_fmt.freq = s->adc_hz;
202 in_fmt.fmt = AUD_FMT_S16;
203
204 s->adc_voice[0] = AUD_open_in(&s->card, s->adc_voice[0],
205 CODEC ".input1", s, wm8750_audio_in_cb, &in_fmt);
206 s->adc_voice[1] = AUD_open_in(&s->card, s->adc_voice[1],
207 CODEC ".input2", s, wm8750_audio_in_cb, &in_fmt);
208 s->adc_voice[2] = AUD_open_in(&s->card, s->adc_voice[2],
209 CODEC ".input3", s, wm8750_audio_in_cb, &in_fmt);
210
211 /* Setup output */
212 out_fmt.endianness = 0;
213 out_fmt.nchannels = 2;
214 out_fmt.freq = s->dac_hz;
215 out_fmt.fmt = AUD_FMT_S16;
216 monoout_fmt.endianness = 0;
217 monoout_fmt.nchannels = 1;
218 monoout_fmt.freq = s->rate->dac_hz;
219 monoout_fmt.fmt = AUD_FMT_S16;
220
221 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
222 CODEC ".speaker", s, wm8750_audio_out_cb, &out_fmt);
223 s->dac_voice[1] = AUD_open_out(&s->card, s->dac_voice[1],
224 CODEC ".headphone", s, wm8750_audio_out_cb, &out_fmt);
225 /* MONOMIX is also in stereo for simplicity */
226 s->dac_voice[2] = AUD_open_out(&s->card, s->dac_voice[2],
227 CODEC ".monomix", s, wm8750_audio_out_cb, &out_fmt);
228 /* no sense emulating OUT3 which is a mix of other outputs */
229
230 wm8750_vol_update(s);
231
232 /* We should connect the left and right channels to their
233 * respective inputs/outputs but we have completely no need
234 * for mixing or combining paths to different ports, so we
235 * connect both channels to where the left channel is routed. */
236 if (s->in[0] && *s->in[0])
237 AUD_set_active_in(*s->in[0], 1);
238 if (s->out[0] && *s->out[0])
239 AUD_set_active_out(*s->out[0], 1);
240 }
241
242 static void wm8750_clk_update(WM8750State *s, int ext)
243 {
244 if (s->master || !s->ext_dac_hz)
245 s->dac_hz = s->rate->dac_hz;
246 else
247 s->dac_hz = s->ext_dac_hz;
248
249 if (s->master || !s->ext_adc_hz)
250 s->adc_hz = s->rate->adc_hz;
251 else
252 s->adc_hz = s->ext_adc_hz;
253
254 if (s->master || (!s->ext_dac_hz && !s->ext_adc_hz)) {
255 if (!ext)
256 wm8750_set_format(s);
257 } else {
258 if (ext)
259 wm8750_set_format(s);
260 }
261 }
262
263 static void wm8750_reset(i2c_slave *i2c)
264 {
265 WM8750State *s = (WM8750State *) i2c;
266 s->rate = &wm_rate_table[0];
267 s->enable = 0;
268 wm8750_clk_update(s, 1);
269 s->diff[0] = 0;
270 s->diff[1] = 0;
271 s->ds = 0;
272 s->alc = 0;
273 s->in[0] = &s->adc_voice[0];
274 s->invol[0] = 0x17;
275 s->invol[1] = 0x17;
276 s->invol[2] = 0xc3;
277 s->invol[3] = 0xc3;
278 s->out[0] = &s->dac_voice[0];
279 s->outvol[0] = 0xff;
280 s->outvol[1] = 0xff;
281 s->outvol[2] = 0x79;
282 s->outvol[3] = 0x79;
283 s->outvol[4] = 0x79;
284 s->outvol[5] = 0x79;
285 s->outvol[6] = 0x79;
286 s->inmute[0] = 0;
287 s->inmute[1] = 0;
288 s->outmute[0] = 0;
289 s->outmute[1] = 0;
290 s->mute = 1;
291 s->path[0] = 0;
292 s->path[1] = 0;
293 s->path[2] = 0;
294 s->path[3] = 0;
295 s->mpath[0] = 0;
296 s->mpath[1] = 0;
297 s->format = 0x0a;
298 s->idx_in = sizeof(s->data_in);
299 s->req_in = 0;
300 s->idx_out = 0;
301 s->req_out = 0;
302 wm8750_vol_update(s);
303 s->i2c_len = 0;
304 }
305
306 static void wm8750_event(i2c_slave *i2c, enum i2c_event event)
307 {
308 WM8750State *s = (WM8750State *) i2c;
309
310 switch (event) {
311 case I2C_START_SEND:
312 s->i2c_len = 0;
313 break;
314 case I2C_FINISH:
315 #ifdef VERBOSE
316 if (s->i2c_len < 2)
317 printf("%s: message too short (%i bytes)\n",
318 __FUNCTION__, s->i2c_len);
319 #endif
320 break;
321 default:
322 break;
323 }
324 }
325
326 #define WM8750_LINVOL 0x00
327 #define WM8750_RINVOL 0x01
328 #define WM8750_LOUT1V 0x02
329 #define WM8750_ROUT1V 0x03
330 #define WM8750_ADCDAC 0x05
331 #define WM8750_IFACE 0x07
332 #define WM8750_SRATE 0x08
333 #define WM8750_LDAC 0x0a
334 #define WM8750_RDAC 0x0b
335 #define WM8750_BASS 0x0c
336 #define WM8750_TREBLE 0x0d
337 #define WM8750_RESET 0x0f
338 #define WM8750_3D 0x10
339 #define WM8750_ALC1 0x11
340 #define WM8750_ALC2 0x12
341 #define WM8750_ALC3 0x13
342 #define WM8750_NGATE 0x14
343 #define WM8750_LADC 0x15
344 #define WM8750_RADC 0x16
345 #define WM8750_ADCTL1 0x17
346 #define WM8750_ADCTL2 0x18
347 #define WM8750_PWR1 0x19
348 #define WM8750_PWR2 0x1a
349 #define WM8750_ADCTL3 0x1b
350 #define WM8750_ADCIN 0x1f
351 #define WM8750_LADCIN 0x20
352 #define WM8750_RADCIN 0x21
353 #define WM8750_LOUTM1 0x22
354 #define WM8750_LOUTM2 0x23
355 #define WM8750_ROUTM1 0x24
356 #define WM8750_ROUTM2 0x25
357 #define WM8750_MOUTM1 0x26
358 #define WM8750_MOUTM2 0x27
359 #define WM8750_LOUT2V 0x28
360 #define WM8750_ROUT2V 0x29
361 #define WM8750_MOUTV 0x2a
362
363 static int wm8750_tx(i2c_slave *i2c, uint8_t data)
364 {
365 WM8750State *s = (WM8750State *) i2c;
366 uint8_t cmd;
367 uint16_t value;
368
369 if (s->i2c_len >= 2) {
370 printf("%s: long message (%i bytes)\n", __FUNCTION__, s->i2c_len);
371 #ifdef VERBOSE
372 return 1;
373 #endif
374 }
375 s->i2c_data[s->i2c_len ++] = data;
376 if (s->i2c_len != 2)
377 return 0;
378
379 cmd = s->i2c_data[0] >> 1;
380 value = ((s->i2c_data[0] << 8) | s->i2c_data[1]) & 0x1ff;
381
382 switch (cmd) {
383 case WM8750_LADCIN: /* ADC Signal Path Control (Left) */
384 s->diff[0] = (((value >> 6) & 3) == 3); /* LINSEL */
385 if (s->diff[0])
386 s->in[0] = &s->adc_voice[0 + s->ds * 1];
387 else
388 s->in[0] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
389 break;
390
391 case WM8750_RADCIN: /* ADC Signal Path Control (Right) */
392 s->diff[1] = (((value >> 6) & 3) == 3); /* RINSEL */
393 if (s->diff[1])
394 s->in[1] = &s->adc_voice[0 + s->ds * 1];
395 else
396 s->in[1] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
397 break;
398
399 case WM8750_ADCIN: /* ADC Input Mode */
400 s->ds = (value >> 8) & 1; /* DS */
401 if (s->diff[0])
402 s->in[0] = &s->adc_voice[0 + s->ds * 1];
403 if (s->diff[1])
404 s->in[1] = &s->adc_voice[0 + s->ds * 1];
405 s->monomix[0] = (value >> 6) & 3; /* MONOMIX */
406 break;
407
408 case WM8750_ADCTL1: /* Additional Control (1) */
409 s->monomix[1] = (value >> 1) & 1; /* DMONOMIX */
410 break;
411
412 case WM8750_PWR1: /* Power Management (1) */
413 s->enable = ((value >> 6) & 7) == 3; /* VMIDSEL, VREF */
414 wm8750_set_format(s);
415 break;
416
417 case WM8750_LINVOL: /* Left Channel PGA */
418 s->invol[0] = value & 0x3f; /* LINVOL */
419 s->inmute[0] = (value >> 7) & 1; /* LINMUTE */
420 wm8750_vol_update(s);
421 break;
422
423 case WM8750_RINVOL: /* Right Channel PGA */
424 s->invol[1] = value & 0x3f; /* RINVOL */
425 s->inmute[1] = (value >> 7) & 1; /* RINMUTE */
426 wm8750_vol_update(s);
427 break;
428
429 case WM8750_ADCDAC: /* ADC and DAC Control */
430 s->pol = (value >> 5) & 3; /* ADCPOL */
431 s->mute = (value >> 3) & 1; /* DACMU */
432 wm8750_vol_update(s);
433 break;
434
435 case WM8750_ADCTL3: /* Additional Control (3) */
436 break;
437
438 case WM8750_LADC: /* Left ADC Digital Volume */
439 s->invol[2] = value & 0xff; /* LADCVOL */
440 wm8750_vol_update(s);
441 break;
442
443 case WM8750_RADC: /* Right ADC Digital Volume */
444 s->invol[3] = value & 0xff; /* RADCVOL */
445 wm8750_vol_update(s);
446 break;
447
448 case WM8750_ALC1: /* ALC Control (1) */
449 s->alc = (value >> 7) & 3; /* ALCSEL */
450 break;
451
452 case WM8750_NGATE: /* Noise Gate Control */
453 case WM8750_3D: /* 3D enhance */
454 break;
455
456 case WM8750_LDAC: /* Left Channel Digital Volume */
457 s->outvol[0] = value & 0xff; /* LDACVOL */
458 wm8750_vol_update(s);
459 break;
460
461 case WM8750_RDAC: /* Right Channel Digital Volume */
462 s->outvol[1] = value & 0xff; /* RDACVOL */
463 wm8750_vol_update(s);
464 break;
465
466 case WM8750_BASS: /* Bass Control */
467 break;
468
469 case WM8750_LOUTM1: /* Left Mixer Control (1) */
470 s->path[0] = (value >> 8) & 1; /* LD2LO */
471 /* TODO: mute/unmute respective paths */
472 wm8750_vol_update(s);
473 break;
474
475 case WM8750_LOUTM2: /* Left Mixer Control (2) */
476 s->path[1] = (value >> 8) & 1; /* RD2LO */
477 /* TODO: mute/unmute respective paths */
478 wm8750_vol_update(s);
479 break;
480
481 case WM8750_ROUTM1: /* Right Mixer Control (1) */
482 s->path[2] = (value >> 8) & 1; /* LD2RO */
483 /* TODO: mute/unmute respective paths */
484 wm8750_vol_update(s);
485 break;
486
487 case WM8750_ROUTM2: /* Right Mixer Control (2) */
488 s->path[3] = (value >> 8) & 1; /* RD2RO */
489 /* TODO: mute/unmute respective paths */
490 wm8750_vol_update(s);
491 break;
492
493 case WM8750_MOUTM1: /* Mono Mixer Control (1) */
494 s->mpath[0] = (value >> 8) & 1; /* LD2MO */
495 /* TODO: mute/unmute respective paths */
496 wm8750_vol_update(s);
497 break;
498
499 case WM8750_MOUTM2: /* Mono Mixer Control (2) */
500 s->mpath[1] = (value >> 8) & 1; /* RD2MO */
501 /* TODO: mute/unmute respective paths */
502 wm8750_vol_update(s);
503 break;
504
505 case WM8750_LOUT1V: /* LOUT1 Volume */
506 s->outvol[2] = value & 0x7f; /* LOUT1VOL */
507 wm8750_vol_update(s);
508 break;
509
510 case WM8750_LOUT2V: /* LOUT2 Volume */
511 s->outvol[4] = value & 0x7f; /* LOUT2VOL */
512 wm8750_vol_update(s);
513 break;
514
515 case WM8750_ROUT1V: /* ROUT1 Volume */
516 s->outvol[3] = value & 0x7f; /* ROUT1VOL */
517 wm8750_vol_update(s);
518 break;
519
520 case WM8750_ROUT2V: /* ROUT2 Volume */
521 s->outvol[5] = value & 0x7f; /* ROUT2VOL */
522 wm8750_vol_update(s);
523 break;
524
525 case WM8750_MOUTV: /* MONOOUT Volume */
526 s->outvol[6] = value & 0x7f; /* MONOOUTVOL */
527 wm8750_vol_update(s);
528 break;
529
530 case WM8750_ADCTL2: /* Additional Control (2) */
531 break;
532
533 case WM8750_PWR2: /* Power Management (2) */
534 s->power = value & 0x7e;
535 /* TODO: mute/unmute respective paths */
536 wm8750_vol_update(s);
537 break;
538
539 case WM8750_IFACE: /* Digital Audio Interface Format */
540 s->format = value;
541 s->master = (value >> 6) & 1; /* MS */
542 wm8750_clk_update(s, s->master);
543 break;
544
545 case WM8750_SRATE: /* Clocking and Sample Rate Control */
546 s->rate = &wm_rate_table[(value >> 1) & 0x1f];
547 wm8750_clk_update(s, 0);
548 break;
549
550 case WM8750_RESET: /* Reset */
551 wm8750_reset(&s->i2c);
552 break;
553
554 #ifdef VERBOSE
555 default:
556 printf("%s: unknown register %02x\n", __FUNCTION__, cmd);
557 #endif
558 }
559
560 return 0;
561 }
562
563 static int wm8750_rx(i2c_slave *i2c)
564 {
565 return 0x00;
566 }
567
568 static void wm8750_pre_save(void *opaque)
569 {
570 WM8750State *s = opaque;
571
572 s->rate_vmstate = (s->rate - wm_rate_table) / sizeof(*s->rate);
573 }
574
575 static int wm8750_post_load(void *opaque, int version_id)
576 {
577 WM8750State *s = opaque;
578
579 s->rate = &wm_rate_table[s->rate_vmstate & 0x1f];
580 return 0;
581 }
582
583 static const VMStateDescription vmstate_wm8750 = {
584 .name = CODEC,
585 .version_id = 0,
586 .minimum_version_id = 0,
587 .minimum_version_id_old = 0,
588 .pre_save = wm8750_pre_save,
589 .post_load = wm8750_post_load,
590 .fields = (VMStateField []) {
591 VMSTATE_UINT8_ARRAY(i2c_data, WM8750State, 2),
592 VMSTATE_INT32(i2c_len, WM8750State),
593 VMSTATE_INT32(enable, WM8750State),
594 VMSTATE_INT32(idx_in, WM8750State),
595 VMSTATE_INT32(req_in, WM8750State),
596 VMSTATE_INT32(idx_out, WM8750State),
597 VMSTATE_INT32(req_out, WM8750State),
598 VMSTATE_UINT8_ARRAY(outvol, WM8750State, 7),
599 VMSTATE_UINT8_ARRAY(outmute, WM8750State, 2),
600 VMSTATE_UINT8_ARRAY(invol, WM8750State, 4),
601 VMSTATE_UINT8_ARRAY(inmute, WM8750State, 2),
602 VMSTATE_UINT8_ARRAY(diff, WM8750State, 2),
603 VMSTATE_UINT8(pol, WM8750State),
604 VMSTATE_UINT8(ds, WM8750State),
605 VMSTATE_UINT8_ARRAY(monomix, WM8750State, 2),
606 VMSTATE_UINT8(alc, WM8750State),
607 VMSTATE_UINT8(mute, WM8750State),
608 VMSTATE_UINT8_ARRAY(path, WM8750State, 4),
609 VMSTATE_UINT8_ARRAY(mpath, WM8750State, 2),
610 VMSTATE_UINT8(format, WM8750State),
611 VMSTATE_UINT8(power, WM8750State),
612 VMSTATE_UINT8(rate_vmstate, WM8750State),
613 VMSTATE_I2C_SLAVE(i2c, WM8750State),
614 VMSTATE_END_OF_LIST()
615 }
616 };
617
618 static int wm8750_init(i2c_slave *i2c)
619 {
620 WM8750State *s = FROM_I2C_SLAVE(WM8750State, i2c);
621
622 AUD_register_card(CODEC, &s->card);
623 wm8750_reset(&s->i2c);
624
625 return 0;
626 }
627
628 #if 0
629 static void wm8750_fini(i2c_slave *i2c)
630 {
631 WM8750State *s = (WM8750State *) i2c;
632 wm8750_reset(&s->i2c);
633 AUD_remove_card(&s->card);
634 qemu_free(s);
635 }
636 #endif
637
638 void wm8750_data_req_set(DeviceState *dev,
639 void (*data_req)(void *, int, int), void *opaque)
640 {
641 WM8750State *s = FROM_I2C_SLAVE(WM8750State, I2C_SLAVE_FROM_QDEV(dev));
642 s->data_req = data_req;
643 s->opaque = opaque;
644 }
645
646 void wm8750_dac_dat(void *opaque, uint32_t sample)
647 {
648 WM8750State *s = (WM8750State *) opaque;
649
650 *(uint32_t *) &s->data_out[s->idx_out] = sample;
651 s->req_out -= 4;
652 s->idx_out += 4;
653 if (s->idx_out >= sizeof(s->data_out) || s->req_out <= 0)
654 wm8750_out_flush(s);
655 }
656
657 void *wm8750_dac_buffer(void *opaque, int samples)
658 {
659 WM8750State *s = (WM8750State *) opaque;
660 /* XXX: Should check if there are <i>samples</i> free samples available */
661 void *ret = s->data_out + s->idx_out;
662
663 s->idx_out += samples << 2;
664 s->req_out -= samples << 2;
665 return ret;
666 }
667
668 void wm8750_dac_commit(void *opaque)
669 {
670 WM8750State *s = (WM8750State *) opaque;
671
672 wm8750_out_flush(s);
673 }
674
675 uint32_t wm8750_adc_dat(void *opaque)
676 {
677 WM8750State *s = (WM8750State *) opaque;
678 uint32_t *data;
679
680 if (s->idx_in >= sizeof(s->data_in))
681 wm8750_in_load(s);
682
683 data = (uint32_t *) &s->data_in[s->idx_in];
684 s->req_in -= 4;
685 s->idx_in += 4;
686 return *data;
687 }
688
689 void wm8750_set_bclk_in(void *opaque, int new_hz)
690 {
691 WM8750State *s = (WM8750State *) opaque;
692
693 s->ext_adc_hz = new_hz;
694 s->ext_dac_hz = new_hz;
695 wm8750_clk_update(s, 1);
696 }
697
698 static I2CSlaveInfo wm8750_info = {
699 .qdev.name = "wm8750",
700 .qdev.size = sizeof(WM8750State),
701 .qdev.vmsd = &vmstate_wm8750,
702 .init = wm8750_init,
703 .event = wm8750_event,
704 .recv = wm8750_rx,
705 .send = wm8750_tx
706 };
707
708 static void wm8750_register_devices(void)
709 {
710 i2c_register_slave(&wm8750_info);
711 }
712
713 device_init(wm8750_register_devices)
QEmu