4 * Copyright (c) 2005-2007 CodeSourcery, LLC
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "dyngen-exec.h"
23 #define SIGNBIT (uint32_t)0x80000000
24 #define SIGNBIT64 ((uint64_t)1 << 63)
26 static void raise_exception(int tt
)
28 env
->exception_index
= tt
;
32 uint32_t HELPER(neon_tbl
)(uint32_t ireg
, uint32_t def
,
33 uint32_t rn
, uint32_t maxindex
)
40 table
= (uint64_t *)&env
->vfp
.regs
[rn
];
42 for (shift
= 0; shift
< 32; shift
+= 8) {
43 index
= (ireg
>> shift
) & 0xff;
44 if (index
< maxindex
) {
45 tmp
= (table
[index
>> 3] >> ((index
& 7) << 3)) & 0xff;
48 val
|= def
& (0xff << shift
);
54 #if !defined(CONFIG_USER_ONLY)
56 #include "softmmu_exec.h"
58 #define MMUSUFFIX _mmu
61 #include "softmmu_template.h"
64 #include "softmmu_template.h"
67 #include "softmmu_template.h"
70 #include "softmmu_template.h"
72 /* try to fill the TLB and return an exception if error. If retaddr is
73 NULL, it means that the function was called in C code (i.e. not
74 from generated code or from helper.c) */
75 /* XXX: fix it to restore all registers */
76 void tlb_fill(CPUARMState
*env1
, target_ulong addr
, int is_write
, int mmu_idx
,
80 CPUARMState
*saved_env
;
85 ret
= cpu_arm_handle_mmu_fault(env
, addr
, is_write
, mmu_idx
);
88 /* now we have a real cpu fault */
89 tb
= tb_find_pc(retaddr
);
91 /* the PC is inside the translated code. It means that we have
92 a virtual CPU fault */
93 cpu_restore_state(tb
, env
, retaddr
);
96 raise_exception(env
->exception_index
);
102 /* FIXME: Pass an explicit pointer to QF to CPUARMState, and move saturating
103 instructions into helper.c */
104 uint32_t HELPER(add_setq
)(uint32_t a
, uint32_t b
)
106 uint32_t res
= a
+ b
;
107 if (((res
^ a
) & SIGNBIT
) && !((a
^ b
) & SIGNBIT
))
112 uint32_t HELPER(add_saturate
)(uint32_t a
, uint32_t b
)
114 uint32_t res
= a
+ b
;
115 if (((res
^ a
) & SIGNBIT
) && !((a
^ b
) & SIGNBIT
)) {
117 res
= ~(((int32_t)a
>> 31) ^ SIGNBIT
);
122 uint32_t HELPER(sub_saturate
)(uint32_t a
, uint32_t b
)
124 uint32_t res
= a
- b
;
125 if (((res
^ a
) & SIGNBIT
) && ((a
^ b
) & SIGNBIT
)) {
127 res
= ~(((int32_t)a
>> 31) ^ SIGNBIT
);
132 uint32_t HELPER(double_saturate
)(int32_t val
)
135 if (val
>= 0x40000000) {
138 } else if (val
<= (int32_t)0xc0000000) {
147 uint32_t HELPER(add_usaturate
)(uint32_t a
, uint32_t b
)
149 uint32_t res
= a
+ b
;
157 uint32_t HELPER(sub_usaturate
)(uint32_t a
, uint32_t b
)
159 uint32_t res
= a
- b
;
167 /* Signed saturation. */
168 static inline uint32_t do_ssat(int32_t val
, int shift
)
174 mask
= (1u << shift
) - 1;
178 } else if (top
< -1) {
185 /* Unsigned saturation. */
186 static inline uint32_t do_usat(int32_t val
, int shift
)
190 max
= (1u << shift
) - 1;
194 } else if (val
> max
) {
201 /* Signed saturate. */
202 uint32_t HELPER(ssat
)(uint32_t x
, uint32_t shift
)
204 return do_ssat(x
, shift
);
207 /* Dual halfword signed saturate. */
208 uint32_t HELPER(ssat16
)(uint32_t x
, uint32_t shift
)
212 res
= (uint16_t)do_ssat((int16_t)x
, shift
);
213 res
|= do_ssat(((int32_t)x
) >> 16, shift
) << 16;
217 /* Unsigned saturate. */
218 uint32_t HELPER(usat
)(uint32_t x
, uint32_t shift
)
220 return do_usat(x
, shift
);
223 /* Dual halfword unsigned saturate. */
224 uint32_t HELPER(usat16
)(uint32_t x
, uint32_t shift
)
228 res
= (uint16_t)do_usat((int16_t)x
, shift
);
229 res
|= do_usat(((int32_t)x
) >> 16, shift
) << 16;
233 void HELPER(wfi
)(void)
235 env
->exception_index
= EXCP_HLT
;
240 void HELPER(exception
)(uint32_t excp
)
242 env
->exception_index
= excp
;
246 uint32_t HELPER(cpsr_read
)(void)
248 return cpsr_read(env
) & ~CPSR_EXEC
;
251 void HELPER(cpsr_write
)(uint32_t val
, uint32_t mask
)
253 cpsr_write(env
, val
, mask
);
256 /* Access to user mode registers from privileged modes. */
257 uint32_t HELPER(get_user_reg
)(uint32_t regno
)
262 val
= env
->banked_r13
[0];
263 } else if (regno
== 14) {
264 val
= env
->banked_r14
[0];
265 } else if (regno
>= 8
266 && (env
->uncached_cpsr
& 0x1f) == ARM_CPU_MODE_FIQ
) {
267 val
= env
->usr_regs
[regno
- 8];
269 val
= env
->regs
[regno
];
274 void HELPER(set_user_reg
)(uint32_t regno
, uint32_t val
)
277 env
->banked_r13
[0] = val
;
278 } else if (regno
== 14) {
279 env
->banked_r14
[0] = val
;
280 } else if (regno
>= 8
281 && (env
->uncached_cpsr
& 0x1f) == ARM_CPU_MODE_FIQ
) {
282 env
->usr_regs
[regno
- 8] = val
;
284 env
->regs
[regno
] = val
;
288 void HELPER(set_cp_reg
)(CPUARMState
*env
, void *rip
, uint32_t value
)
290 const ARMCPRegInfo
*ri
= rip
;
291 int excp
= ri
->writefn(env
, ri
, value
);
293 raise_exception(excp
);
297 uint32_t HELPER(get_cp_reg
)(CPUARMState
*env
, void *rip
)
299 const ARMCPRegInfo
*ri
= rip
;
301 int excp
= ri
->readfn(env
, ri
, &value
);
303 raise_exception(excp
);
308 void HELPER(set_cp_reg64
)(CPUARMState
*env
, void *rip
, uint64_t value
)
310 const ARMCPRegInfo
*ri
= rip
;
311 int excp
= ri
->writefn(env
, ri
, value
);
313 raise_exception(excp
);
317 uint64_t HELPER(get_cp_reg64
)(CPUARMState
*env
, void *rip
)
319 const ARMCPRegInfo
*ri
= rip
;
321 int excp
= ri
->readfn(env
, ri
, &value
);
323 raise_exception(excp
);
328 /* ??? Flag setting arithmetic is awkward because we need to do comparisons.
329 The only way to do that in TCG is a conditional branch, which clobbers
330 all our temporaries. For now implement these as helper functions. */
332 uint32_t HELPER (add_cc
)(uint32_t a
, uint32_t b
)
336 env
->NF
= env
->ZF
= result
;
337 env
->CF
= result
< a
;
338 env
->VF
= (a
^ b
^ -1) & (a
^ result
);
342 uint32_t HELPER(adc_cc
)(uint32_t a
, uint32_t b
)
347 env
->CF
= result
< a
;
350 env
->CF
= result
<= a
;
352 env
->VF
= (a
^ b
^ -1) & (a
^ result
);
353 env
->NF
= env
->ZF
= result
;
357 uint32_t HELPER(sub_cc
)(uint32_t a
, uint32_t b
)
361 env
->NF
= env
->ZF
= result
;
363 env
->VF
= (a
^ b
) & (a
^ result
);
367 uint32_t HELPER(sbc_cc
)(uint32_t a
, uint32_t b
)
377 env
->VF
= (a
^ b
) & (a
^ result
);
378 env
->NF
= env
->ZF
= result
;
382 /* Similarly for variable shift instructions. */
384 uint32_t HELPER(shl
)(uint32_t x
, uint32_t i
)
386 int shift
= i
& 0xff;
392 uint32_t HELPER(shr
)(uint32_t x
, uint32_t i
)
394 int shift
= i
& 0xff;
397 return (uint32_t)x
>> shift
;
400 uint32_t HELPER(sar
)(uint32_t x
, uint32_t i
)
402 int shift
= i
& 0xff;
405 return (int32_t)x
>> shift
;
408 uint32_t HELPER(shl_cc
)(uint32_t x
, uint32_t i
)
410 int shift
= i
& 0xff;
417 } else if (shift
!= 0) {
418 env
->CF
= (x
>> (32 - shift
)) & 1;
424 uint32_t HELPER(shr_cc
)(uint32_t x
, uint32_t i
)
426 int shift
= i
& 0xff;
429 env
->CF
= (x
>> 31) & 1;
433 } else if (shift
!= 0) {
434 env
->CF
= (x
>> (shift
- 1)) & 1;
440 uint32_t HELPER(sar_cc
)(uint32_t x
, uint32_t i
)
442 int shift
= i
& 0xff;
444 env
->CF
= (x
>> 31) & 1;
445 return (int32_t)x
>> 31;
446 } else if (shift
!= 0) {
447 env
->CF
= (x
>> (shift
- 1)) & 1;
448 return (int32_t)x
>> shift
;
453 uint32_t HELPER(ror_cc
)(uint32_t x
, uint32_t i
)
457 shift
= shift1
& 0x1f;
460 env
->CF
= (x
>> 31) & 1;
463 env
->CF
= (x
>> (shift
- 1)) & 1;
464 return ((uint32_t)x
>> shift
) | (x
<< (32 - shift
));