hw/i386/acpi-dsdt.dsl

   1 /*
   2  * Bochs/QEMU ACPI DSDT ASL definition
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License version 2 as published by the Free Software Foundation.
   9  *
  10  * This library is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * Lesser General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU Lesser General Public
  16  * License along with this library; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  18  */
  19
  20 ACPI_EXTRACT_ALL_CODE AcpiDsdtAmlCode
  21
  22 DefinitionBlock (
  23     "acpi-dsdt.aml",    // Output Filename
  24     "DSDT",             // Signature
  25     0x01,               // DSDT Compliance Revision
  26     "BXPC",             // OEMID
  27     "BXDSDT",           // TABLE ID
  28     0x1                 // OEM Revision
  29     )
  30 {
  31
  32 #include "acpi-dsdt-dbug.dsl"
  33
  34
  35 /****************************************************************
  36  * PCI Bus definition
  37  ****************************************************************/
  38 #define BOARD_SPECIFIC_PCI_RESOURSES \
  39      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  40          0x0000, \
  41          0x0000, \
  42          0x0CF7, \
  43          0x0000, \
  44          0x0CF8, \
  45          ,, , TypeStatic) \
  46      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  47          0x0000, \
  48          0x0D00, \
  49          0xADFF, \
  50          0x0000, \
  51          0xA100, \
  52          ,, , TypeStatic) \
  53      /* 0xae00-0xae0e hole for PCI hotplug, hw/acpi/piix4.c:PCI_HOTPLUG_ADDR */ \
  54      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  55          0x0000, \
  56          0xAE0F, \
  57          0xAEFF, \
  58          0x0000, \
  59          0x00F1, \
  60          ,, , TypeStatic) \
  61      /* 0xaf00-0xaf1f hole for CPU hotplug, hw/acpi/piix4.c:PIIX4_PROC_BASE */ \
  62      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  63          0x0000, \
  64          0xAF20, \
  65          0xAFDF, \
  66          0x0000, \
  67          0x00C0, \
  68          ,, , TypeStatic) \
  69      /* 0xafe0-0xafe3 hole for ACPI.GPE0, hw/acpi/piix4.c:GPE_BASE */ \
  70      WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
  71          0x0000, \
  72          0xAFE4, \
  73          0xFFFF, \
  74          0x0000, \
  75          0x501C, \
  76          ,, , TypeStatic)
  77
  78     Scope(\_SB) {
  79         Device(PCI0) {
  80             Name(_HID, EisaId("PNP0A03"))
  81             Name(_ADR, 0x00)
  82             Name(_UID, 1)
  83         }
  84     }
  85
  86 #include "acpi-dsdt-pci-crs.dsl"
  87 #include "acpi-dsdt-hpet.dsl"
  88
  89
  90 /****************************************************************
  91  * VGA
  92  ****************************************************************/
  93
  94     Scope(\_SB.PCI0) {
  95         Device(VGA) {
  96             Name(_ADR, 0x00020000)
  97             OperationRegion(PCIC, PCI_Config, Zero, 0x4)
  98             Field(PCIC, DWordAcc, NoLock, Preserve) {
  99                 VEND, 32
 100             }
 101             Method(_S1D, 0, NotSerialized) {
 102                 Return (0x00)
 103             }
 104             Method(_S2D, 0, NotSerialized) {
 105                 Return (0x00)
 106             }
 107             Method(_S3D, 0, NotSerialized) {
 108                 If (LEqual(VEND, 0x1001b36)) {
 109                     Return (0x03)           // QXL
 110                 } Else {
 111                     Return (0x00)
 112                 }
 113             }
 114         }
 115     }
 116
 117
 118 /****************************************************************
 119  * PIIX4 PM
 120  ****************************************************************/
 121
 122     Scope(\_SB.PCI0) {
 123         Device(PX13) {
 124             Name(_ADR, 0x00010003)
 125             OperationRegion(P13C, PCI_Config, 0x00, 0xff)
 126         }
 127     }
 128
 129
 130 /****************************************************************
 131  * PIIX3 ISA bridge
 132  ****************************************************************/
 133
 134     Scope(\_SB.PCI0) {
 135         Device(ISA) {
 136             Name(_ADR, 0x00010000)
 137
 138             /* PIIX PCI to ISA irq remapping */
 139             OperationRegion(P40C, PCI_Config, 0x60, 0x04)
 140
 141             /* enable bits */
 142             Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) {
 143                 Offset(0x5f),
 144                 , 7,
 145                 LPEN, 1,         // LPT
 146                 Offset(0x67),
 147                 , 3,
 148                 CAEN, 1,         // COM1
 149                 , 3,
 150                 CBEN, 1,         // COM2
 151             }
 152             Name(FDEN, 1)
 153         }
 154     }
 155
 156 #define DSDT_APPLESMC_STA piix_dsdt_applesmc_sta
 157 #include "acpi-dsdt-isa.dsl"
 158
 159
 160 /****************************************************************
 161  * PCI hotplug
 162  ****************************************************************/
 163
 164     Scope(\_SB.PCI0) {
 165         OperationRegion(PCST, SystemIO, 0xae00, 0x08)
 166         Field(PCST, DWordAcc, NoLock, WriteAsZeros) {
 167             PCIU, 32,
 168             PCID, 32,
 169         }
 170
 171         OperationRegion(SEJ, SystemIO, 0xae08, 0x04)
 172         Field(SEJ, DWordAcc, NoLock, WriteAsZeros) {
 173             B0EJ, 32,
 174         }
 175
 176         OperationRegion(BNMR, SystemIO, 0xae10, 0x04)
 177         Field(BNMR, DWordAcc, NoLock, WriteAsZeros) {
 178             BNUM, 32,
 179         }
 180
 181         /* Lock to protect access to fields above. */
 182         Mutex(BLCK, 0)
 183
 184         /* Methods called by bulk generated PCI devices below */
 185
 186         /* Methods called by hotplug devices */
 187         Method(PCEJ, 2, NotSerialized) {
 188             // _EJ0 method - eject callback
 189             Acquire(BLCK, 0xFFFF)
 190             Store(Arg0, BNUM)
 191             Store(ShiftLeft(1, Arg1), B0EJ)
 192             Release(BLCK)
 193             Return (0x0)
 194         }
 195
 196         /* Hotplug notification method supplied by SSDT */
 197         External(\_SB.PCI0.PCNT, MethodObj)
 198     }
 199
 200
 201 /****************************************************************
 202  * PCI IRQs
 203  ****************************************************************/
 204
 205     Scope(\_SB) {
 206         Scope(PCI0) {
 207             Name(_PRT, Package() {
 208                 /* PCI IRQ routing table, example from ACPI 2.0a specification,
 209                    section 6.2.8.1 */
 210                 /* Note: we provide the same info as the PCI routing
 211                    table of the Bochs BIOS */
 212
 213 #define prt_slot(nr, lnk0, lnk1, lnk2, lnk3) \
 214     Package() { nr##ffff, 0, lnk0, 0 }, \
 215     Package() { nr##ffff, 1, lnk1, 0 }, \
 216     Package() { nr##ffff, 2, lnk2, 0 }, \
 217     Package() { nr##ffff, 3, lnk3, 0 }
 218
 219 #define prt_slot0(nr) prt_slot(nr, LNKD, LNKA, LNKB, LNKC)
 220 #define prt_slot1(nr) prt_slot(nr, LNKA, LNKB, LNKC, LNKD)
 221 #define prt_slot2(nr) prt_slot(nr, LNKB, LNKC, LNKD, LNKA)
 222 #define prt_slot3(nr) prt_slot(nr, LNKC, LNKD, LNKA, LNKB)
 223
 224                 prt_slot0(0x0000),
 225                 /* Device 1 is power mgmt device, and can only use irq 9 */
 226                 prt_slot(0x0001, LNKS, LNKB, LNKC, LNKD),
 227                 prt_slot2(0x0002),
 228                 prt_slot3(0x0003),
 229                 prt_slot0(0x0004),
 230                 prt_slot1(0x0005),
 231                 prt_slot2(0x0006),
 232                 prt_slot3(0x0007),
 233                 prt_slot0(0x0008),
 234                 prt_slot1(0x0009),
 235                 prt_slot2(0x000a),
 236                 prt_slot3(0x000b),
 237                 prt_slot0(0x000c),
 238                 prt_slot1(0x000d),
 239                 prt_slot2(0x000e),
 240                 prt_slot3(0x000f),
 241                 prt_slot0(0x0010),
 242                 prt_slot1(0x0011),
 243                 prt_slot2(0x0012),
 244                 prt_slot3(0x0013),
 245                 prt_slot0(0x0014),
 246                 prt_slot1(0x0015),
 247                 prt_slot2(0x0016),
 248                 prt_slot3(0x0017),
 249                 prt_slot0(0x0018),
 250                 prt_slot1(0x0019),
 251                 prt_slot2(0x001a),
 252                 prt_slot3(0x001b),
 253                 prt_slot0(0x001c),
 254                 prt_slot1(0x001d),
 255                 prt_slot2(0x001e),
 256                 prt_slot3(0x001f),
 257             })
 258         }
 259
 260         Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) {
 261             PRQ0,   8,
 262             PRQ1,   8,
 263             PRQ2,   8,
 264             PRQ3,   8
 265         }
 266
 267         Method(IQST, 1, NotSerialized) {
 268             // _STA method - get status
 269             If (And(0x80, Arg0)) {
 270                 Return (0x09)
 271             }
 272             Return (0x0B)
 273         }
 274         Method(IQCR, 1, Serialized) {
 275             // _CRS method - get current settings
 276             Name(PRR0, ResourceTemplate() {
 277                 Interrupt(, Level, ActiveHigh, Shared) { 0 }
 278             })
 279             CreateDWordField(PRR0, 0x05, PRRI)
 280             If (LLess(Arg0, 0x80)) {
 281                 Store(Arg0, PRRI)
 282             }
 283             Return (PRR0)
 284         }
 285
 286 #define define_link(link, uid, reg)                             \
 287         Device(link) {                                          \
 288             Name(_HID, EISAID("PNP0C0F"))                       \
 289             Name(_UID, uid)                                     \
 290             Name(_PRS, ResourceTemplate() {                     \
 291                 Interrupt(, Level, ActiveHigh, Shared) {        \
 292                     5, 10, 11                                   \
 293                 }                                               \
 294             })                                                  \
 295             Method(_STA, 0, NotSerialized) {                    \
 296                 Return (IQST(reg))                              \
 297             }                                                   \
 298             Method(_DIS, 0, NotSerialized) {                    \
 299                 Or(reg, 0x80, reg)                              \
 300             }                                                   \
 301             Method(_CRS, 0, NotSerialized) {                    \
 302                 Return (IQCR(reg))                              \
 303             }                                                   \
 304             Method(_SRS, 1, NotSerialized) {                    \
 305                 CreateDWordField(Arg0, 0x05, PRRI)              \
 306                 Store(PRRI, reg)                                \
 307             }                                                   \
 308         }
 309
 310         define_link(LNKA, 0, PRQ0)
 311         define_link(LNKB, 1, PRQ1)
 312         define_link(LNKC, 2, PRQ2)
 313         define_link(LNKD, 3, PRQ3)
 314
 315         Device(LNKS) {
 316             Name(_HID, EISAID("PNP0C0F"))
 317             Name(_UID, 4)
 318             Name(_PRS, ResourceTemplate() {
 319                 Interrupt(, Level, ActiveHigh, Shared) { 9 }
 320             })
 321
 322             // The SCI cannot be disabled and is always attached to GSI 9,
 323             // so these are no-ops.  We only need this link to override the
 324             // polarity to active high and match the content of the MADT.
 325             Method(_STA, 0, NotSerialized) { Return (0x0b) }
 326             Method(_DIS, 0, NotSerialized) { }
 327             Method(_CRS, 0, NotSerialized) { Return (_PRS) }
 328             Method(_SRS, 1, NotSerialized) { }
 329         }
 330     }
 331
 332 #include "hw/acpi/cpu_hotplug_defs.h"
 333 #define CPU_STATUS_BASE PIIX4_CPU_HOTPLUG_IO_BASE
 334 #include "acpi-dsdt-cpu-hotplug.dsl"
 335
 336
 337 /****************************************************************
 338  * General purpose events
 339  ****************************************************************/
 340
 341     Scope(\_GPE) {
 342         Name(_HID, "ACPI0006")
 343
 344         Method(_L00) {
 345         }
 346         Method(_E01) {
 347             // PCI hotplug event
 348             Acquire(\_SB.PCI0.BLCK, 0xFFFF)
 349             \_SB.PCI0.PCNT()
 350             Release(\_SB.PCI0.BLCK)
 351         }
 352         Method(_E02) {
 353             // CPU hotplug event
 354             \_SB.PRSC()
 355         }
 356         Method(_L03) {
 357         }
 358         Method(_L04) {
 359         }
 360         Method(_L05) {
 361         }
 362         Method(_L06) {
 363         }
 364         Method(_L07) {
 365         }
 366         Method(_L08) {
 367         }
 368         Method(_L09) {
 369         }
 370         Method(_L0A) {
 371         }
 372         Method(_L0B) {
 373         }
 374         Method(_L0C) {
 375         }
 376         Method(_L0D) {
 377         }
 378         Method(_L0E) {
 379         }
 380         Method(_L0F) {
 381         }
 382     }
 383 }