sockets: add unix_connect_opts
[qemu.git] / hw / virtio-pci.c
blobf7a51ff7611cb47e363e6ef816f083f7f3d35ccf
1 /*
2 * Virtio PCI Bindings
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
16 #include <inttypes.h>
18 #include "virtio.h"
19 #include "pci.h"
20 #include "sysemu.h"
21 #include "msix.h"
22 #include "net.h"
24 /* from Linux's linux/virtio_pci.h */
26 /* A 32-bit r/o bitmask of the features supported by the host */
27 #define VIRTIO_PCI_HOST_FEATURES 0
29 /* A 32-bit r/w bitmask of features activated by the guest */
30 #define VIRTIO_PCI_GUEST_FEATURES 4
32 /* A 32-bit r/w PFN for the currently selected queue */
33 #define VIRTIO_PCI_QUEUE_PFN 8
35 /* A 16-bit r/o queue size for the currently selected queue */
36 #define VIRTIO_PCI_QUEUE_NUM 12
38 /* A 16-bit r/w queue selector */
39 #define VIRTIO_PCI_QUEUE_SEL 14
41 /* A 16-bit r/w queue notifier */
42 #define VIRTIO_PCI_QUEUE_NOTIFY 16
44 /* An 8-bit device status register. */
45 #define VIRTIO_PCI_STATUS 18
47 /* An 8-bit r/o interrupt status register. Reading the value will return the
48 * current contents of the ISR and will also clear it. This is effectively
49 * a read-and-acknowledge. */
50 #define VIRTIO_PCI_ISR 19
52 /* MSI-X registers: only enabled if MSI-X is enabled. */
53 /* A 16-bit vector for configuration changes. */
54 #define VIRTIO_MSI_CONFIG_VECTOR 20
55 /* A 16-bit vector for selected queue notifications. */
56 #define VIRTIO_MSI_QUEUE_VECTOR 22
58 /* Config space size */
59 #define VIRTIO_PCI_CONFIG_NOMSI 20
60 #define VIRTIO_PCI_CONFIG_MSI 24
61 #define VIRTIO_PCI_REGION_SIZE(dev) (msix_present(dev) ? \
62 VIRTIO_PCI_CONFIG_MSI : \
63 VIRTIO_PCI_CONFIG_NOMSI)
65 /* The remaining space is defined by each driver as the per-driver
66 * configuration space */
67 #define VIRTIO_PCI_CONFIG(dev) (msix_enabled(dev) ? \
68 VIRTIO_PCI_CONFIG_MSI : \
69 VIRTIO_PCI_CONFIG_NOMSI)
71 /* Virtio ABI version, if we increment this, we break the guest driver. */
72 #define VIRTIO_PCI_ABI_VERSION 0
74 /* How many bits to shift physical queue address written to QUEUE_PFN.
75 * 12 is historical, and due to x86 page size. */
76 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
78 /* QEMU doesn't strictly need write barriers since everything runs in
79 * lock-step. We'll leave the calls to wmb() in though to make it obvious for
80 * KVM or if kqemu gets SMP support.
82 #define wmb() do { } while (0)
84 /* PCI bindings. */
86 typedef struct {
87 PCIDevice pci_dev;
88 VirtIODevice *vdev;
89 uint32_t addr;
90 uint32_t class_code;
91 uint32_t nvectors;
92 DriveInfo *dinfo;
93 } VirtIOPCIProxy;
95 /* virtio device */
97 static void virtio_pci_notify(void *opaque, uint16_t vector)
99 VirtIOPCIProxy *proxy = opaque;
100 if (msix_enabled(&proxy->pci_dev))
101 msix_notify(&proxy->pci_dev, vector);
102 else
103 qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
106 static void virtio_pci_save_config(void * opaque, QEMUFile *f)
108 VirtIOPCIProxy *proxy = opaque;
109 pci_device_save(&proxy->pci_dev, f);
110 msix_save(&proxy->pci_dev, f);
111 if (msix_present(&proxy->pci_dev))
112 qemu_put_be16(f, proxy->vdev->config_vector);
115 static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
117 VirtIOPCIProxy *proxy = opaque;
118 if (msix_present(&proxy->pci_dev))
119 qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
122 static int virtio_pci_load_config(void * opaque, QEMUFile *f)
124 VirtIOPCIProxy *proxy = opaque;
125 int ret;
126 ret = pci_device_load(&proxy->pci_dev, f);
127 if (ret) {
128 return ret;
130 msix_load(&proxy->pci_dev, f);
131 if (msix_present(&proxy->pci_dev)) {
132 qemu_get_be16s(f, &proxy->vdev->config_vector);
133 } else {
134 proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
136 if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
137 return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
139 return 0;
142 static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
144 VirtIOPCIProxy *proxy = opaque;
145 uint16_t vector;
146 if (msix_present(&proxy->pci_dev)) {
147 qemu_get_be16s(f, &vector);
148 } else {
149 vector = VIRTIO_NO_VECTOR;
151 virtio_queue_set_vector(proxy->vdev, n, vector);
152 if (vector != VIRTIO_NO_VECTOR) {
153 return msix_vector_use(&proxy->pci_dev, vector);
155 return 0;
158 static void virtio_pci_reset(void *opaque)
160 VirtIOPCIProxy *proxy = opaque;
161 virtio_reset(proxy->vdev);
162 msix_reset(&proxy->pci_dev);
165 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
167 VirtIOPCIProxy *proxy = opaque;
168 VirtIODevice *vdev = proxy->vdev;
169 target_phys_addr_t pa;
171 switch (addr) {
172 case VIRTIO_PCI_GUEST_FEATURES:
173 /* Guest does not negotiate properly? We have to assume nothing. */
174 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
175 if (vdev->bad_features)
176 val = vdev->bad_features(vdev);
177 else
178 val = 0;
180 if (vdev->set_features)
181 vdev->set_features(vdev, val);
182 vdev->features = val;
183 break;
184 case VIRTIO_PCI_QUEUE_PFN:
185 pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
186 if (pa == 0)
187 virtio_pci_reset(proxy);
188 else
189 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
190 break;
191 case VIRTIO_PCI_QUEUE_SEL:
192 if (val < VIRTIO_PCI_QUEUE_MAX)
193 vdev->queue_sel = val;
194 break;
195 case VIRTIO_PCI_QUEUE_NOTIFY:
196 virtio_queue_notify(vdev, val);
197 break;
198 case VIRTIO_PCI_STATUS:
199 vdev->status = val & 0xFF;
200 if (vdev->status == 0)
201 virtio_pci_reset(proxy);
202 break;
203 case VIRTIO_MSI_CONFIG_VECTOR:
204 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
205 /* Make it possible for guest to discover an error took place. */
206 if (msix_vector_use(&proxy->pci_dev, val) < 0)
207 val = VIRTIO_NO_VECTOR;
208 vdev->config_vector = val;
209 break;
210 case VIRTIO_MSI_QUEUE_VECTOR:
211 msix_vector_unuse(&proxy->pci_dev,
212 virtio_queue_vector(vdev, vdev->queue_sel));
213 /* Make it possible for guest to discover an error took place. */
214 if (msix_vector_use(&proxy->pci_dev, val) < 0)
215 val = VIRTIO_NO_VECTOR;
216 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
217 break;
218 default:
219 fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
220 __func__, addr, val);
221 break;
225 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
227 VirtIODevice *vdev = proxy->vdev;
228 uint32_t ret = 0xFFFFFFFF;
230 switch (addr) {
231 case VIRTIO_PCI_HOST_FEATURES:
232 ret = vdev->get_features(vdev);
233 ret |= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
234 ret |= (1 << VIRTIO_RING_F_INDIRECT_DESC);
235 ret |= (1 << VIRTIO_F_BAD_FEATURE);
236 break;
237 case VIRTIO_PCI_GUEST_FEATURES:
238 ret = vdev->features;
239 break;
240 case VIRTIO_PCI_QUEUE_PFN:
241 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
242 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
243 break;
244 case VIRTIO_PCI_QUEUE_NUM:
245 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
246 break;
247 case VIRTIO_PCI_QUEUE_SEL:
248 ret = vdev->queue_sel;
249 break;
250 case VIRTIO_PCI_STATUS:
251 ret = vdev->status;
252 break;
253 case VIRTIO_PCI_ISR:
254 /* reading from the ISR also clears it. */
255 ret = vdev->isr;
256 vdev->isr = 0;
257 qemu_set_irq(proxy->pci_dev.irq[0], 0);
258 break;
259 case VIRTIO_MSI_CONFIG_VECTOR:
260 ret = vdev->config_vector;
261 break;
262 case VIRTIO_MSI_QUEUE_VECTOR:
263 ret = virtio_queue_vector(vdev, vdev->queue_sel);
264 break;
265 default:
266 break;
269 return ret;
272 static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
274 VirtIOPCIProxy *proxy = opaque;
275 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
276 addr -= proxy->addr;
277 if (addr < config)
278 return virtio_ioport_read(proxy, addr);
279 addr -= config;
280 return virtio_config_readb(proxy->vdev, addr);
283 static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
285 VirtIOPCIProxy *proxy = opaque;
286 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
287 addr -= proxy->addr;
288 if (addr < config)
289 return virtio_ioport_read(proxy, addr);
290 addr -= config;
291 return virtio_config_readw(proxy->vdev, addr);
294 static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
296 VirtIOPCIProxy *proxy = opaque;
297 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
298 addr -= proxy->addr;
299 if (addr < config)
300 return virtio_ioport_read(proxy, addr);
301 addr -= config;
302 return virtio_config_readl(proxy->vdev, addr);
305 static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
307 VirtIOPCIProxy *proxy = opaque;
308 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
309 addr -= proxy->addr;
310 if (addr < config) {
311 virtio_ioport_write(proxy, addr, val);
312 return;
314 addr -= config;
315 virtio_config_writeb(proxy->vdev, addr, val);
318 static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
320 VirtIOPCIProxy *proxy = opaque;
321 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
322 addr -= proxy->addr;
323 if (addr < config) {
324 virtio_ioport_write(proxy, addr, val);
325 return;
327 addr -= config;
328 virtio_config_writew(proxy->vdev, addr, val);
331 static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
333 VirtIOPCIProxy *proxy = opaque;
334 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
335 addr -= proxy->addr;
336 if (addr < config) {
337 virtio_ioport_write(proxy, addr, val);
338 return;
340 addr -= config;
341 virtio_config_writel(proxy->vdev, addr, val);
344 static void virtio_map(PCIDevice *pci_dev, int region_num,
345 uint32_t addr, uint32_t size, int type)
347 VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
348 VirtIODevice *vdev = proxy->vdev;
349 unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
351 proxy->addr = addr;
353 register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
354 register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
355 register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
356 register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
357 register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
358 register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
360 if (vdev->config_len)
361 vdev->get_config(vdev, vdev->config);
364 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
365 uint32_t val, int len)
367 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
369 if (PCI_COMMAND == address) {
370 if (!(val & PCI_COMMAND_MASTER)) {
371 proxy->vdev->status &= !VIRTIO_CONFIG_S_DRIVER_OK;
375 pci_default_write_config(pci_dev, address, val, len);
376 if(proxy->vdev->nvectors)
377 msix_write_config(pci_dev, address, val, len);
380 static const VirtIOBindings virtio_pci_bindings = {
381 .notify = virtio_pci_notify,
382 .save_config = virtio_pci_save_config,
383 .load_config = virtio_pci_load_config,
384 .save_queue = virtio_pci_save_queue,
385 .load_queue = virtio_pci_load_queue,
388 static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
389 uint16_t vendor, uint16_t device,
390 uint16_t class_code, uint8_t pif)
392 uint8_t *config;
393 uint32_t size;
395 proxy->vdev = vdev;
397 config = proxy->pci_dev.config;
398 pci_config_set_vendor_id(config, vendor);
399 pci_config_set_device_id(config, device);
401 config[0x08] = VIRTIO_PCI_ABI_VERSION;
403 config[0x09] = pif;
404 pci_config_set_class(config, class_code);
405 config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
407 config[0x2c] = vendor & 0xFF;
408 config[0x2d] = (vendor >> 8) & 0xFF;
409 config[0x2e] = vdev->device_id & 0xFF;
410 config[0x2f] = (vdev->device_id >> 8) & 0xFF;
412 config[0x3d] = 1;
414 if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
415 pci_register_bar(&proxy->pci_dev, 1,
416 msix_bar_size(&proxy->pci_dev),
417 PCI_ADDRESS_SPACE_MEM,
418 msix_mmio_map);
419 proxy->pci_dev.unregister = msix_uninit;
420 } else
421 vdev->nvectors = 0;
423 proxy->pci_dev.config_write = virtio_write_config;
425 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
426 if (size & (size-1))
427 size = 1 << qemu_fls(size);
429 pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
430 virtio_map);
432 qemu_register_reset(virtio_pci_reset, proxy);
434 virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
437 static int virtio_blk_init_pci(PCIDevice *pci_dev)
439 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
440 VirtIODevice *vdev;
442 if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
443 proxy->class_code != PCI_CLASS_STORAGE_OTHER)
444 proxy->class_code = PCI_CLASS_STORAGE_SCSI;
446 if (!proxy->dinfo) {
447 qemu_error("virtio-blk-pci: drive property not set\n");
448 return -1;
450 vdev = virtio_blk_init(&pci_dev->qdev, proxy->dinfo);
451 vdev->nvectors = proxy->nvectors;
452 virtio_init_pci(proxy, vdev,
453 PCI_VENDOR_ID_REDHAT_QUMRANET,
454 PCI_DEVICE_ID_VIRTIO_BLOCK,
455 proxy->class_code, 0x00);
456 /* make the actual value visible */
457 proxy->nvectors = vdev->nvectors;
458 return 0;
461 static int virtio_console_init_pci(PCIDevice *pci_dev)
463 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
464 VirtIODevice *vdev;
466 if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
467 proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
468 proxy->class_code != PCI_CLASS_OTHERS) /* qemu-kvm */
469 proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
471 vdev = virtio_console_init(&pci_dev->qdev);
472 virtio_init_pci(proxy, vdev,
473 PCI_VENDOR_ID_REDHAT_QUMRANET,
474 PCI_DEVICE_ID_VIRTIO_CONSOLE,
475 proxy->class_code, 0x00);
476 return 0;
479 static int virtio_net_init_pci(PCIDevice *pci_dev)
481 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
482 VirtIODevice *vdev;
484 vdev = virtio_net_init(&pci_dev->qdev);
486 /* set nvectors from property, unless the user specified something
487 * via -net nic,model=virtio,vectors=n command line option */
488 if (pci_dev->qdev.nd->nvectors == NIC_NVECTORS_UNSPECIFIED)
489 if (proxy->nvectors != NIC_NVECTORS_UNSPECIFIED)
490 vdev->nvectors = proxy->nvectors;
492 virtio_init_pci(proxy, vdev,
493 PCI_VENDOR_ID_REDHAT_QUMRANET,
494 PCI_DEVICE_ID_VIRTIO_NET,
495 PCI_CLASS_NETWORK_ETHERNET,
496 0x00);
498 /* make the actual value visible */
499 proxy->nvectors = vdev->nvectors;
500 return 0;
503 static int virtio_balloon_init_pci(PCIDevice *pci_dev)
505 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
506 VirtIODevice *vdev;
508 vdev = virtio_balloon_init(&pci_dev->qdev);
509 virtio_init_pci(proxy, vdev,
510 PCI_VENDOR_ID_REDHAT_QUMRANET,
511 PCI_DEVICE_ID_VIRTIO_BALLOON,
512 PCI_CLASS_MEMORY_RAM,
513 0x00);
514 return 0;
517 static PCIDeviceInfo virtio_info[] = {
519 .qdev.name = "virtio-blk-pci",
520 .qdev.size = sizeof(VirtIOPCIProxy),
521 .init = virtio_blk_init_pci,
522 .qdev.props = (Property[]) {
523 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
524 DEFINE_PROP_DRIVE("drive", VirtIOPCIProxy, dinfo),
525 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
526 DEFINE_PROP_END_OF_LIST(),
529 .qdev.name = "virtio-net-pci",
530 .qdev.size = sizeof(VirtIOPCIProxy),
531 .init = virtio_net_init_pci,
532 .qdev.props = (Property[]) {
533 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
534 NIC_NVECTORS_UNSPECIFIED),
535 DEFINE_PROP_END_OF_LIST(),
538 .qdev.name = "virtio-console-pci",
539 .qdev.size = sizeof(VirtIOPCIProxy),
540 .init = virtio_console_init_pci,
541 .qdev.props = (Property[]) {
542 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
543 DEFINE_PROP_END_OF_LIST(),
546 .qdev.name = "virtio-balloon-pci",
547 .qdev.size = sizeof(VirtIOPCIProxy),
548 .init = virtio_balloon_init_pci,
550 /* end of list */
554 static void virtio_pci_register_devices(void)
556 pci_qdev_register_many(virtio_info);
559 device_init(virtio_pci_register_devices)