hw/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  */
   9
  10 #include "hw.h"
  11 #include "pxa.h"
  12 #include "arm-misc.h"
  13 #include "sysemu.h"
  14 #include "pcmcia.h"
  15 #include "i2c.h"
  16 #include "ssi.h"
  17 #include "flash.h"
  18 #include "qemu-timer.h"
  19 #include "devices.h"
  20 #include "sharpsl.h"
  21 #include "console.h"
  22 #include "block.h"
  23 #include "audio/audio.h"
  24 #include "boards.h"
  25 #include "blockdev.h"
  26 #include "sysbus.h"
  27
  28 #undef REG_FMT
  29 #define REG_FMT                 "0x%02lx"
  30
  31 /* Spitz Flash */
  32 #define FLASH_BASE              0x0c000000
  33 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  34 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  35 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  36 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  37 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  38 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  39 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  40
  41 #define FLASHCTL_CE0            (1 << 0)
  42 #define FLASHCTL_CLE            (1 << 1)
  43 #define FLASHCTL_ALE            (1 << 2)
  44 #define FLASHCTL_WP             (1 << 3)
  45 #define FLASHCTL_CE1            (1 << 4)
  46 #define FLASHCTL_RYBY           (1 << 5)
  47 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  48
  49 typedef struct {
  50     SysBusDevice busdev;
  51     DeviceState *nand;
  52     uint8_t ctl;
  53     uint8_t manf_id;
  54     uint8_t chip_id;
  55     ECCState ecc;
  56 } SLNANDState;
  57
  58 static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
  59 {
  60     SLNANDState *s = (SLNANDState *) opaque;
  61     int ryby;
  62
  63     switch (addr) {
  64 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
  65     case FLASH_ECCLPLB:
  66         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
  67                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
  68
  69 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
  70     case FLASH_ECCLPUB:
  71         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
  72                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
  73
  74     case FLASH_ECCCP:
  75         return s->ecc.cp;
  76
  77     case FLASH_ECCCNTR:
  78         return s->ecc.count & 0xff;
  79
  80     case FLASH_FLASHCTL:
  81         nand_getpins(s->nand, &ryby);
  82         if (ryby)
  83             return s->ctl | FLASHCTL_RYBY;
  84         else
  85             return s->ctl;
  86
  87     case FLASH_FLASHIO:
  88         return ecc_digest(&s->ecc, nand_getio(s->nand));
  89
  90     default:
  91         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
  92     }
  93     return 0;
  94 }
  95
  96 static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
  97 {
  98     SLNANDState *s = (SLNANDState *) opaque;
  99
 100     if (addr == FLASH_FLASHIO)
 101         return ecc_digest(&s->ecc, nand_getio(s->nand)) |
 102                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
 103
 104     return sl_readb(opaque, addr);
 105 }
 106
 107 static void sl_writeb(void *opaque, target_phys_addr_t addr,
 108                 uint32_t value)
 109 {
 110     SLNANDState *s = (SLNANDState *) opaque;
 111
 112     switch (addr) {
 113     case FLASH_ECCCLRR:
 114         /* Value is ignored.  */
 115         ecc_reset(&s->ecc);
 116         break;
 117
 118     case FLASH_FLASHCTL:
 119         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 120         nand_setpins(s->nand,
 121                         s->ctl & FLASHCTL_CLE,
 122                         s->ctl & FLASHCTL_ALE,
 123                         s->ctl & FLASHCTL_NCE,
 124                         s->ctl & FLASHCTL_WP,
 125                         0);
 126         break;
 127
 128     case FLASH_FLASHIO:
 129         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 130         break;
 131
 132     default:
 133         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 134     }
 135 }
 136
 137 enum {
 138     FLASH_128M,
 139     FLASH_1024M,
 140 };
 141
 142 static CPUReadMemoryFunc * const sl_readfn[] = {
 143     sl_readb,
 144     sl_readb,
 145     sl_readl,
 146 };
 147 static CPUWriteMemoryFunc * const sl_writefn[] = {
 148     sl_writeb,
 149     sl_writeb,
 150     sl_writeb,
 151 };
 152
 153 static void sl_flash_register(PXA2xxState *cpu, int size)
 154 {
 155     DeviceState *dev;
 156
 157     dev = qdev_create(NULL, "sl-nand");
 158
 159     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 160     if (size == FLASH_128M)
 161         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 162     else if (size == FLASH_1024M)
 163         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 164
 165     qdev_init_nofail(dev);
 166     sysbus_mmio_map(sysbus_from_qdev(dev), 0, FLASH_BASE);
 167 }
 168
 169 static int sl_nand_init(SysBusDevice *dev) {
 170     int iomemtype;
 171     SLNANDState *s;
 172     DriveInfo *nand;
 173
 174     s = FROM_SYSBUS(SLNANDState, dev);
 175
 176     s->ctl = 0;
 177     nand = drive_get(IF_MTD, 0, 0);
 178     s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
 179
 180     iomemtype = cpu_register_io_memory(sl_readfn,
 181                     sl_writefn, s, DEVICE_NATIVE_ENDIAN);
 182
 183     sysbus_init_mmio(dev, 0x40, iomemtype);
 184
 185     return 0;
 186 }
 187
 188 /* Spitz Keyboard */
 189
 190 #define SPITZ_KEY_STROBE_NUM    11
 191 #define SPITZ_KEY_SENSE_NUM     7
 192
 193 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 194     12, 17, 91, 34, 36, 38, 39
 195 };
 196
 197 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 198     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 199 };
 200
 201 /* Eighth additional row maps the special keys */
 202 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 203     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 204     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 205     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 206     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 207     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 208     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 209     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 210     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 211 };
 212
 213 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 214 #define SPITZ_GPIO_SYNC         16      /* Sync button */
 215 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 216 #define SPITZ_GPIO_SWA          97      /* Lid */
 217 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 218
 219 /* The special buttons are mapped to unused keys */
 220 static const int spitz_gpiomap[5] = {
 221     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 222     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 223 };
 224
 225 typedef struct {
 226     SysBusDevice busdev;
 227     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 228     qemu_irq gpiomap[5];
 229     int keymap[0x80];
 230     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 231     uint16_t strobe_state;
 232     uint16_t sense_state;
 233
 234     uint16_t pre_map[0x100];
 235     uint16_t modifiers;
 236     uint16_t imodifiers;
 237     uint8_t fifo[16];
 238     int fifopos, fifolen;
 239     QEMUTimer *kbdtimer;
 240 } SpitzKeyboardState;
 241
 242 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 243 {
 244     int i;
 245     uint16_t strobe, sense = 0;
 246     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 247         strobe = s->keyrow[i] & s->strobe_state;
 248         if (strobe) {
 249             sense |= 1 << i;
 250             if (!(s->sense_state & (1 << i)))
 251                 qemu_irq_raise(s->sense[i]);
 252         } else if (s->sense_state & (1 << i))
 253             qemu_irq_lower(s->sense[i]);
 254     }
 255
 256     s->sense_state = sense;
 257 }
 258
 259 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 260 {
 261     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 262
 263     if (level)
 264         s->strobe_state |= 1 << line;
 265     else
 266         s->strobe_state &= ~(1 << line);
 267     spitz_keyboard_sense_update(s);
 268 }
 269
 270 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 271 {
 272     int spitz_keycode = s->keymap[keycode & 0x7f];
 273     if (spitz_keycode == -1)
 274         return;
 275
 276     /* Handle the additional keys */
 277     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 278         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 279         return;
 280     }
 281
 282     if (keycode & 0x80)
 283         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 284     else
 285         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 286
 287     spitz_keyboard_sense_update(s);
 288 }
 289
 290 #define SHIFT   (1 << 7)
 291 #define CTRL    (1 << 8)
 292 #define FN      (1 << 9)
 293
 294 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 295
 296 static void spitz_keyboard_handler(void *opaque, int keycode)
 297 {
 298     SpitzKeyboardState *s = opaque;
 299     uint16_t code;
 300     int mapcode;
 301     switch (keycode) {
 302     case 0x2a:  /* Left Shift */
 303         s->modifiers |= 1;
 304         break;
 305     case 0xaa:
 306         s->modifiers &= ~1;
 307         break;
 308     case 0x36:  /* Right Shift */
 309         s->modifiers |= 2;
 310         break;
 311     case 0xb6:
 312         s->modifiers &= ~2;
 313         break;
 314     case 0x1d:  /* Control */
 315         s->modifiers |= 4;
 316         break;
 317     case 0x9d:
 318         s->modifiers &= ~4;
 319         break;
 320     case 0x38:  /* Alt */
 321         s->modifiers |= 8;
 322         break;
 323     case 0xb8:
 324         s->modifiers &= ~8;
 325         break;
 326     }
 327
 328     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 329             (keycode | SHIFT) :
 330             (keycode & ~SHIFT))];
 331
 332     if (code != mapcode) {
 333 #if 0
 334         if ((code & SHIFT) && !(s->modifiers & 1))
 335             QUEUE_KEY(0x2a | (keycode & 0x80));
 336         if ((code & CTRL ) && !(s->modifiers & 4))
 337             QUEUE_KEY(0x1d | (keycode & 0x80));
 338         if ((code & FN   ) && !(s->modifiers & 8))
 339             QUEUE_KEY(0x38 | (keycode & 0x80));
 340         if ((code & FN   ) && (s->modifiers & 1))
 341             QUEUE_KEY(0x2a | (~keycode & 0x80));
 342         if ((code & FN   ) && (s->modifiers & 2))
 343             QUEUE_KEY(0x36 | (~keycode & 0x80));
 344 #else
 345         if (keycode & 0x80) {
 346             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 347                 QUEUE_KEY(0x2a | 0x80);
 348             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 349                 QUEUE_KEY(0x1d | 0x80);
 350             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 351                 QUEUE_KEY(0x38 | 0x80);
 352             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 353                 QUEUE_KEY(0x2a);
 354             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 355                 QUEUE_KEY(0x36);
 356             s->imodifiers = 0;
 357         } else {
 358             if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) {
 359                 QUEUE_KEY(0x2a);
 360                 s->imodifiers |= 1;
 361             }
 362             if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) {
 363                 QUEUE_KEY(0x1d);
 364                 s->imodifiers |= 4;
 365             }
 366             if ((code & FN   ) && !((s->modifiers | s->imodifiers) & 8)) {
 367                 QUEUE_KEY(0x38);
 368                 s->imodifiers |= 8;
 369             }
 370             if ((code & FN   ) && (s->modifiers & 1) &&
 371                             !(s->imodifiers & 0x10)) {
 372                 QUEUE_KEY(0x2a | 0x80);
 373                 s->imodifiers |= 0x10;
 374             }
 375             if ((code & FN   ) && (s->modifiers & 2) &&
 376                             !(s->imodifiers & 0x20)) {
 377                 QUEUE_KEY(0x36 | 0x80);
 378                 s->imodifiers |= 0x20;
 379             }
 380         }
 381 #endif
 382     }
 383
 384     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 385 }
 386
 387 static void spitz_keyboard_tick(void *opaque)
 388 {
 389     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 390
 391     if (s->fifolen) {
 392         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 393         s->fifolen --;
 394         if (s->fifopos >= 16)
 395             s->fifopos = 0;
 396     }
 397
 398     qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock) +
 399                    get_ticks_per_sec() / 32);
 400 }
 401
 402 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 403 {
 404     int i;
 405     for (i = 0; i < 0x100; i ++)
 406         s->pre_map[i] = i;
 407     s->pre_map[0x02 | SHIFT     ] = 0x02 | SHIFT;       /* exclam */
 408     s->pre_map[0x28 | SHIFT     ] = 0x03 | SHIFT;       /* quotedbl */
 409     s->pre_map[0x04 | SHIFT     ] = 0x04 | SHIFT;       /* numbersign */
 410     s->pre_map[0x05 | SHIFT     ] = 0x05 | SHIFT;       /* dollar */
 411     s->pre_map[0x06 | SHIFT     ] = 0x06 | SHIFT;       /* percent */
 412     s->pre_map[0x08 | SHIFT     ] = 0x07 | SHIFT;       /* ampersand */
 413     s->pre_map[0x28             ] = 0x08 | SHIFT;       /* apostrophe */
 414     s->pre_map[0x0a | SHIFT     ] = 0x09 | SHIFT;       /* parenleft */
 415     s->pre_map[0x0b | SHIFT     ] = 0x0a | SHIFT;       /* parenright */
 416     s->pre_map[0x29 | SHIFT     ] = 0x0b | SHIFT;       /* asciitilde */
 417     s->pre_map[0x03 | SHIFT     ] = 0x0c | SHIFT;       /* at */
 418     s->pre_map[0xd3             ] = 0x0e | FN;          /* Delete */
 419     s->pre_map[0x3a             ] = 0x0f | FN;          /* Caps_Lock */
 420     s->pre_map[0x07 | SHIFT     ] = 0x11 | FN;          /* asciicircum */
 421     s->pre_map[0x0d             ] = 0x12 | FN;          /* equal */
 422     s->pre_map[0x0d | SHIFT     ] = 0x13 | FN;          /* plus */
 423     s->pre_map[0x1a             ] = 0x14 | FN;          /* bracketleft */
 424     s->pre_map[0x1b             ] = 0x15 | FN;          /* bracketright */
 425     s->pre_map[0x1a | SHIFT     ] = 0x16 | FN;          /* braceleft */
 426     s->pre_map[0x1b | SHIFT     ] = 0x17 | FN;          /* braceright */
 427     s->pre_map[0x27             ] = 0x22 | FN;          /* semicolon */
 428     s->pre_map[0x27 | SHIFT     ] = 0x23 | FN;          /* colon */
 429     s->pre_map[0x09 | SHIFT     ] = 0x24 | FN;          /* asterisk */
 430     s->pre_map[0x2b             ] = 0x25 | FN;          /* backslash */
 431     s->pre_map[0x2b | SHIFT     ] = 0x26 | FN;          /* bar */
 432     s->pre_map[0x0c | SHIFT     ] = 0x30 | FN;          /* underscore */
 433     s->pre_map[0x33 | SHIFT     ] = 0x33 | FN;          /* less */
 434     s->pre_map[0x35             ] = 0x33 | SHIFT;       /* slash */
 435     s->pre_map[0x34 | SHIFT     ] = 0x34 | FN;          /* greater */
 436     s->pre_map[0x35 | SHIFT     ] = 0x34 | SHIFT;       /* question */
 437     s->pre_map[0x49             ] = 0x48 | FN;          /* Page_Up */
 438     s->pre_map[0x51             ] = 0x50 | FN;          /* Page_Down */
 439
 440     s->modifiers = 0;
 441     s->imodifiers = 0;
 442     s->fifopos = 0;
 443     s->fifolen = 0;
 444 }
 445
 446 #undef SHIFT
 447 #undef CTRL
 448 #undef FN
 449
 450 static int spitz_keyboard_post_load(void *opaque, int version_id)
 451 {
 452     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 453
 454     /* Release all pressed keys */
 455     memset(s->keyrow, 0, sizeof(s->keyrow));
 456     spitz_keyboard_sense_update(s);
 457     s->modifiers = 0;
 458     s->imodifiers = 0;
 459     s->fifopos = 0;
 460     s->fifolen = 0;
 461
 462     return 0;
 463 }
 464
 465 static void spitz_keyboard_register(PXA2xxState *cpu)
 466 {
 467     int i;
 468     DeviceState *dev;
 469     SpitzKeyboardState *s;
 470
 471     dev = sysbus_create_simple("spitz-keyboard", -1, NULL);
 472     s = FROM_SYSBUS(SpitzKeyboardState, sysbus_from_qdev(dev));
 473
 474     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 475         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 476
 477     for (i = 0; i < 5; i ++)
 478         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 479
 480     if (!graphic_rotate)
 481         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 482
 483     for (i = 0; i < 5; i++)
 484         qemu_set_irq(s->gpiomap[i], 0);
 485
 486     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 487         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 488                 qdev_get_gpio_in(dev, i));
 489
 490     qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock));
 491
 492     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 493 }
 494
 495 static int spitz_keyboard_init(SysBusDevice *dev)
 496 {
 497     SpitzKeyboardState *s;
 498     int i, j;
 499
 500     s = FROM_SYSBUS(SpitzKeyboardState, dev);
 501
 502     for (i = 0; i < 0x80; i ++)
 503         s->keymap[i] = -1;
 504     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 505         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 506             if (spitz_keymap[i][j] != -1)
 507                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 508
 509     spitz_keyboard_pre_map(s);
 510
 511     s->kbdtimer = qemu_new_timer_ns(vm_clock, spitz_keyboard_tick, s);
 512     qdev_init_gpio_in(&dev->qdev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 513     qdev_init_gpio_out(&dev->qdev, s->sense, SPITZ_KEY_SENSE_NUM);
 514
 515     return 0;
 516 }
 517
 518 /* LCD backlight controller */
 519
 520 #define LCDTG_RESCTL    0x00
 521 #define LCDTG_PHACTRL   0x01
 522 #define LCDTG_DUTYCTRL  0x02
 523 #define LCDTG_POWERREG0 0x03
 524 #define LCDTG_POWERREG1 0x04
 525 #define LCDTG_GPOR3     0x05
 526 #define LCDTG_PICTRL    0x06
 527 #define LCDTG_POLCTRL   0x07
 528
 529 typedef struct {
 530     SSISlave ssidev;
 531     uint32_t bl_intensity;
 532     uint32_t bl_power;
 533 } SpitzLCDTG;
 534
 535 static void spitz_bl_update(SpitzLCDTG *s)
 536 {
 537     if (s->bl_power && s->bl_intensity)
 538         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 539     else
 540         zaurus_printf("LCD Backlight now off\n");
 541 }
 542
 543 /* FIXME: Implement GPIO properly and remove this hack.  */
 544 static SpitzLCDTG *spitz_lcdtg;
 545
 546 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 547 {
 548     SpitzLCDTG *s = spitz_lcdtg;
 549     int prev = s->bl_intensity;
 550
 551     if (level)
 552         s->bl_intensity &= ~0x20;
 553     else
 554         s->bl_intensity |= 0x20;
 555
 556     if (s->bl_power && prev != s->bl_intensity)
 557         spitz_bl_update(s);
 558 }
 559
 560 static inline void spitz_bl_power(void *opaque, int line, int level)
 561 {
 562     SpitzLCDTG *s = spitz_lcdtg;
 563     s->bl_power = !!level;
 564     spitz_bl_update(s);
 565 }
 566
 567 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 568 {
 569     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 570     int addr;
 571     addr = value >> 5;
 572     value &= 0x1f;
 573
 574     switch (addr) {
 575     case LCDTG_RESCTL:
 576         if (value)
 577             zaurus_printf("LCD in QVGA mode\n");
 578         else
 579             zaurus_printf("LCD in VGA mode\n");
 580         break;
 581
 582     case LCDTG_DUTYCTRL:
 583         s->bl_intensity &= ~0x1f;
 584         s->bl_intensity |= value;
 585         if (s->bl_power)
 586             spitz_bl_update(s);
 587         break;
 588
 589     case LCDTG_POWERREG0:
 590         /* Set common voltage to M62332FP */
 591         break;
 592     }
 593     return 0;
 594 }
 595
 596 static int spitz_lcdtg_init(SSISlave *dev)
 597 {
 598     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 599
 600     spitz_lcdtg = s;
 601     s->bl_power = 0;
 602     s->bl_intensity = 0x20;
 603
 604     return 0;
 605 }
 606
 607 /* SSP devices */
 608
 609 #define CORGI_SSP_PORT          2
 610
 611 #define SPITZ_GPIO_LCDCON_CS    53
 612 #define SPITZ_GPIO_ADS7846_CS   14
 613 #define SPITZ_GPIO_MAX1111_CS   20
 614 #define SPITZ_GPIO_TP_INT       11
 615
 616 static DeviceState *max1111;
 617
 618 /* "Demux" the signal based on current chipselect */
 619 typedef struct {
 620     SSISlave ssidev;
 621     SSIBus *bus[3];
 622     uint32_t enable[3];
 623 } CorgiSSPState;
 624
 625 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 626 {
 627     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 628     int i;
 629
 630     for (i = 0; i < 3; i++) {
 631         if (s->enable[i]) {
 632             return ssi_transfer(s->bus[i], value);
 633         }
 634     }
 635     return 0;
 636 }
 637
 638 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 639 {
 640     CorgiSSPState *s = (CorgiSSPState *)opaque;
 641     assert(line >= 0 && line < 3);
 642     s->enable[line] = !level;
 643 }
 644
 645 #define MAX1111_BATT_VOLT       1
 646 #define MAX1111_BATT_TEMP       2
 647 #define MAX1111_ACIN_VOLT       3
 648
 649 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 650 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 651 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 652
 653 static void spitz_adc_temp_on(void *opaque, int line, int level)
 654 {
 655     if (!max1111)
 656         return;
 657
 658     if (level)
 659         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 660     else
 661         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 662 }
 663
 664 static int corgi_ssp_init(SSISlave *dev)
 665 {
 666     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 667
 668     qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
 669     s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0");
 670     s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1");
 671     s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2");
 672
 673     return 0;
 674 }
 675
 676 static void spitz_ssp_attach(PXA2xxState *cpu)
 677 {
 678     DeviceState *mux;
 679     DeviceState *dev;
 680     void *bus;
 681
 682     mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 683
 684     bus = qdev_get_child_bus(mux, "ssi0");
 685     ssi_create_slave(bus, "spitz-lcdtg");
 686
 687     bus = qdev_get_child_bus(mux, "ssi1");
 688     dev = ssi_create_slave(bus, "ads7846");
 689     qdev_connect_gpio_out(dev, 0,
 690                           qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
 691
 692     bus = qdev_get_child_bus(mux, "ssi2");
 693     max1111 = ssi_create_slave(bus, "max1111");
 694     max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
 695     max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 696     max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
 697
 698     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
 699                         qdev_get_gpio_in(mux, 0));
 700     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
 701                         qdev_get_gpio_in(mux, 1));
 702     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
 703                         qdev_get_gpio_in(mux, 2));
 704 }
 705
 706 /* CF Microdrive */
 707
 708 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 709 {
 710     PCMCIACardState *md;
 711     DriveInfo *dinfo;
 712
 713     dinfo = drive_get(IF_IDE, 0, 0);
 714     if (!dinfo || dinfo->media_cd)
 715         return;
 716     md = dscm1xxxx_init(dinfo);
 717     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 718 }
 719
 720 /* Wm8750 and Max7310 on I2C */
 721
 722 #define AKITA_MAX_ADDR  0x18
 723 #define SPITZ_WM_ADDRL  0x1b
 724 #define SPITZ_WM_ADDRH  0x1a
 725
 726 #define SPITZ_GPIO_WM   5
 727
 728 static void spitz_wm8750_addr(void *opaque, int line, int level)
 729 {
 730     i2c_slave *wm = (i2c_slave *) opaque;
 731     if (level)
 732         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 733     else
 734         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 735 }
 736
 737 static void spitz_i2c_setup(PXA2xxState *cpu)
 738 {
 739     /* Attach the CPU on one end of our I2C bus.  */
 740     i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 741
 742     DeviceState *wm;
 743
 744     /* Attach a WM8750 to the bus */
 745     wm = i2c_create_slave(bus, "wm8750", 0);
 746
 747     spitz_wm8750_addr(wm, 0, 0);
 748     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 749                     qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
 750     /* .. and to the sound interface.  */
 751     cpu->i2s->opaque = wm;
 752     cpu->i2s->codec_out = wm8750_dac_dat;
 753     cpu->i2s->codec_in = wm8750_adc_dat;
 754     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 755 }
 756
 757 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 758 {
 759     /* Attach a Max7310 to Akita I2C bus.  */
 760     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 761                      AKITA_MAX_ADDR);
 762 }
 763
 764 /* Other peripherals */
 765
 766 static void spitz_out_switch(void *opaque, int line, int level)
 767 {
 768     switch (line) {
 769     case 0:
 770         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 771         break;
 772     case 1:
 773         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 774         break;
 775     case 2:
 776         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 777         break;
 778     case 3:
 779         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 780         break;
 781     case 4:
 782         spitz_bl_bit5(opaque, line, level);
 783         break;
 784     case 5:
 785         spitz_bl_power(opaque, line, level);
 786         break;
 787     case 6:
 788         spitz_adc_temp_on(opaque, line, level);
 789         break;
 790     }
 791 }
 792
 793 #define SPITZ_SCP_LED_GREEN             1
 794 #define SPITZ_SCP_JK_B                  2
 795 #define SPITZ_SCP_CHRG_ON               3
 796 #define SPITZ_SCP_MUTE_L                4
 797 #define SPITZ_SCP_MUTE_R                5
 798 #define SPITZ_SCP_CF_POWER              6
 799 #define SPITZ_SCP_LED_ORANGE            7
 800 #define SPITZ_SCP_JK_A                  8
 801 #define SPITZ_SCP_ADC_TEMP_ON           9
 802 #define SPITZ_SCP2_IR_ON                1
 803 #define SPITZ_SCP2_AKIN_PULLUP          2
 804 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 805 #define SPITZ_SCP2_BACKLIGHT_ON         8
 806 #define SPITZ_SCP2_MIC_BIAS             9
 807
 808 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
 809                 DeviceState *scp0, DeviceState *scp1)
 810 {
 811     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
 812
 813     qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 814     qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
 815     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 816     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 817
 818     if (scp1) {
 819         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
 820         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
 821     }
 822
 823     qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 824 }
 825
 826 #define SPITZ_GPIO_HSYNC                22
 827 #define SPITZ_GPIO_SD_DETECT            9
 828 #define SPITZ_GPIO_SD_WP                81
 829 #define SPITZ_GPIO_ON_RESET             89
 830 #define SPITZ_GPIO_BAT_COVER            90
 831 #define SPITZ_GPIO_CF1_IRQ              105
 832 #define SPITZ_GPIO_CF1_CD               94
 833 #define SPITZ_GPIO_CF2_IRQ              106
 834 #define SPITZ_GPIO_CF2_CD               93
 835
 836 static int spitz_hsync;
 837
 838 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 839 {
 840     PXA2xxState *cpu = (PXA2xxState *) opaque;
 841     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 842     spitz_hsync ^= 1;
 843 }
 844
 845 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 846 {
 847     qemu_irq lcd_hsync;
 848     /*
 849      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 850      * read to satisfy broken guests that poll-wait for hsync.
 851      * Simulating a real hsync event would be less practical and
 852      * wouldn't guarantee that a guest ever exits the loop.
 853      */
 854     spitz_hsync = 0;
 855     lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
 856     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 857     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 858
 859     /* MMC/SD host */
 860     pxa2xx_mmci_handlers(cpu->mmc,
 861                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 862                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 863
 864     /* Battery lock always closed */
 865     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 866
 867     /* Handle reset */
 868     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
 869
 870     /* PCMCIA signals: card's IRQ and Card-Detect */
 871     if (slots >= 1)
 872         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 873                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 874                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 875     if (slots >= 2)
 876         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 877                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 878                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 879 }
 880
 881 /* Board init.  */
 882 enum spitz_model_e { spitz, akita, borzoi, terrier };
 883
 884 #define SPITZ_RAM       0x04000000
 885 #define SPITZ_ROM       0x00800000
 886
 887 static struct arm_boot_info spitz_binfo = {
 888     .loader_start = PXA2XX_SDRAM_BASE,
 889     .ram_size = 0x04000000,
 890 };
 891
 892 static void spitz_common_init(ram_addr_t ram_size,
 893                 const char *kernel_filename,
 894                 const char *kernel_cmdline, const char *initrd_filename,
 895                 const char *cpu_model, enum spitz_model_e model, int arm_id)
 896 {
 897     PXA2xxState *cpu;
 898     DeviceState *scp0, *scp1 = NULL;
 899
 900     if (!cpu_model)
 901         cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
 902
 903     /* Setup CPU & memory */
 904     cpu = pxa270_init(spitz_binfo.ram_size, cpu_model);
 905
 906     sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 907
 908     cpu_register_physical_memory(0, SPITZ_ROM,
 909                     qemu_ram_alloc(NULL, "spitz.rom", SPITZ_ROM) | IO_MEM_ROM);
 910
 911     /* Setup peripherals */
 912     spitz_keyboard_register(cpu);
 913
 914     spitz_ssp_attach(cpu);
 915
 916     scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
 917     if (model != akita) {
 918         scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
 919     }
 920
 921     spitz_scoop_gpio_setup(cpu, scp0, scp1);
 922
 923     spitz_gpio_setup(cpu, (model == akita) ? 1 : 2);
 924
 925     spitz_i2c_setup(cpu);
 926
 927     if (model == akita)
 928         spitz_akita_i2c_setup(cpu);
 929
 930     if (model == terrier)
 931         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 932         spitz_microdrive_attach(cpu, 1);
 933     else if (model != akita)
 934         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 935         spitz_microdrive_attach(cpu, 0);
 936
 937     spitz_binfo.kernel_filename = kernel_filename;
 938     spitz_binfo.kernel_cmdline = kernel_cmdline;
 939     spitz_binfo.initrd_filename = initrd_filename;
 940     spitz_binfo.board_id = arm_id;
 941     arm_load_kernel(cpu->env, &spitz_binfo);
 942     sl_bootparam_write(SL_PXA_PARAM_BASE);
 943 }
 944
 945 static void spitz_init(ram_addr_t ram_size,
 946                 const char *boot_device,
 947                 const char *kernel_filename, const char *kernel_cmdline,
 948                 const char *initrd_filename, const char *cpu_model)
 949 {
 950     spitz_common_init(ram_size, kernel_filename,
 951                 kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
 952 }
 953
 954 static void borzoi_init(ram_addr_t ram_size,
 955                 const char *boot_device,
 956                 const char *kernel_filename, const char *kernel_cmdline,
 957                 const char *initrd_filename, const char *cpu_model)
 958 {
 959     spitz_common_init(ram_size, kernel_filename,
 960                 kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
 961 }
 962
 963 static void akita_init(ram_addr_t ram_size,
 964                 const char *boot_device,
 965                 const char *kernel_filename, const char *kernel_cmdline,
 966                 const char *initrd_filename, const char *cpu_model)
 967 {
 968     spitz_common_init(ram_size, kernel_filename,
 969                 kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
 970 }
 971
 972 static void terrier_init(ram_addr_t ram_size,
 973                 const char *boot_device,
 974                 const char *kernel_filename, const char *kernel_cmdline,
 975                 const char *initrd_filename, const char *cpu_model)
 976 {
 977     spitz_common_init(ram_size, kernel_filename,
 978                 kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
 979 }
 980
 981 static QEMUMachine akitapda_machine = {
 982     .name = "akita",
 983     .desc = "Akita PDA (PXA270)",
 984     .init = akita_init,
 985 };
 986
 987 static QEMUMachine spitzpda_machine = {
 988     .name = "spitz",
 989     .desc = "Spitz PDA (PXA270)",
 990     .init = spitz_init,
 991 };
 992
 993 static QEMUMachine borzoipda_machine = {
 994     .name = "borzoi",
 995     .desc = "Borzoi PDA (PXA270)",
 996     .init = borzoi_init,
 997 };
 998
 999 static QEMUMachine terrierpda_machine = {
1000     .name = "terrier",
1001     .desc = "Terrier PDA (PXA270)",
1002     .init = terrier_init,
1003 };
1004
1005 static void spitz_machine_init(void)
1006 {
1007     qemu_register_machine(&akitapda_machine);
1008     qemu_register_machine(&spitzpda_machine);
1009     qemu_register_machine(&borzoipda_machine);
1010     qemu_register_machine(&terrierpda_machine);
1011 }
1012
1013 machine_init(spitz_machine_init);
1014
1015 static bool is_version_0(void *opaque, int version_id)
1016 {
1017     return version_id == 0;
1018 }
1019
1020 static VMStateDescription vmstate_sl_nand_info = {
1021     .name = "sl-nand",
1022     .version_id = 0,
1023     .minimum_version_id = 0,
1024     .minimum_version_id_old = 0,
1025     .fields = (VMStateField []) {
1026         VMSTATE_UINT8(ctl, SLNANDState),
1027         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1028         VMSTATE_END_OF_LIST(),
1029     },
1030 };
1031
1032 static SysBusDeviceInfo sl_nand_info = {
1033     .init = sl_nand_init,
1034     .qdev.name = "sl-nand",
1035     .qdev.size = sizeof(SLNANDState),
1036     .qdev.vmsd = &vmstate_sl_nand_info,
1037     .qdev.props = (Property []) {
1038         DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1039         DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1040         DEFINE_PROP_END_OF_LIST(),
1041     },
1042 };
1043
1044 static VMStateDescription vmstate_spitz_kbd = {
1045     .name = "spitz-keyboard",
1046     .version_id = 1,
1047     .minimum_version_id = 0,
1048     .minimum_version_id_old = 0,
1049     .post_load = spitz_keyboard_post_load,
1050     .fields = (VMStateField []) {
1051         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1052         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1053         VMSTATE_UNUSED_TEST(is_version_0, 5),
1054         VMSTATE_END_OF_LIST(),
1055     },
1056 };
1057
1058 static SysBusDeviceInfo spitz_keyboard_info = {
1059     .init = spitz_keyboard_init,
1060     .qdev.name = "spitz-keyboard",
1061     .qdev.size = sizeof(SpitzKeyboardState),
1062     .qdev.vmsd = &vmstate_spitz_kbd,
1063     .qdev.props = (Property []) {
1064         DEFINE_PROP_END_OF_LIST(),
1065     },
1066 };
1067
1068 static const VMStateDescription vmstate_corgi_ssp_regs = {
1069     .name = "corgi-ssp",
1070     .version_id = 1,
1071     .minimum_version_id = 1,
1072     .minimum_version_id_old = 1,
1073     .fields = (VMStateField []) {
1074         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1075         VMSTATE_END_OF_LIST(),
1076     }
1077 };
1078
1079 static SSISlaveInfo corgi_ssp_info = {
1080     .qdev.name = "corgi-ssp",
1081     .qdev.size = sizeof(CorgiSSPState),
1082     .qdev.vmsd = &vmstate_corgi_ssp_regs,
1083     .init = corgi_ssp_init,
1084     .transfer = corgi_ssp_transfer
1085 };
1086
1087 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1088     .name = "spitz-lcdtg",
1089     .version_id = 1,
1090     .minimum_version_id = 1,
1091     .minimum_version_id_old = 1,
1092     .fields = (VMStateField []) {
1093         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1094         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1095         VMSTATE_END_OF_LIST(),
1096     }
1097 };
1098
1099 static SSISlaveInfo spitz_lcdtg_info = {
1100     .qdev.name = "spitz-lcdtg",
1101     .qdev.size = sizeof(SpitzLCDTG),
1102     .qdev.vmsd = &vmstate_spitz_lcdtg_regs,
1103     .init = spitz_lcdtg_init,
1104     .transfer = spitz_lcdtg_transfer
1105 };
1106
1107 static void spitz_register_devices(void)
1108 {
1109     ssi_register_slave(&corgi_ssp_info);
1110     ssi_register_slave(&spitz_lcdtg_info);
1111     sysbus_register_withprop(&spitz_keyboard_info);
1112     sysbus_register_withprop(&sl_nand_info);
1113 }
1114
1115 device_init(spitz_register_devices)