4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "pixel_ops.h"
30 #include "qemu-timer.h"
34 //#define DEBUG_VGA_MEM
35 //#define DEBUG_VGA_REG
37 //#define DEBUG_BOCHS_VBE
39 /* force some bits to zero */
40 const uint8_t sr_mask
[8] = {
51 const uint8_t gr_mask
[16] = {
70 #define cbswap_32(__x) \
72 (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \
73 (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \
74 (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \
75 (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) ))
77 #ifdef HOST_WORDS_BIGENDIAN
78 #define PAT(x) cbswap_32(x)
83 #ifdef HOST_WORDS_BIGENDIAN
89 #ifdef HOST_WORDS_BIGENDIAN
90 #define GET_PLANE(data, p) (((data) >> (24 - (p) * 8)) & 0xff)
92 #define GET_PLANE(data, p) (((data) >> ((p) * 8)) & 0xff)
95 static const uint32_t mask16
[16] = {
116 #ifdef HOST_WORDS_BIGENDIAN
119 #define PAT(x) cbswap_32(x)
122 static const uint32_t dmask16
[16] = {
141 static const uint32_t dmask4
[4] = {
148 static uint32_t expand4
[256];
149 static uint16_t expand2
[256];
150 static uint8_t expand4to8
[16];
152 static void vga_screen_dump(void *opaque
, const char *filename
);
153 static char *screen_dump_filename
;
154 static DisplayChangeListener
*screen_dump_dcl
;
156 static void vga_dumb_update_retrace_info(VGACommonState
*s
)
161 static void vga_precise_update_retrace_info(VGACommonState
*s
)
164 int hretr_start_char
;
165 int hretr_skew_chars
;
169 int vretr_start_line
;
172 int div2
, sldiv2
, dots
;
175 const int clk_hz
[] = {25175000, 28322000, 25175000, 25175000};
176 int64_t chars_per_sec
;
177 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
179 htotal_chars
= s
->cr
[0x00] + 5;
180 hretr_start_char
= s
->cr
[0x04];
181 hretr_skew_chars
= (s
->cr
[0x05] >> 5) & 3;
182 hretr_end_char
= s
->cr
[0x05] & 0x1f;
184 vtotal_lines
= (s
->cr
[0x06]
185 | (((s
->cr
[0x07] & 1) | ((s
->cr
[0x07] >> 4) & 2)) << 8)) + 2
187 vretr_start_line
= s
->cr
[0x10]
188 | ((((s
->cr
[0x07] >> 2) & 1) | ((s
->cr
[0x07] >> 6) & 2)) << 8)
190 vretr_end_line
= s
->cr
[0x11] & 0xf;
193 div2
= (s
->cr
[0x17] >> 2) & 1;
194 sldiv2
= (s
->cr
[0x17] >> 3) & 1;
196 clocking_mode
= (s
->sr
[0x01] >> 3) & 1;
197 clock_sel
= (s
->msr
>> 2) & 3;
198 dots
= (s
->msr
& 1) ? 8 : 9;
200 chars_per_sec
= clk_hz
[clock_sel
] / dots
;
202 htotal_chars
<<= clocking_mode
;
204 r
->total_chars
= vtotal_lines
* htotal_chars
;
206 r
->ticks_per_char
= get_ticks_per_sec() / (r
->total_chars
* r
->freq
);
208 r
->ticks_per_char
= get_ticks_per_sec() / chars_per_sec
;
211 r
->vstart
= vretr_start_line
;
212 r
->vend
= r
->vstart
+ vretr_end_line
+ 1;
214 r
->hstart
= hretr_start_char
+ hretr_skew_chars
;
215 r
->hend
= r
->hstart
+ hretr_end_char
+ 1;
216 r
->htotal
= htotal_chars
;
228 "div2 = %d sldiv2 = %d\n"
229 "clocking_mode = %d\n"
230 "clock_sel = %d %d\n"
232 "ticks/char = %lld\n"
234 (double) get_ticks_per_sec() / (r
->ticks_per_char
* r
->total_chars
),
252 static uint8_t vga_precise_retrace(VGACommonState
*s
)
254 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
255 uint8_t val
= s
->st01
& ~(ST01_V_RETRACE
| ST01_DISP_ENABLE
);
257 if (r
->total_chars
) {
258 int cur_line
, cur_line_char
, cur_char
;
261 cur_tick
= qemu_get_clock(vm_clock
);
263 cur_char
= (cur_tick
/ r
->ticks_per_char
) % r
->total_chars
;
264 cur_line
= cur_char
/ r
->htotal
;
266 if (cur_line
>= r
->vstart
&& cur_line
<= r
->vend
) {
267 val
|= ST01_V_RETRACE
| ST01_DISP_ENABLE
;
269 cur_line_char
= cur_char
% r
->htotal
;
270 if (cur_line_char
>= r
->hstart
&& cur_line_char
<= r
->hend
) {
271 val
|= ST01_DISP_ENABLE
;
277 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
281 static uint8_t vga_dumb_retrace(VGACommonState
*s
)
283 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
286 int vga_ioport_invalid(VGACommonState
*s
, uint32_t addr
)
288 if (s
->msr
& MSR_COLOR_EMULATION
) {
290 return (addr
>= 0x3b0 && addr
<= 0x3bf);
293 return (addr
>= 0x3d0 && addr
<= 0x3df);
297 uint32_t vga_ioport_read(void *opaque
, uint32_t addr
)
299 VGACommonState
*s
= opaque
;
302 if (vga_ioport_invalid(s
, addr
)) {
307 if (s
->ar_flip_flop
== 0) {
314 index
= s
->ar_index
& 0x1f;
327 val
= s
->sr
[s
->sr_index
];
329 printf("vga: read SR%x = 0x%02x\n", s
->sr_index
, val
);
336 val
= s
->dac_write_index
;
339 val
= s
->palette
[s
->dac_read_index
* 3 + s
->dac_sub_index
];
340 if (++s
->dac_sub_index
== 3) {
341 s
->dac_sub_index
= 0;
355 val
= s
->gr
[s
->gr_index
];
357 printf("vga: read GR%x = 0x%02x\n", s
->gr_index
, val
);
366 val
= s
->cr
[s
->cr_index
];
368 printf("vga: read CR%x = 0x%02x\n", s
->cr_index
, val
);
373 /* just toggle to fool polling */
374 val
= s
->st01
= s
->retrace(s
);
382 #if defined(DEBUG_VGA)
383 printf("VGA: read addr=0x%04x data=0x%02x\n", addr
, val
);
388 void vga_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
390 VGACommonState
*s
= opaque
;
393 /* check port range access depending on color/monochrome mode */
394 if (vga_ioport_invalid(s
, addr
)) {
398 printf("VGA: write addr=0x%04x data=0x%02x\n", addr
, val
);
403 if (s
->ar_flip_flop
== 0) {
407 index
= s
->ar_index
& 0x1f;
410 s
->ar
[index
] = val
& 0x3f;
413 s
->ar
[index
] = val
& ~0x10;
419 s
->ar
[index
] = val
& ~0xc0;
422 s
->ar
[index
] = val
& ~0xf0;
425 s
->ar
[index
] = val
& ~0xf0;
431 s
->ar_flip_flop
^= 1;
434 s
->msr
= val
& ~0x10;
435 s
->update_retrace_info(s
);
438 s
->sr_index
= val
& 7;
442 printf("vga: write SR%x = 0x%02x\n", s
->sr_index
, val
);
444 s
->sr
[s
->sr_index
] = val
& sr_mask
[s
->sr_index
];
445 if (s
->sr_index
== 1) s
->update_retrace_info(s
);
448 s
->dac_read_index
= val
;
449 s
->dac_sub_index
= 0;
453 s
->dac_write_index
= val
;
454 s
->dac_sub_index
= 0;
458 s
->dac_cache
[s
->dac_sub_index
] = val
;
459 if (++s
->dac_sub_index
== 3) {
460 memcpy(&s
->palette
[s
->dac_write_index
* 3], s
->dac_cache
, 3);
461 s
->dac_sub_index
= 0;
462 s
->dac_write_index
++;
466 s
->gr_index
= val
& 0x0f;
470 printf("vga: write GR%x = 0x%02x\n", s
->gr_index
, val
);
472 s
->gr
[s
->gr_index
] = val
& gr_mask
[s
->gr_index
];
481 printf("vga: write CR%x = 0x%02x\n", s
->cr_index
, val
);
483 /* handle CR0-7 protection */
484 if ((s
->cr
[0x11] & 0x80) && s
->cr_index
<= 7) {
485 /* can always write bit 4 of CR7 */
486 if (s
->cr_index
== 7)
487 s
->cr
[7] = (s
->cr
[7] & ~0x10) | (val
& 0x10);
490 s
->cr
[s
->cr_index
] = val
;
492 switch(s
->cr_index
) {
500 s
->update_retrace_info(s
);
511 #ifdef CONFIG_BOCHS_VBE
512 static uint32_t vbe_ioport_read_index(void *opaque
, uint32_t addr
)
514 VGACommonState
*s
= opaque
;
520 static uint32_t vbe_ioport_read_data(void *opaque
, uint32_t addr
)
522 VGACommonState
*s
= opaque
;
525 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
526 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_GETCAPS
) {
527 switch(s
->vbe_index
) {
528 /* XXX: do not hardcode ? */
529 case VBE_DISPI_INDEX_XRES
:
530 val
= VBE_DISPI_MAX_XRES
;
532 case VBE_DISPI_INDEX_YRES
:
533 val
= VBE_DISPI_MAX_YRES
;
535 case VBE_DISPI_INDEX_BPP
:
536 val
= VBE_DISPI_MAX_BPP
;
539 val
= s
->vbe_regs
[s
->vbe_index
];
543 val
= s
->vbe_regs
[s
->vbe_index
];
548 #ifdef DEBUG_BOCHS_VBE
549 printf("VBE: read index=0x%x val=0x%x\n", s
->vbe_index
, val
);
554 static void vbe_ioport_write_index(void *opaque
, uint32_t addr
, uint32_t val
)
556 VGACommonState
*s
= opaque
;
560 static void vbe_ioport_write_data(void *opaque
, uint32_t addr
, uint32_t val
)
562 VGACommonState
*s
= opaque
;
564 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
565 #ifdef DEBUG_BOCHS_VBE
566 printf("VBE: write index=0x%x val=0x%x\n", s
->vbe_index
, val
);
568 switch(s
->vbe_index
) {
569 case VBE_DISPI_INDEX_ID
:
570 if (val
== VBE_DISPI_ID0
||
571 val
== VBE_DISPI_ID1
||
572 val
== VBE_DISPI_ID2
||
573 val
== VBE_DISPI_ID3
||
574 val
== VBE_DISPI_ID4
) {
575 s
->vbe_regs
[s
->vbe_index
] = val
;
578 case VBE_DISPI_INDEX_XRES
:
579 if ((val
<= VBE_DISPI_MAX_XRES
) && ((val
& 7) == 0)) {
580 s
->vbe_regs
[s
->vbe_index
] = val
;
583 case VBE_DISPI_INDEX_YRES
:
584 if (val
<= VBE_DISPI_MAX_YRES
) {
585 s
->vbe_regs
[s
->vbe_index
] = val
;
588 case VBE_DISPI_INDEX_BPP
:
591 if (val
== 4 || val
== 8 || val
== 15 ||
592 val
== 16 || val
== 24 || val
== 32) {
593 s
->vbe_regs
[s
->vbe_index
] = val
;
596 case VBE_DISPI_INDEX_BANK
:
597 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
598 val
&= (s
->vbe_bank_mask
>> 2);
600 val
&= s
->vbe_bank_mask
;
602 s
->vbe_regs
[s
->vbe_index
] = val
;
603 s
->bank_offset
= (val
<< 16);
605 case VBE_DISPI_INDEX_ENABLE
:
606 if ((val
& VBE_DISPI_ENABLED
) &&
607 !(s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
)) {
608 int h
, shift_control
;
610 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] =
611 s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
612 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] =
613 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
614 s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
] = 0;
615 s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
] = 0;
617 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
618 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 1;
620 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] *
621 ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
622 s
->vbe_start_addr
= 0;
624 /* clear the screen (should be done in BIOS) */
625 if (!(val
& VBE_DISPI_NOCLEARMEM
)) {
626 memset(s
->vram_ptr
, 0,
627 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] * s
->vbe_line_offset
);
630 /* we initialize the VGA graphic mode (should be done
632 s
->gr
[0x06] = (s
->gr
[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */
633 s
->cr
[0x17] |= 3; /* no CGA modes */
634 s
->cr
[0x13] = s
->vbe_line_offset
>> 3;
636 s
->cr
[0x01] = (s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 3) - 1;
637 /* height (only meaningful if < 1024) */
638 h
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] - 1;
640 s
->cr
[0x07] = (s
->cr
[0x07] & ~0x42) |
641 ((h
>> 7) & 0x02) | ((h
>> 3) & 0x40);
642 /* line compare to 1023 */
647 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
649 s
->sr
[0x01] &= ~8; /* no double line */
652 s
->sr
[4] |= 0x08; /* set chain 4 mode */
653 s
->sr
[2] |= 0x0f; /* activate all planes */
655 s
->gr
[0x05] = (s
->gr
[0x05] & ~0x60) | (shift_control
<< 5);
656 s
->cr
[0x09] &= ~0x9f; /* no double scan */
658 /* XXX: the bios should do that */
661 s
->dac_8bit
= (val
& VBE_DISPI_8BIT_DAC
) > 0;
662 s
->vbe_regs
[s
->vbe_index
] = val
;
664 case VBE_DISPI_INDEX_VIRT_WIDTH
:
666 int w
, h
, line_offset
;
668 if (val
< s
->vbe_regs
[VBE_DISPI_INDEX_XRES
])
671 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
672 line_offset
= w
>> 1;
674 line_offset
= w
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
675 h
= s
->vram_size
/ line_offset
;
676 /* XXX: support weird bochs semantics ? */
677 if (h
< s
->vbe_regs
[VBE_DISPI_INDEX_YRES
])
679 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] = w
;
680 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] = h
;
681 s
->vbe_line_offset
= line_offset
;
684 case VBE_DISPI_INDEX_X_OFFSET
:
685 case VBE_DISPI_INDEX_Y_OFFSET
:
688 s
->vbe_regs
[s
->vbe_index
] = val
;
689 s
->vbe_start_addr
= s
->vbe_line_offset
* s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
];
690 x
= s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
];
691 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
692 s
->vbe_start_addr
+= x
>> 1;
694 s
->vbe_start_addr
+= x
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
695 s
->vbe_start_addr
>>= 2;
705 /* called for accesses between 0xa0000 and 0xc0000 */
706 uint32_t vga_mem_readb(void *opaque
, target_phys_addr_t addr
)
708 VGACommonState
*s
= opaque
;
709 int memory_map_mode
, plane
;
712 /* convert to VGA memory offset */
713 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
715 switch(memory_map_mode
) {
721 addr
+= s
->bank_offset
;
736 if (s
->sr
[4] & 0x08) {
737 /* chain 4 mode : simplest access */
738 ret
= s
->vram_ptr
[addr
];
739 } else if (s
->gr
[5] & 0x10) {
740 /* odd/even mode (aka text mode mapping) */
741 plane
= (s
->gr
[4] & 2) | (addr
& 1);
742 ret
= s
->vram_ptr
[((addr
& ~1) << 1) | plane
];
744 /* standard VGA latched access */
745 s
->latch
= ((uint32_t *)s
->vram_ptr
)[addr
];
747 if (!(s
->gr
[5] & 0x08)) {
750 ret
= GET_PLANE(s
->latch
, plane
);
753 ret
= (s
->latch
^ mask16
[s
->gr
[2]]) & mask16
[s
->gr
[7]];
762 static uint32_t vga_mem_readw(void *opaque
, target_phys_addr_t addr
)
765 #ifdef TARGET_WORDS_BIGENDIAN
766 v
= vga_mem_readb(opaque
, addr
) << 8;
767 v
|= vga_mem_readb(opaque
, addr
+ 1);
769 v
= vga_mem_readb(opaque
, addr
);
770 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
775 static uint32_t vga_mem_readl(void *opaque
, target_phys_addr_t addr
)
778 #ifdef TARGET_WORDS_BIGENDIAN
779 v
= vga_mem_readb(opaque
, addr
) << 24;
780 v
|= vga_mem_readb(opaque
, addr
+ 1) << 16;
781 v
|= vga_mem_readb(opaque
, addr
+ 2) << 8;
782 v
|= vga_mem_readb(opaque
, addr
+ 3);
784 v
= vga_mem_readb(opaque
, addr
);
785 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
786 v
|= vga_mem_readb(opaque
, addr
+ 2) << 16;
787 v
|= vga_mem_readb(opaque
, addr
+ 3) << 24;
792 /* called for accesses between 0xa0000 and 0xc0000 */
793 void vga_mem_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
795 VGACommonState
*s
= opaque
;
796 int memory_map_mode
, plane
, write_mode
, b
, func_select
, mask
;
797 uint32_t write_mask
, bit_mask
, set_mask
;
800 printf("vga: [0x" TARGET_FMT_plx
"] = 0x%02x\n", addr
, val
);
802 /* convert to VGA memory offset */
803 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
805 switch(memory_map_mode
) {
811 addr
+= s
->bank_offset
;
826 if (s
->sr
[4] & 0x08) {
827 /* chain 4 mode : simplest access */
830 if (s
->sr
[2] & mask
) {
831 s
->vram_ptr
[addr
] = val
;
833 printf("vga: chain4: [0x" TARGET_FMT_plx
"]\n", addr
);
835 s
->plane_updated
|= mask
; /* only used to detect font change */
836 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
838 } else if (s
->gr
[5] & 0x10) {
839 /* odd/even mode (aka text mode mapping) */
840 plane
= (s
->gr
[4] & 2) | (addr
& 1);
842 if (s
->sr
[2] & mask
) {
843 addr
= ((addr
& ~1) << 1) | plane
;
844 s
->vram_ptr
[addr
] = val
;
846 printf("vga: odd/even: [0x" TARGET_FMT_plx
"]\n", addr
);
848 s
->plane_updated
|= mask
; /* only used to detect font change */
849 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
852 /* standard VGA latched access */
853 write_mode
= s
->gr
[5] & 3;
859 val
= ((val
>> b
) | (val
<< (8 - b
))) & 0xff;
863 /* apply set/reset mask */
864 set_mask
= mask16
[s
->gr
[1]];
865 val
= (val
& ~set_mask
) | (mask16
[s
->gr
[0]] & set_mask
);
872 val
= mask16
[val
& 0x0f];
878 val
= (val
>> b
) | (val
<< (8 - b
));
880 bit_mask
= s
->gr
[8] & val
;
881 val
= mask16
[s
->gr
[0]];
885 /* apply logical operation */
886 func_select
= s
->gr
[3] >> 3;
887 switch(func_select
) {
907 bit_mask
|= bit_mask
<< 8;
908 bit_mask
|= bit_mask
<< 16;
909 val
= (val
& bit_mask
) | (s
->latch
& ~bit_mask
);
912 /* mask data according to sr[2] */
914 s
->plane_updated
|= mask
; /* only used to detect font change */
915 write_mask
= mask16
[mask
];
916 ((uint32_t *)s
->vram_ptr
)[addr
] =
917 (((uint32_t *)s
->vram_ptr
)[addr
] & ~write_mask
) |
920 printf("vga: latch: [0x" TARGET_FMT_plx
"] mask=0x%08x val=0x%08x\n",
921 addr
* 4, write_mask
, val
);
923 cpu_physical_memory_set_dirty(s
->vram_offset
+ (addr
<< 2));
927 static void vga_mem_writew(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
929 #ifdef TARGET_WORDS_BIGENDIAN
930 vga_mem_writeb(opaque
, addr
, (val
>> 8) & 0xff);
931 vga_mem_writeb(opaque
, addr
+ 1, val
& 0xff);
933 vga_mem_writeb(opaque
, addr
, val
& 0xff);
934 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
938 static void vga_mem_writel(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
940 #ifdef TARGET_WORDS_BIGENDIAN
941 vga_mem_writeb(opaque
, addr
, (val
>> 24) & 0xff);
942 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 16) & 0xff);
943 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 8) & 0xff);
944 vga_mem_writeb(opaque
, addr
+ 3, val
& 0xff);
946 vga_mem_writeb(opaque
, addr
, val
& 0xff);
947 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
948 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 16) & 0xff);
949 vga_mem_writeb(opaque
, addr
+ 3, (val
>> 24) & 0xff);
953 typedef void vga_draw_glyph8_func(uint8_t *d
, int linesize
,
954 const uint8_t *font_ptr
, int h
,
955 uint32_t fgcol
, uint32_t bgcol
);
956 typedef void vga_draw_glyph9_func(uint8_t *d
, int linesize
,
957 const uint8_t *font_ptr
, int h
,
958 uint32_t fgcol
, uint32_t bgcol
, int dup9
);
959 typedef void vga_draw_line_func(VGACommonState
*s1
, uint8_t *d
,
960 const uint8_t *s
, int width
);
963 #include "vga_template.h"
966 #include "vga_template.h"
970 #include "vga_template.h"
973 #include "vga_template.h"
977 #include "vga_template.h"
980 #include "vga_template.h"
984 #include "vga_template.h"
986 static unsigned int rgb_to_pixel8_dup(unsigned int r
, unsigned int g
, unsigned b
)
989 col
= rgb_to_pixel8(r
, g
, b
);
995 static unsigned int rgb_to_pixel15_dup(unsigned int r
, unsigned int g
, unsigned b
)
998 col
= rgb_to_pixel15(r
, g
, b
);
1003 static unsigned int rgb_to_pixel15bgr_dup(unsigned int r
, unsigned int g
,
1007 col
= rgb_to_pixel15bgr(r
, g
, b
);
1012 static unsigned int rgb_to_pixel16_dup(unsigned int r
, unsigned int g
, unsigned b
)
1015 col
= rgb_to_pixel16(r
, g
, b
);
1020 static unsigned int rgb_to_pixel16bgr_dup(unsigned int r
, unsigned int g
,
1024 col
= rgb_to_pixel16bgr(r
, g
, b
);
1029 static unsigned int rgb_to_pixel32_dup(unsigned int r
, unsigned int g
, unsigned b
)
1032 col
= rgb_to_pixel32(r
, g
, b
);
1036 static unsigned int rgb_to_pixel32bgr_dup(unsigned int r
, unsigned int g
, unsigned b
)
1039 col
= rgb_to_pixel32bgr(r
, g
, b
);
1043 /* return true if the palette was modified */
1044 static int update_palette16(VGACommonState
*s
)
1047 uint32_t v
, col
, *palette
;
1050 palette
= s
->last_palette
;
1051 for(i
= 0; i
< 16; i
++) {
1053 if (s
->ar
[0x10] & 0x80)
1054 v
= ((s
->ar
[0x14] & 0xf) << 4) | (v
& 0xf);
1056 v
= ((s
->ar
[0x14] & 0xc) << 4) | (v
& 0x3f);
1058 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1059 c6_to_8(s
->palette
[v
+ 1]),
1060 c6_to_8(s
->palette
[v
+ 2]));
1061 if (col
!= palette
[i
]) {
1069 /* return true if the palette was modified */
1070 static int update_palette256(VGACommonState
*s
)
1073 uint32_t v
, col
, *palette
;
1076 palette
= s
->last_palette
;
1078 for(i
= 0; i
< 256; i
++) {
1080 col
= s
->rgb_to_pixel(s
->palette
[v
],
1084 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1085 c6_to_8(s
->palette
[v
+ 1]),
1086 c6_to_8(s
->palette
[v
+ 2]));
1088 if (col
!= palette
[i
]) {
1097 static void vga_get_offsets(VGACommonState
*s
,
1098 uint32_t *pline_offset
,
1099 uint32_t *pstart_addr
,
1100 uint32_t *pline_compare
)
1102 uint32_t start_addr
, line_offset
, line_compare
;
1103 #ifdef CONFIG_BOCHS_VBE
1104 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1105 line_offset
= s
->vbe_line_offset
;
1106 start_addr
= s
->vbe_start_addr
;
1107 line_compare
= 65535;
1111 /* compute line_offset in bytes */
1112 line_offset
= s
->cr
[0x13];
1115 /* starting address */
1116 start_addr
= s
->cr
[0x0d] | (s
->cr
[0x0c] << 8);
1119 line_compare
= s
->cr
[0x18] |
1120 ((s
->cr
[0x07] & 0x10) << 4) |
1121 ((s
->cr
[0x09] & 0x40) << 3);
1123 *pline_offset
= line_offset
;
1124 *pstart_addr
= start_addr
;
1125 *pline_compare
= line_compare
;
1128 /* update start_addr and line_offset. Return TRUE if modified */
1129 static int update_basic_params(VGACommonState
*s
)
1132 uint32_t start_addr
, line_offset
, line_compare
;
1136 s
->get_offsets(s
, &line_offset
, &start_addr
, &line_compare
);
1138 if (line_offset
!= s
->line_offset
||
1139 start_addr
!= s
->start_addr
||
1140 line_compare
!= s
->line_compare
) {
1141 s
->line_offset
= line_offset
;
1142 s
->start_addr
= start_addr
;
1143 s
->line_compare
= line_compare
;
1151 static inline int get_depth_index(DisplayState
*s
)
1153 switch(ds_get_bits_per_pixel(s
)) {
1162 if (is_surface_bgr(s
->surface
))
1169 static vga_draw_glyph8_func
*vga_draw_glyph8_table
[NB_DEPTHS
] = {
1179 static vga_draw_glyph8_func
*vga_draw_glyph16_table
[NB_DEPTHS
] = {
1181 vga_draw_glyph16_16
,
1182 vga_draw_glyph16_16
,
1183 vga_draw_glyph16_32
,
1184 vga_draw_glyph16_32
,
1185 vga_draw_glyph16_16
,
1186 vga_draw_glyph16_16
,
1189 static vga_draw_glyph9_func
*vga_draw_glyph9_table
[NB_DEPTHS
] = {
1199 static const uint8_t cursor_glyph
[32 * 4] = {
1200 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1201 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1202 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1203 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1204 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1205 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1206 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1207 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1208 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1209 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1210 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1211 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1212 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1213 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1214 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1215 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1218 static void vga_get_text_resolution(VGACommonState
*s
, int *pwidth
, int *pheight
,
1219 int *pcwidth
, int *pcheight
)
1221 int width
, cwidth
, height
, cheight
;
1223 /* total width & height */
1224 cheight
= (s
->cr
[9] & 0x1f) + 1;
1226 if (!(s
->sr
[1] & 0x01))
1228 if (s
->sr
[1] & 0x08)
1229 cwidth
= 16; /* NOTE: no 18 pixel wide */
1230 width
= (s
->cr
[0x01] + 1);
1231 if (s
->cr
[0x06] == 100) {
1232 /* ugly hack for CGA 160x100x16 - explain me the logic */
1235 height
= s
->cr
[0x12] |
1236 ((s
->cr
[0x07] & 0x02) << 7) |
1237 ((s
->cr
[0x07] & 0x40) << 3);
1238 height
= (height
+ 1) / cheight
;
1244 *pcheight
= cheight
;
1247 typedef unsigned int rgb_to_pixel_dup_func(unsigned int r
, unsigned int g
, unsigned b
);
1249 static rgb_to_pixel_dup_func
*rgb_to_pixel_dup_table
[NB_DEPTHS
] = {
1254 rgb_to_pixel32bgr_dup
,
1255 rgb_to_pixel15bgr_dup
,
1256 rgb_to_pixel16bgr_dup
,
1267 static void vga_draw_text(VGACommonState
*s
, int full_update
)
1269 int cx
, cy
, cheight
, cw
, ch
, cattr
, height
, width
, ch_attr
;
1270 int cx_min
, cx_max
, linesize
, x_incr
;
1271 uint32_t offset
, fgcol
, bgcol
, v
, cursor_offset
;
1272 uint8_t *d1
, *d
, *src
, *s1
, *dest
, *cursor_ptr
;
1273 const uint8_t *font_ptr
, *font_base
[2];
1274 int dup9
, line_offset
, depth_index
;
1276 uint32_t *ch_attr_ptr
;
1277 vga_draw_glyph8_func
*vga_draw_glyph8
;
1278 vga_draw_glyph9_func
*vga_draw_glyph9
;
1280 /* compute font data address (in plane 2) */
1282 offset
= (((v
>> 4) & 1) | ((v
<< 1) & 6)) * 8192 * 4 + 2;
1283 if (offset
!= s
->font_offsets
[0]) {
1284 s
->font_offsets
[0] = offset
;
1287 font_base
[0] = s
->vram_ptr
+ offset
;
1289 offset
= (((v
>> 5) & 1) | ((v
>> 1) & 6)) * 8192 * 4 + 2;
1290 font_base
[1] = s
->vram_ptr
+ offset
;
1291 if (offset
!= s
->font_offsets
[1]) {
1292 s
->font_offsets
[1] = offset
;
1295 if (s
->plane_updated
& (1 << 2)) {
1296 /* if the plane 2 was modified since the last display, it
1297 indicates the font may have been modified */
1298 s
->plane_updated
= 0;
1301 full_update
|= update_basic_params(s
);
1303 line_offset
= s
->line_offset
;
1304 s1
= s
->vram_ptr
+ (s
->start_addr
* 4);
1306 vga_get_text_resolution(s
, &width
, &height
, &cw
, &cheight
);
1307 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1308 if ((height
* width
) > CH_ATTR_SIZE
) {
1309 /* better than nothing: exit if transient size is too big */
1313 if (width
!= s
->last_width
|| height
!= s
->last_height
||
1314 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
|| s
->last_depth
) {
1315 s
->last_scr_width
= width
* cw
;
1316 s
->last_scr_height
= height
* cheight
;
1317 qemu_console_resize(s
->ds
, s
->last_scr_width
, s
->last_scr_height
);
1319 s
->last_width
= width
;
1320 s
->last_height
= height
;
1321 s
->last_ch
= cheight
;
1326 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1327 full_update
|= update_palette16(s
);
1328 palette
= s
->last_palette
;
1329 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1331 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
1332 if (cursor_offset
!= s
->cursor_offset
||
1333 s
->cr
[0xa] != s
->cursor_start
||
1334 s
->cr
[0xb] != s
->cursor_end
) {
1335 /* if the cursor position changed, we update the old and new
1337 if (s
->cursor_offset
< CH_ATTR_SIZE
)
1338 s
->last_ch_attr
[s
->cursor_offset
] = -1;
1339 if (cursor_offset
< CH_ATTR_SIZE
)
1340 s
->last_ch_attr
[cursor_offset
] = -1;
1341 s
->cursor_offset
= cursor_offset
;
1342 s
->cursor_start
= s
->cr
[0xa];
1343 s
->cursor_end
= s
->cr
[0xb];
1345 cursor_ptr
= s
->vram_ptr
+ (s
->start_addr
+ cursor_offset
) * 4;
1347 depth_index
= get_depth_index(s
->ds
);
1349 vga_draw_glyph8
= vga_draw_glyph16_table
[depth_index
];
1351 vga_draw_glyph8
= vga_draw_glyph8_table
[depth_index
];
1352 vga_draw_glyph9
= vga_draw_glyph9_table
[depth_index
];
1354 dest
= ds_get_data(s
->ds
);
1355 linesize
= ds_get_linesize(s
->ds
);
1356 ch_attr_ptr
= s
->last_ch_attr
;
1357 for(cy
= 0; cy
< height
; cy
++) {
1362 for(cx
= 0; cx
< width
; cx
++) {
1363 ch_attr
= *(uint16_t *)src
;
1364 if (full_update
|| ch_attr
!= *ch_attr_ptr
) {
1369 *ch_attr_ptr
= ch_attr
;
1370 #ifdef HOST_WORDS_BIGENDIAN
1372 cattr
= ch_attr
& 0xff;
1374 ch
= ch_attr
& 0xff;
1375 cattr
= ch_attr
>> 8;
1377 font_ptr
= font_base
[(cattr
>> 3) & 1];
1378 font_ptr
+= 32 * 4 * ch
;
1379 bgcol
= palette
[cattr
>> 4];
1380 fgcol
= palette
[cattr
& 0x0f];
1382 vga_draw_glyph8(d1
, linesize
,
1383 font_ptr
, cheight
, fgcol
, bgcol
);
1386 if (ch
>= 0xb0 && ch
<= 0xdf && (s
->ar
[0x10] & 0x04))
1388 vga_draw_glyph9(d1
, linesize
,
1389 font_ptr
, cheight
, fgcol
, bgcol
, dup9
);
1391 if (src
== cursor_ptr
&&
1392 !(s
->cr
[0x0a] & 0x20)) {
1393 int line_start
, line_last
, h
;
1394 /* draw the cursor */
1395 line_start
= s
->cr
[0x0a] & 0x1f;
1396 line_last
= s
->cr
[0x0b] & 0x1f;
1397 /* XXX: check that */
1398 if (line_last
> cheight
- 1)
1399 line_last
= cheight
- 1;
1400 if (line_last
>= line_start
&& line_start
< cheight
) {
1401 h
= line_last
- line_start
+ 1;
1402 d
= d1
+ linesize
* line_start
;
1404 vga_draw_glyph8(d
, linesize
,
1405 cursor_glyph
, h
, fgcol
, bgcol
);
1407 vga_draw_glyph9(d
, linesize
,
1408 cursor_glyph
, h
, fgcol
, bgcol
, 1);
1418 dpy_update(s
->ds
, cx_min
* cw
, cy
* cheight
,
1419 (cx_max
- cx_min
+ 1) * cw
, cheight
);
1421 dest
+= linesize
* cheight
;
1440 static vga_draw_line_func
*vga_draw_line_table
[NB_DEPTHS
* VGA_DRAW_LINE_NB
] = {
1450 vga_draw_line2d2_16
,
1451 vga_draw_line2d2_16
,
1452 vga_draw_line2d2_32
,
1453 vga_draw_line2d2_32
,
1454 vga_draw_line2d2_16
,
1455 vga_draw_line2d2_16
,
1466 vga_draw_line4d2_16
,
1467 vga_draw_line4d2_16
,
1468 vga_draw_line4d2_32
,
1469 vga_draw_line4d2_32
,
1470 vga_draw_line4d2_16
,
1471 vga_draw_line4d2_16
,
1474 vga_draw_line8d2_16
,
1475 vga_draw_line8d2_16
,
1476 vga_draw_line8d2_32
,
1477 vga_draw_line8d2_32
,
1478 vga_draw_line8d2_16
,
1479 vga_draw_line8d2_16
,
1493 vga_draw_line15_32bgr
,
1494 vga_draw_line15_15bgr
,
1495 vga_draw_line15_16bgr
,
1501 vga_draw_line16_32bgr
,
1502 vga_draw_line16_15bgr
,
1503 vga_draw_line16_16bgr
,
1509 vga_draw_line24_32bgr
,
1510 vga_draw_line24_15bgr
,
1511 vga_draw_line24_16bgr
,
1517 vga_draw_line32_32bgr
,
1518 vga_draw_line32_15bgr
,
1519 vga_draw_line32_16bgr
,
1522 static int vga_get_bpp(VGACommonState
*s
)
1525 #ifdef CONFIG_BOCHS_VBE
1526 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1527 ret
= s
->vbe_regs
[VBE_DISPI_INDEX_BPP
];
1536 static void vga_get_resolution(VGACommonState
*s
, int *pwidth
, int *pheight
)
1540 #ifdef CONFIG_BOCHS_VBE
1541 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1542 width
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
1543 height
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
1547 width
= (s
->cr
[0x01] + 1) * 8;
1548 height
= s
->cr
[0x12] |
1549 ((s
->cr
[0x07] & 0x02) << 7) |
1550 ((s
->cr
[0x07] & 0x40) << 3);
1551 height
= (height
+ 1);
1557 void vga_invalidate_scanlines(VGACommonState
*s
, int y1
, int y2
)
1560 if (y1
>= VGA_MAX_HEIGHT
)
1562 if (y2
>= VGA_MAX_HEIGHT
)
1563 y2
= VGA_MAX_HEIGHT
;
1564 for(y
= y1
; y
< y2
; y
++) {
1565 s
->invalidated_y_table
[y
>> 5] |= 1 << (y
& 0x1f);
1569 static void vga_sync_dirty_bitmap(VGACommonState
*s
)
1572 cpu_physical_sync_dirty_bitmap(s
->map_addr
, s
->map_end
);
1574 if (s
->lfb_vram_mapped
) {
1575 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa0000, 0xa8000);
1576 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa8000, 0xb0000);
1580 void vga_dirty_log_start(VGACommonState
*s
)
1582 if (kvm_enabled() && s
->map_addr
)
1583 kvm_log_start(s
->map_addr
, s
->map_end
- s
->map_addr
);
1585 if (kvm_enabled() && s
->lfb_vram_mapped
) {
1586 kvm_log_start(isa_mem_base
+ 0xa0000, 0x8000);
1587 kvm_log_start(isa_mem_base
+ 0xa8000, 0x8000);
1594 static void vga_draw_graphic(VGACommonState
*s
, int full_update
)
1596 int y1
, y
, update
, linesize
, y_start
, double_scan
, mask
, depth
;
1597 int width
, height
, shift_control
, line_offset
, bwidth
, bits
;
1598 ram_addr_t page0
, page1
, page_min
, page_max
;
1599 int disp_width
, multi_scan
, multi_run
;
1601 uint32_t v
, addr1
, addr
;
1602 vga_draw_line_func
*vga_draw_line
;
1604 full_update
|= update_basic_params(s
);
1607 vga_sync_dirty_bitmap(s
);
1609 s
->get_resolution(s
, &width
, &height
);
1612 shift_control
= (s
->gr
[0x05] >> 5) & 3;
1613 double_scan
= (s
->cr
[0x09] >> 7);
1614 if (shift_control
!= 1) {
1615 multi_scan
= (((s
->cr
[0x09] & 0x1f) + 1) << double_scan
) - 1;
1617 /* in CGA modes, multi_scan is ignored */
1618 /* XXX: is it correct ? */
1619 multi_scan
= double_scan
;
1621 multi_run
= multi_scan
;
1622 if (shift_control
!= s
->shift_control
||
1623 double_scan
!= s
->double_scan
) {
1625 s
->shift_control
= shift_control
;
1626 s
->double_scan
= double_scan
;
1629 if (shift_control
== 0) {
1630 if (s
->sr
[0x01] & 8) {
1633 } else if (shift_control
== 1) {
1634 if (s
->sr
[0x01] & 8) {
1639 depth
= s
->get_bpp(s
);
1640 if (s
->line_offset
!= s
->last_line_offset
||
1641 disp_width
!= s
->last_width
||
1642 height
!= s
->last_height
||
1643 s
->last_depth
!= depth
) {
1644 #if defined(HOST_WORDS_BIGENDIAN) == defined(TARGET_WORDS_BIGENDIAN)
1645 if (depth
== 16 || depth
== 32) {
1649 qemu_free_displaysurface(s
->ds
);
1650 s
->ds
->surface
= qemu_create_displaysurface_from(disp_width
, height
, depth
,
1652 s
->vram_ptr
+ (s
->start_addr
* 4));
1653 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
1654 s
->ds
->surface
->pf
= qemu_different_endianness_pixelformat(depth
);
1658 qemu_console_resize(s
->ds
, disp_width
, height
);
1660 s
->last_scr_width
= disp_width
;
1661 s
->last_scr_height
= height
;
1662 s
->last_width
= disp_width
;
1663 s
->last_height
= height
;
1664 s
->last_line_offset
= s
->line_offset
;
1665 s
->last_depth
= depth
;
1667 } else if (is_buffer_shared(s
->ds
->surface
) &&
1668 (full_update
|| s
->ds
->surface
->data
!= s
->vram_ptr
+ (s
->start_addr
* 4))) {
1669 s
->ds
->surface
->data
= s
->vram_ptr
+ (s
->start_addr
* 4);
1674 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1676 if (shift_control
== 0) {
1677 full_update
|= update_palette16(s
);
1678 if (s
->sr
[0x01] & 8) {
1679 v
= VGA_DRAW_LINE4D2
;
1684 } else if (shift_control
== 1) {
1685 full_update
|= update_palette16(s
);
1686 if (s
->sr
[0x01] & 8) {
1687 v
= VGA_DRAW_LINE2D2
;
1693 switch(s
->get_bpp(s
)) {
1696 full_update
|= update_palette256(s
);
1697 v
= VGA_DRAW_LINE8D2
;
1701 full_update
|= update_palette256(s
);
1706 v
= VGA_DRAW_LINE15
;
1710 v
= VGA_DRAW_LINE16
;
1714 v
= VGA_DRAW_LINE24
;
1718 v
= VGA_DRAW_LINE32
;
1723 vga_draw_line
= vga_draw_line_table
[v
* NB_DEPTHS
+ get_depth_index(s
->ds
)];
1725 if (!is_buffer_shared(s
->ds
->surface
) && s
->cursor_invalidate
)
1726 s
->cursor_invalidate(s
);
1728 line_offset
= s
->line_offset
;
1730 printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
1731 width
, height
, v
, line_offset
, s
->cr
[9], s
->cr
[0x17], s
->line_compare
, s
->sr
[0x01]);
1733 addr1
= (s
->start_addr
* 4);
1734 bwidth
= (width
* bits
+ 7) / 8;
1738 d
= ds_get_data(s
->ds
);
1739 linesize
= ds_get_linesize(s
->ds
);
1741 for(y
= 0; y
< height
; y
++) {
1743 if (!(s
->cr
[0x17] & 1)) {
1745 /* CGA compatibility handling */
1746 shift
= 14 + ((s
->cr
[0x17] >> 6) & 1);
1747 addr
= (addr
& ~(1 << shift
)) | ((y1
& 1) << shift
);
1749 if (!(s
->cr
[0x17] & 2)) {
1750 addr
= (addr
& ~0x8000) | ((y1
& 2) << 14);
1752 page0
= s
->vram_offset
+ (addr
& TARGET_PAGE_MASK
);
1753 page1
= s
->vram_offset
+ ((addr
+ bwidth
- 1) & TARGET_PAGE_MASK
);
1754 update
= full_update
|
1755 cpu_physical_memory_get_dirty(page0
, VGA_DIRTY_FLAG
) |
1756 cpu_physical_memory_get_dirty(page1
, VGA_DIRTY_FLAG
);
1757 if ((page1
- page0
) > TARGET_PAGE_SIZE
) {
1758 /* if wide line, can use another page */
1759 update
|= cpu_physical_memory_get_dirty(page0
+ TARGET_PAGE_SIZE
,
1762 /* explicit invalidation for the hardware cursor */
1763 update
|= (s
->invalidated_y_table
[y
>> 5] >> (y
& 0x1f)) & 1;
1767 if (page0
< page_min
)
1769 if (page1
> page_max
)
1771 if (!(is_buffer_shared(s
->ds
->surface
))) {
1772 vga_draw_line(s
, d
, s
->vram_ptr
+ addr
, width
);
1773 if (s
->cursor_draw_line
)
1774 s
->cursor_draw_line(s
, d
, y
);
1778 /* flush to display */
1779 dpy_update(s
->ds
, 0, y_start
,
1780 disp_width
, y
- y_start
);
1785 mask
= (s
->cr
[0x17] & 3) ^ 3;
1786 if ((y1
& mask
) == mask
)
1787 addr1
+= line_offset
;
1789 multi_run
= multi_scan
;
1793 /* line compare acts on the displayed lines */
1794 if (y
== s
->line_compare
)
1799 /* flush to display */
1800 dpy_update(s
->ds
, 0, y_start
,
1801 disp_width
, y
- y_start
);
1803 /* reset modified pages */
1804 if (page_max
>= page_min
) {
1805 cpu_physical_memory_reset_dirty(page_min
, page_max
+ TARGET_PAGE_SIZE
,
1808 memset(s
->invalidated_y_table
, 0, ((height
+ 31) >> 5) * 4);
1811 static void vga_draw_blank(VGACommonState
*s
, int full_update
)
1818 if (s
->last_scr_width
<= 0 || s
->last_scr_height
<= 0)
1822 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1823 if (ds_get_bits_per_pixel(s
->ds
) == 8)
1824 val
= s
->rgb_to_pixel(0, 0, 0);
1827 w
= s
->last_scr_width
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1828 d
= ds_get_data(s
->ds
);
1829 for(i
= 0; i
< s
->last_scr_height
; i
++) {
1831 d
+= ds_get_linesize(s
->ds
);
1833 dpy_update(s
->ds
, 0, 0,
1834 s
->last_scr_width
, s
->last_scr_height
);
1837 #define GMODE_TEXT 0
1838 #define GMODE_GRAPH 1
1839 #define GMODE_BLANK 2
1841 static void vga_update_display(void *opaque
)
1843 VGACommonState
*s
= opaque
;
1844 int full_update
, graphic_mode
;
1846 if (ds_get_bits_per_pixel(s
->ds
) == 0) {
1849 full_update
= s
->full_update
;
1851 if (!(s
->ar_index
& 0x20)) {
1852 graphic_mode
= GMODE_BLANK
;
1854 graphic_mode
= s
->gr
[6] & 1;
1856 if (graphic_mode
!= s
->graphic_mode
) {
1857 s
->graphic_mode
= graphic_mode
;
1860 switch(graphic_mode
) {
1862 vga_draw_text(s
, full_update
);
1865 vga_draw_graphic(s
, full_update
);
1869 vga_draw_blank(s
, full_update
);
1875 /* force a full display refresh */
1876 static void vga_invalidate_display(void *opaque
)
1878 VGACommonState
*s
= opaque
;
1883 void vga_common_reset(VGACommonState
*s
)
1889 s
->lfb_vram_mapped
= 0;
1893 memset(s
->sr
, '\0', sizeof(s
->sr
));
1895 memset(s
->gr
, '\0', sizeof(s
->gr
));
1897 memset(s
->ar
, '\0', sizeof(s
->ar
));
1898 s
->ar_flip_flop
= 0;
1900 memset(s
->cr
, '\0', sizeof(s
->cr
));
1906 s
->dac_sub_index
= 0;
1907 s
->dac_read_index
= 0;
1908 s
->dac_write_index
= 0;
1909 memset(s
->dac_cache
, '\0', sizeof(s
->dac_cache
));
1911 memset(s
->palette
, '\0', sizeof(s
->palette
));
1913 #ifdef CONFIG_BOCHS_VBE
1915 memset(s
->vbe_regs
, '\0', sizeof(s
->vbe_regs
));
1916 s
->vbe_regs
[VBE_DISPI_INDEX_ID
] = VBE_DISPI_ID0
;
1917 s
->vbe_start_addr
= 0;
1918 s
->vbe_line_offset
= 0;
1919 s
->vbe_bank_mask
= (s
->vram_size
>> 16) - 1;
1921 memset(s
->font_offsets
, '\0', sizeof(s
->font_offsets
));
1922 s
->graphic_mode
= -1; /* force full update */
1923 s
->shift_control
= 0;
1926 s
->line_compare
= 0;
1928 s
->plane_updated
= 0;
1933 s
->last_scr_width
= 0;
1934 s
->last_scr_height
= 0;
1935 s
->cursor_start
= 0;
1937 s
->cursor_offset
= 0;
1938 memset(s
->invalidated_y_table
, '\0', sizeof(s
->invalidated_y_table
));
1939 memset(s
->last_palette
, '\0', sizeof(s
->last_palette
));
1940 memset(s
->last_ch_attr
, '\0', sizeof(s
->last_ch_attr
));
1941 switch (vga_retrace_method
) {
1942 case VGA_RETRACE_DUMB
:
1944 case VGA_RETRACE_PRECISE
:
1945 memset(&s
->retrace_info
, 0, sizeof (s
->retrace_info
));
1950 static void vga_reset(void *opaque
)
1952 VGACommonState
*s
= opaque
;
1953 vga_common_reset(s
);
1956 #define TEXTMODE_X(x) ((x) % width)
1957 #define TEXTMODE_Y(x) ((x) / width)
1958 #define VMEM2CHTYPE(v) ((v & 0xff0007ff) | \
1959 ((v & 0x00000800) << 10) | ((v & 0x00007000) >> 1))
1960 /* relay text rendering to the display driver
1961 * instead of doing a full vga_update_display() */
1962 static void vga_update_text(void *opaque
, console_ch_t
*chardata
)
1964 VGACommonState
*s
= opaque
;
1965 int graphic_mode
, i
, cursor_offset
, cursor_visible
;
1966 int cw
, cheight
, width
, height
, size
, c_min
, c_max
;
1968 console_ch_t
*dst
, val
;
1969 char msg_buffer
[80];
1970 int full_update
= 0;
1972 if (!(s
->ar_index
& 0x20)) {
1973 graphic_mode
= GMODE_BLANK
;
1975 graphic_mode
= s
->gr
[6] & 1;
1977 if (graphic_mode
!= s
->graphic_mode
) {
1978 s
->graphic_mode
= graphic_mode
;
1981 if (s
->last_width
== -1) {
1986 switch (graphic_mode
) {
1988 /* TODO: update palette */
1989 full_update
|= update_basic_params(s
);
1991 /* total width & height */
1992 cheight
= (s
->cr
[9] & 0x1f) + 1;
1994 if (!(s
->sr
[1] & 0x01))
1996 if (s
->sr
[1] & 0x08)
1997 cw
= 16; /* NOTE: no 18 pixel wide */
1998 width
= (s
->cr
[0x01] + 1);
1999 if (s
->cr
[0x06] == 100) {
2000 /* ugly hack for CGA 160x100x16 - explain me the logic */
2003 height
= s
->cr
[0x12] |
2004 ((s
->cr
[0x07] & 0x02) << 7) |
2005 ((s
->cr
[0x07] & 0x40) << 3);
2006 height
= (height
+ 1) / cheight
;
2009 size
= (height
* width
);
2010 if (size
> CH_ATTR_SIZE
) {
2014 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Text mode",
2019 if (width
!= s
->last_width
|| height
!= s
->last_height
||
2020 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
) {
2021 s
->last_scr_width
= width
* cw
;
2022 s
->last_scr_height
= height
* cheight
;
2023 s
->ds
->surface
->width
= width
;
2024 s
->ds
->surface
->height
= height
;
2026 s
->last_width
= width
;
2027 s
->last_height
= height
;
2028 s
->last_ch
= cheight
;
2033 /* Update "hardware" cursor */
2034 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
2035 if (cursor_offset
!= s
->cursor_offset
||
2036 s
->cr
[0xa] != s
->cursor_start
||
2037 s
->cr
[0xb] != s
->cursor_end
|| full_update
) {
2038 cursor_visible
= !(s
->cr
[0xa] & 0x20);
2039 if (cursor_visible
&& cursor_offset
< size
&& cursor_offset
>= 0)
2041 TEXTMODE_X(cursor_offset
),
2042 TEXTMODE_Y(cursor_offset
));
2044 dpy_cursor(s
->ds
, -1, -1);
2045 s
->cursor_offset
= cursor_offset
;
2046 s
->cursor_start
= s
->cr
[0xa];
2047 s
->cursor_end
= s
->cr
[0xb];
2050 src
= (uint32_t *) s
->vram_ptr
+ s
->start_addr
;
2054 for (i
= 0; i
< size
; src
++, dst
++, i
++)
2055 console_write_ch(dst
, VMEM2CHTYPE(*src
));
2057 dpy_update(s
->ds
, 0, 0, width
, height
);
2061 for (i
= 0; i
< size
; src
++, dst
++, i
++) {
2062 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2070 for (; i
< size
; src
++, dst
++, i
++) {
2071 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2078 if (c_min
<= c_max
) {
2079 i
= TEXTMODE_Y(c_min
);
2080 dpy_update(s
->ds
, 0, i
, width
, TEXTMODE_Y(c_max
) - i
+ 1);
2089 s
->get_resolution(s
, &width
, &height
);
2090 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Graphic mode",
2098 snprintf(msg_buffer
, sizeof(msg_buffer
), "VGA Blank mode");
2102 /* Display a message */
2104 s
->last_height
= height
= 3;
2105 dpy_cursor(s
->ds
, -1, -1);
2106 s
->ds
->surface
->width
= s
->last_width
;
2107 s
->ds
->surface
->height
= height
;
2110 for (dst
= chardata
, i
= 0; i
< s
->last_width
* height
; i
++)
2111 console_write_ch(dst
++, ' ');
2113 size
= strlen(msg_buffer
);
2114 width
= (s
->last_width
- size
) / 2;
2115 dst
= chardata
+ s
->last_width
+ width
;
2116 for (i
= 0; i
< size
; i
++)
2117 console_write_ch(dst
++, 0x00200100 | msg_buffer
[i
]);
2119 dpy_update(s
->ds
, 0, 0, s
->last_width
, height
);
2122 CPUReadMemoryFunc
* const vga_mem_read
[3] = {
2128 CPUWriteMemoryFunc
* const vga_mem_write
[3] = {
2134 void vga_common_save(QEMUFile
*f
, void *opaque
)
2136 VGACommonState
*s
= opaque
;
2139 qemu_put_be32s(f
, &s
->latch
);
2140 qemu_put_8s(f
, &s
->sr_index
);
2141 qemu_put_buffer(f
, s
->sr
, 8);
2142 qemu_put_8s(f
, &s
->gr_index
);
2143 qemu_put_buffer(f
, s
->gr
, 16);
2144 qemu_put_8s(f
, &s
->ar_index
);
2145 qemu_put_buffer(f
, s
->ar
, 21);
2146 qemu_put_be32(f
, s
->ar_flip_flop
);
2147 qemu_put_8s(f
, &s
->cr_index
);
2148 qemu_put_buffer(f
, s
->cr
, 256);
2149 qemu_put_8s(f
, &s
->msr
);
2150 qemu_put_8s(f
, &s
->fcr
);
2151 qemu_put_byte(f
, s
->st00
);
2152 qemu_put_8s(f
, &s
->st01
);
2154 qemu_put_8s(f
, &s
->dac_state
);
2155 qemu_put_8s(f
, &s
->dac_sub_index
);
2156 qemu_put_8s(f
, &s
->dac_read_index
);
2157 qemu_put_8s(f
, &s
->dac_write_index
);
2158 qemu_put_buffer(f
, s
->dac_cache
, 3);
2159 qemu_put_buffer(f
, s
->palette
, 768);
2161 qemu_put_be32(f
, s
->bank_offset
);
2162 qemu_put_byte(f
, s
->is_vbe_vmstate
);
2163 #ifdef CONFIG_BOCHS_VBE
2164 qemu_put_be16s(f
, &s
->vbe_index
);
2165 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2166 qemu_put_be16s(f
, &s
->vbe_regs
[i
]);
2167 qemu_put_be32s(f
, &s
->vbe_start_addr
);
2168 qemu_put_be32s(f
, &s
->vbe_line_offset
);
2169 qemu_put_be32s(f
, &s
->vbe_bank_mask
);
2173 int vga_common_load(QEMUFile
*f
, void *opaque
, int version_id
)
2175 VGACommonState
*s
= opaque
;
2181 qemu_get_be32s(f
, &s
->latch
);
2182 qemu_get_8s(f
, &s
->sr_index
);
2183 qemu_get_buffer(f
, s
->sr
, 8);
2184 qemu_get_8s(f
, &s
->gr_index
);
2185 qemu_get_buffer(f
, s
->gr
, 16);
2186 qemu_get_8s(f
, &s
->ar_index
);
2187 qemu_get_buffer(f
, s
->ar
, 21);
2188 s
->ar_flip_flop
=qemu_get_be32(f
);
2189 qemu_get_8s(f
, &s
->cr_index
);
2190 qemu_get_buffer(f
, s
->cr
, 256);
2191 qemu_get_8s(f
, &s
->msr
);
2192 qemu_get_8s(f
, &s
->fcr
);
2193 qemu_get_8s(f
, &s
->st00
);
2194 qemu_get_8s(f
, &s
->st01
);
2196 qemu_get_8s(f
, &s
->dac_state
);
2197 qemu_get_8s(f
, &s
->dac_sub_index
);
2198 qemu_get_8s(f
, &s
->dac_read_index
);
2199 qemu_get_8s(f
, &s
->dac_write_index
);
2200 qemu_get_buffer(f
, s
->dac_cache
, 3);
2201 qemu_get_buffer(f
, s
->palette
, 768);
2203 s
->bank_offset
=qemu_get_be32(f
);
2204 s
->is_vbe_vmstate
= qemu_get_byte(f
);
2205 #ifdef CONFIG_BOCHS_VBE
2206 if (!s
->is_vbe_vmstate
)
2208 qemu_get_be16s(f
, &s
->vbe_index
);
2209 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2210 qemu_get_be16s(f
, &s
->vbe_regs
[i
]);
2211 qemu_get_be32s(f
, &s
->vbe_start_addr
);
2212 qemu_get_be32s(f
, &s
->vbe_line_offset
);
2213 qemu_get_be32s(f
, &s
->vbe_bank_mask
);
2215 if (s
->is_vbe_vmstate
)
2220 s
->graphic_mode
= -1;
2224 void vga_common_init(VGACommonState
*s
, int vga_ram_size
)
2228 for(i
= 0;i
< 256; i
++) {
2230 for(j
= 0; j
< 8; j
++) {
2231 v
|= ((i
>> j
) & 1) << (j
* 4);
2236 for(j
= 0; j
< 4; j
++) {
2237 v
|= ((i
>> (2 * j
)) & 3) << (j
* 4);
2241 for(i
= 0; i
< 16; i
++) {
2243 for(j
= 0; j
< 4; j
++) {
2246 v
|= b
<< (2 * j
+ 1);
2251 #ifdef CONFIG_BOCHS_VBE
2252 s
->is_vbe_vmstate
= 1;
2254 s
->is_vbe_vmstate
= 0;
2256 s
->vram_offset
= qemu_ram_alloc(vga_ram_size
);
2257 s
->vram_ptr
= qemu_get_ram_ptr(s
->vram_offset
);
2258 s
->vram_size
= vga_ram_size
;
2259 s
->get_bpp
= vga_get_bpp
;
2260 s
->get_offsets
= vga_get_offsets
;
2261 s
->get_resolution
= vga_get_resolution
;
2262 s
->update
= vga_update_display
;
2263 s
->invalidate
= vga_invalidate_display
;
2264 s
->screen_dump
= vga_screen_dump
;
2265 s
->text_update
= vga_update_text
;
2266 switch (vga_retrace_method
) {
2267 case VGA_RETRACE_DUMB
:
2268 s
->retrace
= vga_dumb_retrace
;
2269 s
->update_retrace_info
= vga_dumb_update_retrace_info
;
2272 case VGA_RETRACE_PRECISE
:
2273 s
->retrace
= vga_precise_retrace
;
2274 s
->update_retrace_info
= vga_precise_update_retrace_info
;
2280 /* used by both ISA and PCI */
2281 void vga_init(VGACommonState
*s
)
2285 qemu_register_reset(vga_reset
, s
);
2287 register_ioport_write(0x3c0, 16, 1, vga_ioport_write
, s
);
2289 register_ioport_write(0x3b4, 2, 1, vga_ioport_write
, s
);
2290 register_ioport_write(0x3d4, 2, 1, vga_ioport_write
, s
);
2291 register_ioport_write(0x3ba, 1, 1, vga_ioport_write
, s
);
2292 register_ioport_write(0x3da, 1, 1, vga_ioport_write
, s
);
2294 register_ioport_read(0x3c0, 16, 1, vga_ioport_read
, s
);
2296 register_ioport_read(0x3b4, 2, 1, vga_ioport_read
, s
);
2297 register_ioport_read(0x3d4, 2, 1, vga_ioport_read
, s
);
2298 register_ioport_read(0x3ba, 1, 1, vga_ioport_read
, s
);
2299 register_ioport_read(0x3da, 1, 1, vga_ioport_read
, s
);
2302 #ifdef CONFIG_BOCHS_VBE
2303 #if defined (TARGET_I386)
2304 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2305 register_ioport_read(0x1cf, 1, 2, vbe_ioport_read_data
, s
);
2307 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2308 register_ioport_write(0x1cf, 1, 2, vbe_ioport_write_data
, s
);
2310 /* old Bochs IO ports */
2311 register_ioport_read(0xff80, 1, 2, vbe_ioport_read_index
, s
);
2312 register_ioport_read(0xff81, 1, 2, vbe_ioport_read_data
, s
);
2314 register_ioport_write(0xff80, 1, 2, vbe_ioport_write_index
, s
);
2315 register_ioport_write(0xff81, 1, 2, vbe_ioport_write_data
, s
);
2317 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2318 register_ioport_read(0x1d0, 1, 2, vbe_ioport_read_data
, s
);
2320 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2321 register_ioport_write(0x1d0, 1, 2, vbe_ioport_write_data
, s
);
2323 #endif /* CONFIG_BOCHS_VBE */
2325 vga_io_memory
= cpu_register_io_memory(vga_mem_read
, vga_mem_write
, s
);
2326 cpu_register_physical_memory(isa_mem_base
+ 0x000a0000, 0x20000,
2328 qemu_register_coalesced_mmio(isa_mem_base
+ 0x000a0000, 0x20000);
2331 /********************************************************/
2332 /* vga screen dump */
2334 static void vga_save_dpy_update(DisplayState
*ds
,
2335 int x
, int y
, int w
, int h
)
2337 if (screen_dump_filename
) {
2338 ppm_save(screen_dump_filename
, ds
->surface
);
2339 screen_dump_filename
= NULL
;
2343 static void vga_save_dpy_resize(DisplayState
*s
)
2347 static void vga_save_dpy_refresh(DisplayState
*s
)
2351 int ppm_save(const char *filename
, struct DisplaySurface
*ds
)
2359 f
= fopen(filename
, "wb");
2362 fprintf(f
, "P6\n%d %d\n%d\n",
2363 ds
->width
, ds
->height
, 255);
2365 for(y
= 0; y
< ds
->height
; y
++) {
2367 for(x
= 0; x
< ds
->width
; x
++) {
2368 if (ds
->pf
.bits_per_pixel
== 32)
2371 v
= (uint32_t) (*(uint16_t *)d
);
2372 r
= ((v
>> ds
->pf
.rshift
) & ds
->pf
.rmax
) * 256 /
2374 g
= ((v
>> ds
->pf
.gshift
) & ds
->pf
.gmax
) * 256 /
2376 b
= ((v
>> ds
->pf
.bshift
) & ds
->pf
.bmax
) * 256 /
2381 d
+= ds
->pf
.bytes_per_pixel
;
2389 static DisplayChangeListener
* vga_screen_dump_init(DisplayState
*ds
)
2391 DisplayChangeListener
*dcl
;
2393 dcl
= qemu_mallocz(sizeof(DisplayChangeListener
));
2394 dcl
->dpy_update
= vga_save_dpy_update
;
2395 dcl
->dpy_resize
= vga_save_dpy_resize
;
2396 dcl
->dpy_refresh
= vga_save_dpy_refresh
;
2397 register_displaychangelistener(ds
, dcl
);
2401 /* save the vga display in a PPM image even if no display is
2403 static void vga_screen_dump(void *opaque
, const char *filename
)
2405 VGACommonState
*s
= opaque
;
2407 if (!screen_dump_dcl
)
2408 screen_dump_dcl
= vga_screen_dump_init(s
->ds
);
2410 screen_dump_filename
= (char *)filename
;
2411 vga_invalidate_display(s
);