include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include <signal.h>
  24 #include <setjmp.h>
  25 #include "hw/qdev-core.h"
  26 #include "disas/bfd.h"
  27 #include "exec/hwaddr.h"
  28 #include "exec/memattrs.h"
  29 #include "qemu/queue.h"
  30 #include "qemu/thread.h"
  31 #include "qemu/tls.h"
  32 #include "qemu/typedefs.h"
  33
  34 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  35                                      void *opaque);
  36
  37 /**
  38  * vaddr:
  39  * Type wide enough to contain any #target_ulong virtual address.
  40  */
  41 typedef uint64_t vaddr;
  42 #define VADDR_PRId PRId64
  43 #define VADDR_PRIu PRIu64
  44 #define VADDR_PRIo PRIo64
  45 #define VADDR_PRIx PRIx64
  46 #define VADDR_PRIX PRIX64
  47 #define VADDR_MAX UINT64_MAX
  48
  49 /**
  50  * SECTION:cpu
  51  * @section_id: QEMU-cpu
  52  * @title: CPU Class
  53  * @short_description: Base class for all CPUs
  54  */
  55
  56 #define TYPE_CPU "cpu"
  57
  58 /* Since this macro is used a lot in hot code paths and in conjunction with
  59  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
  60  * an unchecked cast.
  61  */
  62 #define CPU(obj) ((CPUState *)(obj))
  63
  64 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  65 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  66
  67 typedef struct CPUState CPUState;
  68
  69 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  70                                     bool is_write, bool is_exec, int opaque,
  71                                     unsigned size);
  72
  73 struct TranslationBlock;
  74
  75 /**
  76  * CPUClass:
  77  * @class_by_name: Callback to map -cpu command line model name to an
  78  * instantiatable CPU type.
  79  * @parse_features: Callback to parse command line arguments.
  80  * @reset: Callback to reset the #CPUState to its initial state.
  81  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  82  * @has_work: Callback for checking if there is work to do.
  83  * @do_interrupt: Callback for interrupt handling.
  84  * @do_unassigned_access: Callback for unassigned access handling.
  85  * @do_unaligned_access: Callback for unaligned access handling, if
  86  * the target defines #ALIGNED_ONLY.
  87  * @virtio_is_big_endian: Callback to return %true if a CPU which supports
  88  * runtime configurable endianness is currently big-endian. Non-configurable
  89  * CPUs can use the default implementation of this method. This method should
  90  * not be used by any callers other than the pre-1.0 virtio devices.
  91  * @memory_rw_debug: Callback for GDB memory access.
  92  * @dump_state: Callback for dumping state.
  93  * @dump_statistics: Callback for dumping statistics.
  94  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  95  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
  96  * @get_memory_mapping: Callback for obtaining the memory mappings.
  97  * @set_pc: Callback for setting the Program Counter register.
  98  * @synchronize_from_tb: Callback for synchronizing state from a TCG
  99  * #TranslationBlock.
 100  * @handle_mmu_fault: Callback for handling an MMU fault.
 101  * @get_phys_page_debug: Callback for obtaining a physical address.
 102  * @gdb_read_register: Callback for letting GDB read a register.
 103  * @gdb_write_register: Callback for letting GDB write a register.
 104  * @debug_excp_handler: Callback for handling debug exceptions.
 105  * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
 106  * 64-bit VM coredump.
 107  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 108  * note to a 32-bit VM coredump.
 109  * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
 110  * 32-bit VM coredump.
 111  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 112  * note to a 32-bit VM coredump.
 113  * @vmsd: State description for migration.
 114  * @gdb_num_core_regs: Number of core registers accessible to GDB.
 115  * @gdb_core_xml_file: File name for core registers GDB XML description.
 116  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
 117  *           before the insn which triggers a watchpoint rather than after it.
 118  * @cpu_exec_enter: Callback for cpu_exec preparation.
 119  * @cpu_exec_exit: Callback for cpu_exec cleanup.
 120  * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
 121  * @disas_set_info: Setup architecture specific components of disassembly info
 122  *
 123  * Represents a CPU family or model.
 124  */
 125 typedef struct CPUClass {
 126     /*< private >*/
 127     DeviceClass parent_class;
 128     /*< public >*/
 129
 130     ObjectClass *(*class_by_name)(const char *cpu_model);
 131     void (*parse_features)(CPUState *cpu, char *str, Error **errp);
 132
 133     void (*reset)(CPUState *cpu);
 134     int reset_dump_flags;
 135     bool (*has_work)(CPUState *cpu);
 136     void (*do_interrupt)(CPUState *cpu);
 137     CPUUnassignedAccess do_unassigned_access;
 138     void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
 139                                 int is_write, int is_user, uintptr_t retaddr);
 140     bool (*virtio_is_big_endian)(CPUState *cpu);
 141     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 142                            uint8_t *buf, int len, bool is_write);
 143     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 144                        int flags);
 145     void (*dump_statistics)(CPUState *cpu, FILE *f,
 146                             fprintf_function cpu_fprintf, int flags);
 147     int64_t (*get_arch_id)(CPUState *cpu);
 148     bool (*get_paging_enabled)(const CPUState *cpu);
 149     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 150                                Error **errp);
 151     void (*set_pc)(CPUState *cpu, vaddr value);
 152     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 153     int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
 154                             int mmu_index);
 155     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 156     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 157     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 158     void (*debug_excp_handler)(CPUState *cpu);
 159
 160     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 161                             int cpuid, void *opaque);
 162     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 163                                 void *opaque);
 164     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 165                             int cpuid, void *opaque);
 166     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 167                                 void *opaque);
 168
 169     const struct VMStateDescription *vmsd;
 170     int gdb_num_core_regs;
 171     const char *gdb_core_xml_file;
 172     bool gdb_stop_before_watchpoint;
 173
 174     void (*cpu_exec_enter)(CPUState *cpu);
 175     void (*cpu_exec_exit)(CPUState *cpu);
 176     bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
 177
 178     void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
 179 } CPUClass;
 180
 181 #ifdef HOST_WORDS_BIGENDIAN
 182 typedef struct icount_decr_u16 {
 183     uint16_t high;
 184     uint16_t low;
 185 } icount_decr_u16;
 186 #else
 187 typedef struct icount_decr_u16 {
 188     uint16_t low;
 189     uint16_t high;
 190 } icount_decr_u16;
 191 #endif
 192
 193 typedef struct CPUBreakpoint {
 194     vaddr pc;
 195     int flags; /* BP_* */
 196     QTAILQ_ENTRY(CPUBreakpoint) entry;
 197 } CPUBreakpoint;
 198
 199 typedef struct CPUWatchpoint {
 200     vaddr vaddr;
 201     vaddr len;
 202     vaddr hitaddr;
 203     MemTxAttrs hitattrs;
 204     int flags; /* BP_* */
 205     QTAILQ_ENTRY(CPUWatchpoint) entry;
 206 } CPUWatchpoint;
 207
 208 struct KVMState;
 209 struct kvm_run;
 210
 211 #define TB_JMP_CACHE_BITS 12
 212 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
 213
 214 /**
 215  * CPUState:
 216  * @cpu_index: CPU index (informative).
 217  * @nr_cores: Number of cores within this CPU package.
 218  * @nr_threads: Number of threads within this CPU.
 219  * @numa_node: NUMA node this CPU is belonging to.
 220  * @host_tid: Host thread ID.
 221  * @running: #true if CPU is currently running (usermode).
 222  * @created: Indicates whether the CPU thread has been successfully created.
 223  * @interrupt_request: Indicates a pending interrupt request.
 224  * @halted: Nonzero if the CPU is in suspended state.
 225  * @stop: Indicates a pending stop request.
 226  * @stopped: Indicates the CPU has been artificially stopped.
 227  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 228  *           CPU and return to its top level loop.
 229  * @singlestep_enabled: Flags for single-stepping.
 230  * @icount_extra: Instructions until next timer event.
 231  * @icount_decr: Number of cycles left, with interrupt flag in high bit.
 232  * This allows a single read-compare-cbranch-write sequence to test
 233  * for both decrementer underflow and exceptions.
 234  * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
 235  * requires that IO only be performed on the last instruction of a TB
 236  * so that interrupts take effect immediately.
 237  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 238  * @current_tb: Currently executing TB.
 239  * @gdb_regs: Additional GDB registers.
 240  * @gdb_num_regs: Number of total registers accessible to GDB.
 241  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 242  * @next_cpu: Next CPU sharing TB cache.
 243  * @opaque: User data.
 244  * @mem_io_pc: Host Program Counter at which the memory was accessed.
 245  * @mem_io_vaddr: Target virtual address at which the memory was accessed.
 246  * @kvm_fd: vCPU file descriptor for KVM.
 247  *
 248  * State of one CPU core or thread.
 249  */
 250 struct CPUState {
 251     /*< private >*/
 252     DeviceState parent_obj;
 253     /*< public >*/
 254
 255     int nr_cores;
 256     int nr_threads;
 257     int numa_node;
 258
 259     struct QemuThread *thread;
 260 #ifdef _WIN32
 261     HANDLE hThread;
 262 #endif
 263     int thread_id;
 264     uint32_t host_tid;
 265     bool running;
 266     struct QemuCond *halt_cond;
 267     struct qemu_work_item *queued_work_first, *queued_work_last;
 268     bool thread_kicked;
 269     bool created;
 270     bool stop;
 271     bool stopped;
 272     volatile sig_atomic_t exit_request;
 273     uint32_t interrupt_request;
 274     int singlestep_enabled;
 275     int64_t icount_extra;
 276     sigjmp_buf jmp_env;
 277
 278     AddressSpace *as;
 279     struct AddressSpaceDispatch *memory_dispatch;
 280     MemoryListener *tcg_as_listener;
 281
 282     void *env_ptr; /* CPUArchState */
 283     struct TranslationBlock *current_tb;
 284     struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
 285     struct GDBRegisterState *gdb_regs;
 286     int gdb_num_regs;
 287     int gdb_num_g_regs;
 288     QTAILQ_ENTRY(CPUState) node;
 289
 290     /* ice debug support */
 291     QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;
 292
 293     QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;
 294     CPUWatchpoint *watchpoint_hit;
 295
 296     void *opaque;
 297
 298     /* In order to avoid passing too many arguments to the MMIO helpers,
 299      * we store some rarely used information in the CPU context.
 300      */
 301     uintptr_t mem_io_pc;
 302     vaddr mem_io_vaddr;
 303
 304     int kvm_fd;
 305     bool kvm_vcpu_dirty;
 306     struct KVMState *kvm_state;
 307     struct kvm_run *kvm_run;
 308
 309     /* TODO Move common fields from CPUArchState here. */
 310     int cpu_index; /* used by alpha TCG */
 311     uint32_t halted; /* used by alpha, cris, ppc TCG */
 312     union {
 313         uint32_t u32;
 314         icount_decr_u16 u16;
 315     } icount_decr;
 316     uint32_t can_do_io;
 317     int32_t exception_index; /* used by m68k TCG */
 318
 319     /* Note that this is accessed at the start of every TB via a negative
 320        offset from AREG0.  Leave this field at the end so as to make the
 321        (absolute value) offset as small as possible.  This reduces code
 322        size, especially for hosts without large memory offsets.  */
 323     volatile sig_atomic_t tcg_exit_req;
 324 };
 325
 326 QTAILQ_HEAD(CPUTailQ, CPUState);
 327 extern struct CPUTailQ cpus;
 328 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 329 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 330 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 331     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 332 #define CPU_FOREACH_REVERSE(cpu) \
 333     QTAILQ_FOREACH_REVERSE(cpu, &cpus, CPUTailQ, node)
 334 #define first_cpu QTAILQ_FIRST(&cpus)
 335
 336 DECLARE_TLS(CPUState *, current_cpu);
 337 #define current_cpu tls_var(current_cpu)
 338
 339 /**
 340  * cpu_paging_enabled:
 341  * @cpu: The CPU whose state is to be inspected.
 342  *
 343  * Returns: %true if paging is enabled, %false otherwise.
 344  */
 345 bool cpu_paging_enabled(const CPUState *cpu);
 346
 347 /**
 348  * cpu_get_memory_mapping:
 349  * @cpu: The CPU whose memory mappings are to be obtained.
 350  * @list: Where to write the memory mappings to.
 351  * @errp: Pointer for reporting an #Error.
 352  */
 353 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 354                             Error **errp);
 355
 356 /**
 357  * cpu_write_elf64_note:
 358  * @f: pointer to a function that writes memory to a file
 359  * @cpu: The CPU whose memory is to be dumped
 360  * @cpuid: ID number of the CPU
 361  * @opaque: pointer to the CPUState struct
 362  */
 363 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 364                          int cpuid, void *opaque);
 365
 366 /**
 367  * cpu_write_elf64_qemunote:
 368  * @f: pointer to a function that writes memory to a file
 369  * @cpu: The CPU whose memory is to be dumped
 370  * @cpuid: ID number of the CPU
 371  * @opaque: pointer to the CPUState struct
 372  */
 373 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 374                              void *opaque);
 375
 376 /**
 377  * cpu_write_elf32_note:
 378  * @f: pointer to a function that writes memory to a file
 379  * @cpu: The CPU whose memory is to be dumped
 380  * @cpuid: ID number of the CPU
 381  * @opaque: pointer to the CPUState struct
 382  */
 383 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 384                          int cpuid, void *opaque);
 385
 386 /**
 387  * cpu_write_elf32_qemunote:
 388  * @f: pointer to a function that writes memory to a file
 389  * @cpu: The CPU whose memory is to be dumped
 390  * @cpuid: ID number of the CPU
 391  * @opaque: pointer to the CPUState struct
 392  */
 393 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 394                              void *opaque);
 395
 396 /**
 397  * CPUDumpFlags:
 398  * @CPU_DUMP_CODE:
 399  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 400  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 401  */
 402 enum CPUDumpFlags {
 403     CPU_DUMP_CODE = 0x00010000,
 404     CPU_DUMP_FPU  = 0x00020000,
 405     CPU_DUMP_CCOP = 0x00040000,
 406 };
 407
 408 /**
 409  * cpu_dump_state:
 410  * @cpu: The CPU whose state is to be dumped.
 411  * @f: File to dump to.
 412  * @cpu_fprintf: Function to dump with.
 413  * @flags: Flags what to dump.
 414  *
 415  * Dumps CPU state.
 416  */
 417 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 418                     int flags);
 419
 420 /**
 421  * cpu_dump_statistics:
 422  * @cpu: The CPU whose state is to be dumped.
 423  * @f: File to dump to.
 424  * @cpu_fprintf: Function to dump with.
 425  * @flags: Flags what to dump.
 426  *
 427  * Dumps CPU statistics.
 428  */
 429 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 430                          int flags);
 431
 432 #ifndef CONFIG_USER_ONLY
 433 /**
 434  * cpu_get_phys_page_debug:
 435  * @cpu: The CPU to obtain the physical page address for.
 436  * @addr: The virtual address.
 437  *
 438  * Obtains the physical page corresponding to a virtual one.
 439  * Use it only for debugging because no protection checks are done.
 440  *
 441  * Returns: Corresponding physical page address or -1 if no page found.
 442  */
 443 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 444 {
 445     CPUClass *cc = CPU_GET_CLASS(cpu);
 446
 447     return cc->get_phys_page_debug(cpu, addr);
 448 }
 449 #endif
 450
 451 /**
 452  * cpu_reset:
 453  * @cpu: The CPU whose state is to be reset.
 454  */
 455 void cpu_reset(CPUState *cpu);
 456
 457 /**
 458  * cpu_class_by_name:
 459  * @typename: The CPU base type.
 460  * @cpu_model: The model string without any parameters.
 461  *
 462  * Looks up a CPU #ObjectClass matching name @cpu_model.
 463  *
 464  * Returns: A #CPUClass or %NULL if not matching class is found.
 465  */
 466 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 467
 468 /**
 469  * cpu_generic_init:
 470  * @typename: The CPU base type.
 471  * @cpu_model: The model string including optional parameters.
 472  *
 473  * Instantiates a CPU, processes optional parameters and realizes the CPU.
 474  *
 475  * Returns: A #CPUState or %NULL if an error occurred.
 476  */
 477 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
 478
 479 /**
 480  * cpu_has_work:
 481  * @cpu: The vCPU to check.
 482  *
 483  * Checks whether the CPU has work to do.
 484  *
 485  * Returns: %true if the CPU has work, %false otherwise.
 486  */
 487 static inline bool cpu_has_work(CPUState *cpu)
 488 {
 489     CPUClass *cc = CPU_GET_CLASS(cpu);
 490
 491     g_assert(cc->has_work);
 492     return cc->has_work(cpu);
 493 }
 494
 495 /**
 496  * qemu_cpu_is_self:
 497  * @cpu: The vCPU to check against.
 498  *
 499  * Checks whether the caller is executing on the vCPU thread.
 500  *
 501  * Returns: %true if called from @cpu's thread, %false otherwise.
 502  */
 503 bool qemu_cpu_is_self(CPUState *cpu);
 504
 505 /**
 506  * qemu_cpu_kick:
 507  * @cpu: The vCPU to kick.
 508  *
 509  * Kicks @cpu's thread.
 510  */
 511 void qemu_cpu_kick(CPUState *cpu);
 512
 513 /**
 514  * cpu_is_stopped:
 515  * @cpu: The CPU to check.
 516  *
 517  * Checks whether the CPU is stopped.
 518  *
 519  * Returns: %true if run state is not running or if artificially stopped;
 520  * %false otherwise.
 521  */
 522 bool cpu_is_stopped(CPUState *cpu);
 523
 524 /**
 525  * run_on_cpu:
 526  * @cpu: The vCPU to run on.
 527  * @func: The function to be executed.
 528  * @data: Data to pass to the function.
 529  *
 530  * Schedules the function @func for execution on the vCPU @cpu.
 531  */
 532 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 533
 534 /**
 535  * async_run_on_cpu:
 536  * @cpu: The vCPU to run on.
 537  * @func: The function to be executed.
 538  * @data: Data to pass to the function.
 539  *
 540  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 541  */
 542 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 543
 544 /**
 545  * qemu_get_cpu:
 546  * @index: The CPUState@cpu_index value of the CPU to obtain.
 547  *
 548  * Gets a CPU matching @index.
 549  *
 550  * Returns: The CPU or %NULL if there is no matching CPU.
 551  */
 552 CPUState *qemu_get_cpu(int index);
 553
 554 /**
 555  * cpu_exists:
 556  * @id: Guest-exposed CPU ID to lookup.
 557  *
 558  * Search for CPU with specified ID.
 559  *
 560  * Returns: %true - CPU is found, %false - CPU isn't found.
 561  */
 562 bool cpu_exists(int64_t id);
 563
 564 #ifndef CONFIG_USER_ONLY
 565
 566 typedef void (*CPUInterruptHandler)(CPUState *, int);
 567
 568 extern CPUInterruptHandler cpu_interrupt_handler;
 569
 570 /**
 571  * cpu_interrupt:
 572  * @cpu: The CPU to set an interrupt on.
 573  * @mask: The interupts to set.
 574  *
 575  * Invokes the interrupt handler.
 576  */
 577 static inline void cpu_interrupt(CPUState *cpu, int mask)
 578 {
 579     cpu_interrupt_handler(cpu, mask);
 580 }
 581
 582 #else /* USER_ONLY */
 583
 584 void cpu_interrupt(CPUState *cpu, int mask);
 585
 586 #endif /* USER_ONLY */
 587
 588 #ifdef CONFIG_SOFTMMU
 589 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 590                                          bool is_write, bool is_exec,
 591                                          int opaque, unsigned size)
 592 {
 593     CPUClass *cc = CPU_GET_CLASS(cpu);
 594
 595     if (cc->do_unassigned_access) {
 596         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 597     }
 598 }
 599
 600 static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr,
 601                                         int is_write, int is_user,
 602                                         uintptr_t retaddr)
 603 {
 604     CPUClass *cc = CPU_GET_CLASS(cpu);
 605
 606     cc->do_unaligned_access(cpu, addr, is_write, is_user, retaddr);
 607 }
 608 #endif
 609
 610 /**
 611  * cpu_set_pc:
 612  * @cpu: The CPU to set the program counter for.
 613  * @addr: Program counter value.
 614  *
 615  * Sets the program counter for a CPU.
 616  */
 617 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
 618 {
 619     CPUClass *cc = CPU_GET_CLASS(cpu);
 620
 621     cc->set_pc(cpu, addr);
 622 }
 623
 624 /**
 625  * cpu_reset_interrupt:
 626  * @cpu: The CPU to clear the interrupt on.
 627  * @mask: The interrupt mask to clear.
 628  *
 629  * Resets interrupts on the vCPU @cpu.
 630  */
 631 void cpu_reset_interrupt(CPUState *cpu, int mask);
 632
 633 /**
 634  * cpu_exit:
 635  * @cpu: The CPU to exit.
 636  *
 637  * Requests the CPU @cpu to exit execution.
 638  */
 639 void cpu_exit(CPUState *cpu);
 640
 641 /**
 642  * cpu_resume:
 643  * @cpu: The CPU to resume.
 644  *
 645  * Resumes CPU, i.e. puts CPU into runnable state.
 646  */
 647 void cpu_resume(CPUState *cpu);
 648
 649 /**
 650  * qemu_init_vcpu:
 651  * @cpu: The vCPU to initialize.
 652  *
 653  * Initializes a vCPU.
 654  */
 655 void qemu_init_vcpu(CPUState *cpu);
 656
 657 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 658 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 659 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 660
 661 /**
 662  * cpu_single_step:
 663  * @cpu: CPU to the flags for.
 664  * @enabled: Flags to enable.
 665  *
 666  * Enables or disables single-stepping for @cpu.
 667  */
 668 void cpu_single_step(CPUState *cpu, int enabled);
 669
 670 /* Breakpoint/watchpoint flags */
 671 #define BP_MEM_READ           0x01
 672 #define BP_MEM_WRITE          0x02
 673 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 674 #define BP_STOP_BEFORE_ACCESS 0x04
 675 /* 0x08 currently unused */
 676 #define BP_GDB                0x10
 677 #define BP_CPU                0x20
 678 #define BP_WATCHPOINT_HIT_READ 0x40
 679 #define BP_WATCHPOINT_HIT_WRITE 0x80
 680 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
 681
 682 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
 683                           CPUBreakpoint **breakpoint);
 684 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
 685 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
 686 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
 687
 688 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
 689                           int flags, CPUWatchpoint **watchpoint);
 690 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
 691                           vaddr len, int flags);
 692 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
 693 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
 694
 695 void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
 696     GCC_FMT_ATTR(2, 3);
 697 void cpu_exec_exit(CPUState *cpu);
 698
 699 #ifdef CONFIG_SOFTMMU
 700 extern const struct VMStateDescription vmstate_cpu_common;
 701 #else
 702 #define vmstate_cpu_common vmstate_dummy
 703 #endif
 704
 705 #define VMSTATE_CPU() {                                                     \
 706     .name = "parent_obj",                                                   \
 707     .size = sizeof(CPUState),                                               \
 708     .vmsd = &vmstate_cpu_common,                                            \
 709     .flags = VMS_STRUCT,                                                    \
 710     .offset = 0,                                                            \
 711 }
 712
 713 #endif