| blob | 84080dd18cae692934577d82af863a97b71a9714 |
1 #
2 # RISC-V translation routines for the RVXI Base Integer Instruction Set.
3 #
4 # Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5 # Bastian Koppelmann, kbastian@mail.uni-paderborn.de
6 #
7 # This program is free software; you can redistribute it and/or modify it
8 # under the terms and conditions of the GNU General Public License,
9 # version 2 or later, as published by the Free Software Foundation.
10 #
11 # This program is distributed in the hope it will be useful, but WITHOUT
12 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 # more details.
15 #
16 # You should have received a copy of the GNU General Public License along with
17 # this program. If not, see <http://www.gnu.org/licenses/>.
19 # Fields:
20 %rs3 27:5
21 %rs2 20:5
22 %rs1 15:5
23 %rd 7:5
25 %sh10 20:10
26 %csr 20:12
27 %rm 12:3
28 %nf 29:3 !function=ex_plus_1
30 # immediates:
31 %imm_i 20:s12
32 %imm_s 25:s7 7:5
33 %imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1
34 %imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1
35 %imm_u 12:s20 !function=ex_shift_12
37 # Argument sets:
38 &empty
39 &b imm rs2 rs1
40 &i imm rs1 rd
41 &j imm rd
42 &r rd rs1 rs2
43 &s imm rs1 rs2
44 &u imm rd
45 &shift shamt rs1 rd
46 &atomic aq rl rs2 rs1 rd
47 &rmrr vm rd rs1 rs2
48 &rmr vm rd rs2
49 &rwdvm vm wd rd rs1 rs2
50 &r2nfvm vm rd rs1 nf
51 &rnfvm vm rd rs1 rs2 nf
53 # Formats 32:
54 @r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd
55 @i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd
56 @b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1
57 @s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1
58 @u .................... ..... ....... &u imm=%imm_u %rd
59 @j .................... ..... ....... &j imm=%imm_j %rd
61 @sh ...... ...... ..... ... ..... ....... &shift shamt=%sh10 %rs1 %rd
62 @csr ............ ..... ... ..... ....... %csr %rs1 %rd
64 @atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd
65 @atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd
67 @r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
68 @r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
69 @r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd
70 @r2 ....... ..... ..... ... ..... ....... %rs1 %rd
71 @r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
72 @r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
73 @r1_vm ...... vm:1 ..... ..... ... ..... ....... %rd
74 @r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
75 @r2rd ....... ..... ..... ... ..... ....... %rs2 %rd
76 @r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
77 @r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd
78 @r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd
79 @r_wdvm ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd
80 @r2_zimm . zimm:11 ..... ... ..... ....... %rs1 %rd
81 @r2_s ....... ..... ..... ... ..... ....... %rs2 %rs1
83 @hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1
84 @hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1
86 @sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1
87 @sfence_vm ....... ..... ..... ... ..... ....... %rs1
90 # *** Privileged Instructions ***
91 ecall 000000000000 00000 000 00000 1110011
92 ebreak 000000000001 00000 000 00000 1110011
93 uret 0000000 00010 00000 000 00000 1110011
94 sret 0001000 00010 00000 000 00000 1110011
95 mret 0011000 00010 00000 000 00000 1110011
96 wfi 0001000 00101 00000 000 00000 1110011
97 sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma
98 sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm
100 # *** RV32I Base Instruction Set ***
101 lui .................... ..... 0110111 @u
102 auipc .................... ..... 0010111 @u
103 jal .................... ..... 1101111 @j
104 jalr ............ ..... 000 ..... 1100111 @i
105 beq ....... ..... ..... 000 ..... 1100011 @b
106 bne ....... ..... ..... 001 ..... 1100011 @b
107 blt ....... ..... ..... 100 ..... 1100011 @b
108 bge ....... ..... ..... 101 ..... 1100011 @b
109 bltu ....... ..... ..... 110 ..... 1100011 @b
110 bgeu ....... ..... ..... 111 ..... 1100011 @b
111 lb ............ ..... 000 ..... 0000011 @i
112 lh ............ ..... 001 ..... 0000011 @i
113 lw ............ ..... 010 ..... 0000011 @i
114 lbu ............ ..... 100 ..... 0000011 @i
115 lhu ............ ..... 101 ..... 0000011 @i
116 sb ....... ..... ..... 000 ..... 0100011 @s
117 sh ....... ..... ..... 001 ..... 0100011 @s
118 sw ....... ..... ..... 010 ..... 0100011 @s
119 addi ............ ..... 000 ..... 0010011 @i
120 slti ............ ..... 010 ..... 0010011 @i
121 sltiu ............ ..... 011 ..... 0010011 @i
122 xori ............ ..... 100 ..... 0010011 @i
123 ori ............ ..... 110 ..... 0010011 @i
124 andi ............ ..... 111 ..... 0010011 @i
125 slli 00.... ...... ..... 001 ..... 0010011 @sh
126 srli 00.... ...... ..... 101 ..... 0010011 @sh
127 srai 01.... ...... ..... 101 ..... 0010011 @sh
128 add 0000000 ..... ..... 000 ..... 0110011 @r
129 sub 0100000 ..... ..... 000 ..... 0110011 @r
130 sll 0000000 ..... ..... 001 ..... 0110011 @r
131 slt 0000000 ..... ..... 010 ..... 0110011 @r
132 sltu 0000000 ..... ..... 011 ..... 0110011 @r
133 xor 0000000 ..... ..... 100 ..... 0110011 @r
134 srl 0000000 ..... ..... 101 ..... 0110011 @r
135 sra 0100000 ..... ..... 101 ..... 0110011 @r
136 or 0000000 ..... ..... 110 ..... 0110011 @r
137 and 0000000 ..... ..... 111 ..... 0110011 @r
138 fence ---- pred:4 succ:4 ----- 000 ----- 0001111
139 fence_i ---- ---- ---- ----- 001 ----- 0001111
140 csrrw ............ ..... 001 ..... 1110011 @csr
141 csrrs ............ ..... 010 ..... 1110011 @csr
142 csrrc ............ ..... 011 ..... 1110011 @csr
143 csrrwi ............ ..... 101 ..... 1110011 @csr
144 csrrsi ............ ..... 110 ..... 1110011 @csr
145 csrrci ............ ..... 111 ..... 1110011 @csr
147 # *** RV32M Standard Extension ***
148 mul 0000001 ..... ..... 000 ..... 0110011 @r
149 mulh 0000001 ..... ..... 001 ..... 0110011 @r
150 mulhsu 0000001 ..... ..... 010 ..... 0110011 @r
151 mulhu 0000001 ..... ..... 011 ..... 0110011 @r
152 div 0000001 ..... ..... 100 ..... 0110011 @r
153 divu 0000001 ..... ..... 101 ..... 0110011 @r
154 rem 0000001 ..... ..... 110 ..... 0110011 @r
155 remu 0000001 ..... ..... 111 ..... 0110011 @r
157 # *** RV32A Standard Extension ***
158 lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
159 sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st
160 amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st
161 amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st
162 amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st
163 amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st
164 amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st
165 amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st
166 amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st
167 amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st
168 amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st
170 # *** RV32F Standard Extension ***
171 flw ............ ..... 010 ..... 0000111 @i
172 fsw ....... ..... ..... 010 ..... 0100111 @s
173 fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm
174 fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm
175 fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm
176 fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm
177 fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm
178 fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm
179 fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm
180 fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm
181 fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm
182 fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r
183 fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r
184 fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r
185 fmin_s 0010100 ..... ..... 000 ..... 1010011 @r
186 fmax_s 0010100 ..... ..... 001 ..... 1010011 @r
187 fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm
188 fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm
189 fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2
190 feq_s 1010000 ..... ..... 010 ..... 1010011 @r
191 flt_s 1010000 ..... ..... 001 ..... 1010011 @r
192 fle_s 1010000 ..... ..... 000 ..... 1010011 @r
193 fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2
194 fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm
195 fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm
196 fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2
198 # *** RV32D Standard Extension ***
199 fld ............ ..... 011 ..... 0000111 @i
200 fsd ....... ..... ..... 011 ..... 0100111 @s
201 fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm
202 fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm
203 fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm
204 fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm
205 fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm
206 fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm
207 fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm
208 fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm
209 fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm
210 fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r
211 fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r
212 fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r
213 fmin_d 0010101 ..... ..... 000 ..... 1010011 @r
214 fmax_d 0010101 ..... ..... 001 ..... 1010011 @r
215 fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm
216 fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm
217 feq_d 1010001 ..... ..... 010 ..... 1010011 @r
218 flt_d 1010001 ..... ..... 001 ..... 1010011 @r
219 fle_d 1010001 ..... ..... 000 ..... 1010011 @r
220 fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2
221 fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm
222 fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm
223 fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm
224 fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm
226 # *** RV32H Base Instruction Set ***
227 hlv_b 0110000 00000 ..... 100 ..... 1110011 @r2
228 hlv_bu 0110000 00001 ..... 100 ..... 1110011 @r2
229 hlv_h 0110010 00000 ..... 100 ..... 1110011 @r2
230 hlv_hu 0110010 00001 ..... 100 ..... 1110011 @r2
231 hlvx_hu 0110010 00011 ..... 100 ..... 1110011 @r2
232 hlv_w 0110100 00000 ..... 100 ..... 1110011 @r2
233 hlvx_wu 0110100 00011 ..... 100 ..... 1110011 @r2
234 hsv_b 0110001 ..... ..... 100 00000 1110011 @r2_s
235 hsv_h 0110011 ..... ..... 100 00000 1110011 @r2_s
236 hsv_w 0110101 ..... ..... 100 00000 1110011 @r2_s
237 hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma
238 hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma
240 # *** RV32V Extension ***
242 # *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
243 vlb_v ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm
244 vlh_v ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm
245 vlw_v ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm
246 vle_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
247 vlbu_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
248 vlhu_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
249 vlwu_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
250 vlbff_v ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm
251 vlhff_v ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm
252 vlwff_v ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm
253 vleff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
254 vlbuff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
255 vlhuff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
256 vlwuff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
257 vsb_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
258 vsh_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
259 vsw_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
260 vse_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
262 vlsb_v ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm
263 vlsh_v ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm
264 vlsw_v ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm
265 vlse_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
266 vlsbu_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
267 vlshu_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
268 vlswu_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
269 vssb_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
270 vssh_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
271 vssw_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
272 vsse_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
274 vlxb_v ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm
275 vlxh_v ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm
276 vlxw_v ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm
277 vlxe_v ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm
278 vlxbu_v ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm
279 vlxhu_v ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm
280 vlxwu_v ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm
281 # Vector ordered-indexed and unordered-indexed store insns.
282 vsxb_v ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm
283 vsxh_v ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm
284 vsxw_v ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm
285 vsxe_v ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm
287 #*** Vector AMO operations are encoded under the standard AMO major opcode ***
288 vamoswapw_v 00001 . . ..... ..... 110 ..... 0101111 @r_wdvm
289 vamoaddw_v 00000 . . ..... ..... 110 ..... 0101111 @r_wdvm
290 vamoxorw_v 00100 . . ..... ..... 110 ..... 0101111 @r_wdvm
291 vamoandw_v 01100 . . ..... ..... 110 ..... 0101111 @r_wdvm
292 vamoorw_v 01000 . . ..... ..... 110 ..... 0101111 @r_wdvm
293 vamominw_v 10000 . . ..... ..... 110 ..... 0101111 @r_wdvm
294 vamomaxw_v 10100 . . ..... ..... 110 ..... 0101111 @r_wdvm
295 vamominuw_v 11000 . . ..... ..... 110 ..... 0101111 @r_wdvm
296 vamomaxuw_v 11100 . . ..... ..... 110 ..... 0101111 @r_wdvm
298 # *** new major opcode OP-V ***
299 vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm
300 vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm
301 vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm
302 vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm
303 vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm
304 vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm
305 vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm
306 vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm
307 vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm
308 vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm
309 vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm
310 vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm
311 vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm
312 vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm
313 vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm
314 vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm
315 vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm
316 vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm
317 vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm
318 vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm
319 vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm
320 vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm
321 vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm
322 vadc_vvm 010000 1 ..... ..... 000 ..... 1010111 @r_vm_1
323 vadc_vxm 010000 1 ..... ..... 100 ..... 1010111 @r_vm_1
324 vadc_vim 010000 1 ..... ..... 011 ..... 1010111 @r_vm_1
325 vmadc_vvm 010001 1 ..... ..... 000 ..... 1010111 @r_vm_1
326 vmadc_vxm 010001 1 ..... ..... 100 ..... 1010111 @r_vm_1
327 vmadc_vim 010001 1 ..... ..... 011 ..... 1010111 @r_vm_1
328 vsbc_vvm 010010 1 ..... ..... 000 ..... 1010111 @r_vm_1
329 vsbc_vxm 010010 1 ..... ..... 100 ..... 1010111 @r_vm_1
330 vmsbc_vvm 010011 1 ..... ..... 000 ..... 1010111 @r_vm_1
331 vmsbc_vxm 010011 1 ..... ..... 100 ..... 1010111 @r_vm_1
332 vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm
333 vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm
334 vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm
335 vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm
336 vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm
337 vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm
338 vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm
339 vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm
340 vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm
341 vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm
342 vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm
343 vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm
344 vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm
345 vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm
346 vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm
347 vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm
348 vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm
349 vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm
350 vnsrl_vv 101100 . ..... ..... 000 ..... 1010111 @r_vm
351 vnsrl_vx 101100 . ..... ..... 100 ..... 1010111 @r_vm
352 vnsrl_vi 101100 . ..... ..... 011 ..... 1010111 @r_vm
353 vnsra_vv 101101 . ..... ..... 000 ..... 1010111 @r_vm
354 vnsra_vx 101101 . ..... ..... 100 ..... 1010111 @r_vm
355 vnsra_vi 101101 . ..... ..... 011 ..... 1010111 @r_vm
356 vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm
357 vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm
358 vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm
359 vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm
360 vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm
361 vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm
362 vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm
363 vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm
364 vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm
365 vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm
366 vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm
367 vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm
368 vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm
369 vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm
370 vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm
371 vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm
372 vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm
373 vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm
374 vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm
375 vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm
376 vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm
377 vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm
378 vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm
379 vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm
380 vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm
381 vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm
382 vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm
383 vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm
384 vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm
385 vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm
386 vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm
387 vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm
388 vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm
389 vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm
390 vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm
391 vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm
392 vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm
393 vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm
394 vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm
395 vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm
396 vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm
397 vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm
398 vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm
399 vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm
400 vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm
401 vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm
402 vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm
403 vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm
404 vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm
405 vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm
406 vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm
407 vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm
408 vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm
409 vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm
410 vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm
411 vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm
412 vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm
413 vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm
414 vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm
415 vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm
416 vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm
417 vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm
418 vwmaccsu_vv 111110 . ..... ..... 010 ..... 1010111 @r_vm
419 vwmaccsu_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm
420 vwmaccus_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm
421 vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2
422 vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2
423 vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2
424 vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
425 vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
426 vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
427 vsaddu_vv 100000 . ..... ..... 000 ..... 1010111 @r_vm
428 vsaddu_vx 100000 . ..... ..... 100 ..... 1010111 @r_vm
429 vsaddu_vi 100000 . ..... ..... 011 ..... 1010111 @r_vm
430 vsadd_vv 100001 . ..... ..... 000 ..... 1010111 @r_vm
431 vsadd_vx 100001 . ..... ..... 100 ..... 1010111 @r_vm
432 vsadd_vi 100001 . ..... ..... 011 ..... 1010111 @r_vm
433 vssubu_vv 100010 . ..... ..... 000 ..... 1010111 @r_vm
434 vssubu_vx 100010 . ..... ..... 100 ..... 1010111 @r_vm
435 vssub_vv 100011 . ..... ..... 000 ..... 1010111 @r_vm
436 vssub_vx 100011 . ..... ..... 100 ..... 1010111 @r_vm
437 vaadd_vv 100100 . ..... ..... 000 ..... 1010111 @r_vm
438 vaadd_vx 100100 . ..... ..... 100 ..... 1010111 @r_vm
439 vaadd_vi 100100 . ..... ..... 011 ..... 1010111 @r_vm
440 vasub_vv 100110 . ..... ..... 000 ..... 1010111 @r_vm
441 vasub_vx 100110 . ..... ..... 100 ..... 1010111 @r_vm
442 vsmul_vv 100111 . ..... ..... 000 ..... 1010111 @r_vm
443 vsmul_vx 100111 . ..... ..... 100 ..... 1010111 @r_vm
444 vwsmaccu_vv 111100 . ..... ..... 000 ..... 1010111 @r_vm
445 vwsmaccu_vx 111100 . ..... ..... 100 ..... 1010111 @r_vm
446 vwsmacc_vv 111101 . ..... ..... 000 ..... 1010111 @r_vm
447 vwsmacc_vx 111101 . ..... ..... 100 ..... 1010111 @r_vm
448 vwsmaccsu_vv 111110 . ..... ..... 000 ..... 1010111 @r_vm
449 vwsmaccsu_vx 111110 . ..... ..... 100 ..... 1010111 @r_vm
450 vwsmaccus_vx 111111 . ..... ..... 100 ..... 1010111 @r_vm
451 vssrl_vv 101010 . ..... ..... 000 ..... 1010111 @r_vm
452 vssrl_vx 101010 . ..... ..... 100 ..... 1010111 @r_vm
453 vssrl_vi 101010 . ..... ..... 011 ..... 1010111 @r_vm
454 vssra_vv 101011 . ..... ..... 000 ..... 1010111 @r_vm
455 vssra_vx 101011 . ..... ..... 100 ..... 1010111 @r_vm
456 vssra_vi 101011 . ..... ..... 011 ..... 1010111 @r_vm
457 vnclipu_vv 101110 . ..... ..... 000 ..... 1010111 @r_vm
458 vnclipu_vx 101110 . ..... ..... 100 ..... 1010111 @r_vm
459 vnclipu_vi 101110 . ..... ..... 011 ..... 1010111 @r_vm
460 vnclip_vv 101111 . ..... ..... 000 ..... 1010111 @r_vm
461 vnclip_vx 101111 . ..... ..... 100 ..... 1010111 @r_vm
462 vnclip_vi 101111 . ..... ..... 011 ..... 1010111 @r_vm
463 vfadd_vv 000000 . ..... ..... 001 ..... 1010111 @r_vm
464 vfadd_vf 000000 . ..... ..... 101 ..... 1010111 @r_vm
465 vfsub_vv 000010 . ..... ..... 001 ..... 1010111 @r_vm
466 vfsub_vf 000010 . ..... ..... 101 ..... 1010111 @r_vm
467 vfrsub_vf 100111 . ..... ..... 101 ..... 1010111 @r_vm
468 vfwadd_vv 110000 . ..... ..... 001 ..... 1010111 @r_vm
469 vfwadd_vf 110000 . ..... ..... 101 ..... 1010111 @r_vm
470 vfwadd_wv 110100 . ..... ..... 001 ..... 1010111 @r_vm
471 vfwadd_wf 110100 . ..... ..... 101 ..... 1010111 @r_vm
472 vfwsub_vv 110010 . ..... ..... 001 ..... 1010111 @r_vm
473 vfwsub_vf 110010 . ..... ..... 101 ..... 1010111 @r_vm
474 vfwsub_wv 110110 . ..... ..... 001 ..... 1010111 @r_vm
475 vfwsub_wf 110110 . ..... ..... 101 ..... 1010111 @r_vm
476 vfmul_vv 100100 . ..... ..... 001 ..... 1010111 @r_vm
477 vfmul_vf 100100 . ..... ..... 101 ..... 1010111 @r_vm
478 vfdiv_vv 100000 . ..... ..... 001 ..... 1010111 @r_vm
479 vfdiv_vf 100000 . ..... ..... 101 ..... 1010111 @r_vm
480 vfrdiv_vf 100001 . ..... ..... 101 ..... 1010111 @r_vm
481 vfwmul_vv 111000 . ..... ..... 001 ..... 1010111 @r_vm
482 vfwmul_vf 111000 . ..... ..... 101 ..... 1010111 @r_vm
483 vfmacc_vv 101100 . ..... ..... 001 ..... 1010111 @r_vm
484 vfnmacc_vv 101101 . ..... ..... 001 ..... 1010111 @r_vm
485 vfnmacc_vf 101101 . ..... ..... 101 ..... 1010111 @r_vm
486 vfmacc_vf 101100 . ..... ..... 101 ..... 1010111 @r_vm
487 vfmsac_vv 101110 . ..... ..... 001 ..... 1010111 @r_vm
488 vfmsac_vf 101110 . ..... ..... 101 ..... 1010111 @r_vm
489 vfnmsac_vv 101111 . ..... ..... 001 ..... 1010111 @r_vm
490 vfnmsac_vf 101111 . ..... ..... 101 ..... 1010111 @r_vm
491 vfmadd_vv 101000 . ..... ..... 001 ..... 1010111 @r_vm
492 vfmadd_vf 101000 . ..... ..... 101 ..... 1010111 @r_vm
493 vfnmadd_vv 101001 . ..... ..... 001 ..... 1010111 @r_vm
494 vfnmadd_vf 101001 . ..... ..... 101 ..... 1010111 @r_vm
495 vfmsub_vv 101010 . ..... ..... 001 ..... 1010111 @r_vm
496 vfmsub_vf 101010 . ..... ..... 101 ..... 1010111 @r_vm
497 vfnmsub_vv 101011 . ..... ..... 001 ..... 1010111 @r_vm
498 vfnmsub_vf 101011 . ..... ..... 101 ..... 1010111 @r_vm
499 vfwmacc_vv 111100 . ..... ..... 001 ..... 1010111 @r_vm
500 vfwmacc_vf 111100 . ..... ..... 101 ..... 1010111 @r_vm
501 vfwnmacc_vv 111101 . ..... ..... 001 ..... 1010111 @r_vm
502 vfwnmacc_vf 111101 . ..... ..... 101 ..... 1010111 @r_vm
503 vfwmsac_vv 111110 . ..... ..... 001 ..... 1010111 @r_vm
504 vfwmsac_vf 111110 . ..... ..... 101 ..... 1010111 @r_vm
505 vfwnmsac_vv 111111 . ..... ..... 001 ..... 1010111 @r_vm
506 vfwnmsac_vf 111111 . ..... ..... 101 ..... 1010111 @r_vm
507 vfsqrt_v 100011 . ..... 00000 001 ..... 1010111 @r2_vm
508 vfmin_vv 000100 . ..... ..... 001 ..... 1010111 @r_vm
509 vfmin_vf 000100 . ..... ..... 101 ..... 1010111 @r_vm
510 vfmax_vv 000110 . ..... ..... 001 ..... 1010111 @r_vm
511 vfmax_vf 000110 . ..... ..... 101 ..... 1010111 @r_vm
512 vfsgnj_vv 001000 . ..... ..... 001 ..... 1010111 @r_vm
513 vfsgnj_vf 001000 . ..... ..... 101 ..... 1010111 @r_vm
514 vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm
515 vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm
516 vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm
517 vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm
518 vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm
519 vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm
520 vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm
521 vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm
522 vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm
523 vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm
524 vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm
525 vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm
526 vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm
527 vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm
528 vmford_vv 011010 . ..... ..... 001 ..... 1010111 @r_vm
529 vmford_vf 011010 . ..... ..... 101 ..... 1010111 @r_vm
530 vfclass_v 100011 . ..... 10000 001 ..... 1010111 @r2_vm
531 vfmerge_vfm 010111 0 ..... ..... 101 ..... 1010111 @r_vm_0
532 vfmv_v_f 010111 1 00000 ..... 101 ..... 1010111 @r2
533 vfcvt_xu_f_v 100010 . ..... 00000 001 ..... 1010111 @r2_vm
534 vfcvt_x_f_v 100010 . ..... 00001 001 ..... 1010111 @r2_vm
535 vfcvt_f_xu_v 100010 . ..... 00010 001 ..... 1010111 @r2_vm
536 vfcvt_f_x_v 100010 . ..... 00011 001 ..... 1010111 @r2_vm
537 vfwcvt_xu_f_v 100010 . ..... 01000 001 ..... 1010111 @r2_vm
538 vfwcvt_x_f_v 100010 . ..... 01001 001 ..... 1010111 @r2_vm
539 vfwcvt_f_xu_v 100010 . ..... 01010 001 ..... 1010111 @r2_vm
540 vfwcvt_f_x_v 100010 . ..... 01011 001 ..... 1010111 @r2_vm
541 vfwcvt_f_f_v 100010 . ..... 01100 001 ..... 1010111 @r2_vm
542 vfncvt_xu_f_v 100010 . ..... 10000 001 ..... 1010111 @r2_vm
543 vfncvt_x_f_v 100010 . ..... 10001 001 ..... 1010111 @r2_vm
544 vfncvt_f_xu_v 100010 . ..... 10010 001 ..... 1010111 @r2_vm
545 vfncvt_f_x_v 100010 . ..... 10011 001 ..... 1010111 @r2_vm
546 vfncvt_f_f_v 100010 . ..... 10100 001 ..... 1010111 @r2_vm
547 vredsum_vs 000000 . ..... ..... 010 ..... 1010111 @r_vm
548 vredand_vs 000001 . ..... ..... 010 ..... 1010111 @r_vm
549 vredor_vs 000010 . ..... ..... 010 ..... 1010111 @r_vm
550 vredxor_vs 000011 . ..... ..... 010 ..... 1010111 @r_vm
551 vredminu_vs 000100 . ..... ..... 010 ..... 1010111 @r_vm
552 vredmin_vs 000101 . ..... ..... 010 ..... 1010111 @r_vm
553 vredmaxu_vs 000110 . ..... ..... 010 ..... 1010111 @r_vm
554 vredmax_vs 000111 . ..... ..... 010 ..... 1010111 @r_vm
555 vwredsumu_vs 110000 . ..... ..... 000 ..... 1010111 @r_vm
556 vwredsum_vs 110001 . ..... ..... 000 ..... 1010111 @r_vm
557 # Vector ordered and unordered reduction sum
558 vfredsum_vs 0000-1 . ..... ..... 001 ..... 1010111 @r_vm
559 vfredmin_vs 000101 . ..... ..... 001 ..... 1010111 @r_vm
560 vfredmax_vs 000111 . ..... ..... 001 ..... 1010111 @r_vm
561 # Vector widening ordered and unordered float reduction sum
562 vfwredsum_vs 1100-1 . ..... ..... 001 ..... 1010111 @r_vm
563 vmand_mm 011001 - ..... ..... 010 ..... 1010111 @r
564 vmnand_mm 011101 - ..... ..... 010 ..... 1010111 @r
565 vmandnot_mm 011000 - ..... ..... 010 ..... 1010111 @r
566 vmxor_mm 011011 - ..... ..... 010 ..... 1010111 @r
567 vmor_mm 011010 - ..... ..... 010 ..... 1010111 @r
568 vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r
569 vmornot_mm 011100 - ..... ..... 010 ..... 1010111 @r
570 vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r
571 vmpopc_m 010100 . ..... ----- 010 ..... 1010111 @r2_vm
572 vmfirst_m 010101 . ..... ----- 010 ..... 1010111 @r2_vm
573 vmsbf_m 010110 . ..... 00001 010 ..... 1010111 @r2_vm
574 vmsif_m 010110 . ..... 00011 010 ..... 1010111 @r2_vm
575 vmsof_m 010110 . ..... 00010 010 ..... 1010111 @r2_vm
576 viota_m 010110 . ..... 10000 010 ..... 1010111 @r2_vm
577 vid_v 010110 . 00000 10001 010 ..... 1010111 @r1_vm
578 vext_x_v 001100 1 ..... ..... 010 ..... 1010111 @r
579 vmv_s_x 001101 1 00000 ..... 110 ..... 1010111 @r2
580 vfmv_f_s 001100 1 ..... 00000 001 ..... 1010111 @r2rd
581 vfmv_s_f 001101 1 00000 ..... 101 ..... 1010111 @r2
582 vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm
583 vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm
584 vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm
585 vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm
586 vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm
587 vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm
588 vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm
589 vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm
590 vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm
591 vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r
593 vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm
594 vsetvl 1000000 ..... ..... 111 ..... 1010111 @r